Hardware Control Pins Sample Clauses
Hardware Control Pins. The CFP8 Module supports real-time control functions via hardware pins, listed in Table 2-1. Specifications of the CFP8 hardware control pins are given in Ref. [1], with the changes listed below. Pin # Symbol Description I/O Logic ³H´ ³L´ Pull-up /down 96 TX_DIS (PRG_CNTL1) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull ±Up3 94 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull ±Up3 88 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull ± Down4 1 When Programmable Control is configured, MSA Default is TX_DIS. 2 Per CFP MSA Management Interface Specification [4] when PRG_CNTL1 is configured for this pin.
Hardware Control Pins. The CFP2 Module supports real-time control functions via hardware pins, listed in Table 2-1. Specifications of the CFP2 hardware control pins are given in Ref. [1], with the following changes listed below. Table 2-1: Control Pins Pin # Symbol Description I/O Logic “H” “L” Pull-up /down Programmable Control 1 17 PRG_CNTL1 MSA Default: TRXIC_RSTn, TX & RX ICs reset, I 3.3V LVCMOS Pull – Up2 "0": reset, "1"or NC: enabled per CFP MSA MIS Ref. [7] 18 PRG_CNTL2 Programmable Control 2 MSA Default: Hardware Interlock LSB I 3.3V LVCMOS Pull – Up2 19 PRG_CNTL3 Programmable Control 3 MSA Default: Hardware Interlock MSB I 3.3V LVCMOS Pull – Up2 24 TX_DIS Transmitter Disable I 3.3V LVCMOS Disable Enable Pull – Up2 26 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up2 28 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down3 2Pull-Up resistor (4.7 kOhm to 10 kOhm) is located within the CFP2 module 3Pull-Down resistor (4.7 kOhm to 10 kOhm) is located within the CFP2 module
Hardware Control Pins. Table 1-1: Control Pins
Hardware Control Pins. The CFP Module supports real-time control functions via hardware pins, listed in Table 2-1: Control Pins.
Hardware Control Pins. Functional Description
Hardware Control Pins. Functional Description Per specifications given in CFP MSA Hardware Specification, Revision 1.4, June 7, 2010 [1] except as noted below.
Hardware Control Pins. 9 The CFP8 Module supports real-time control functions via hardware pins, listed in Table 2-1. 10 Specifications of the CFP8 hardware control pins are given in Ref. [1], with the changes listed below. 11 Table 2- 1: Hardw are Control Pins Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 96 TX_DIS (PRG_CNTL1) Transmitter Disable (Optionally configurable as Programmable Control after Reset1) I 3.3V LVCMOS Disable2 Enable2 Pull – Up3 94 MOD_LOPWR Module Low Power Mode I 3.3V LVCMOS Low Power Enable Pull – Up3 88 MOD_RSTn Module Reset, Active Low (invert) I 3.3V LVCMOS Enable Reset Pull – Down4
12 1 When Programmable Control is configured, MSA Default is TX_DIS.
13 2 Per CFP MSA Management Interface Specification [4] when PRG_CNTL1 is configured for this pin.
14 3 Pull-Up resistor (4.7 kOhm to 10 kOhm) is located within the CFP8 module
15 4 Pull-Down resistor (4.7 kOhm to 10 kOhm) is located within the CFP8 module 16
Hardware Control Pins non-MDIO The CFP Module supports alarm, control and monitor functions via hardware pins and via an MDIO bus. Upon module initialization, these functions are available. The CFP uses pins in the electrical connector for control signals, listed in Table 2-1: Control Pins.
Hardware Control Pins. FUNCTIONAL DESCRIPTION