INTELLECTUAL PROPERTY SECURITY AGREEMENT dated as of February 19, 2010 among FREESCALE SEMICONDUCTOR, INC., as Issuer FREESCALE SEMICONDUCTOR HOLDINGS V, INC, SIGMATEL, LLC and CITIBANK, N.A., as Notes Collateral Agent

INTELLECTUAL PROPERTY SECURITY AGREEMENT dated as of February 19, 2010 among FREESCALE SEMICONDUCTOR, INC., as Issuer FREESCALE SEMICONDUCTOR HOLDINGS V, INC, SIGMATEL, LLC and CITIBANK, N.A., as Notes Collateral Agent

Document Metadata

Document Metadata

Table of Contents

Exhibit 10.39

EXECUTION VERSION

INTELLECTUAL PROPERTY SECURITY AGREEMENT

dated as of

February 19, 2010

among

FREESCALE SEMICONDUCTOR, INC.,

as Issuer

FREESCALE SEMICONDUCTOR HOLDINGS V, INC,

SIGMATEL, LLC

and

CITIBANK, N.A.,

as Notes Collateral Agent

TABLE OF CONTENTS


ARTICLE I DEFINITIONS
SECTION 1.01.	Indenture	2
SECTION 1.02.	Other Defined Terms	2

ARTICLE II

SECURITY INTERESTS

SECTION 2.01.	Security Interest	5
SECTION 2.02.	Representations and Warranties	6
SECTION 2.03.	Covenants	8
SECTION 2.04.	Additional Covenants	9

ARTICLE III

REMEDIES

SECTION 3.01.	Remedies Upon Default	10
SECTION 3.02.	Application of Proceeds	12
SECTION 3.03.	Grant of License to Use Intellectual Property	13

ARTICLE IV

INDEMNITY, SUBROGATION AND SUBORDINATION

SECTION 4.01.	Indemnity	13
SECTION 4.02.	Contribution and Subrogation	13
SECTION 4.03.	Subordination	14

ARTICLE V

MISCELLANEOUS

SECTION 5.01.	Notices	14
SECTION 5.02.	Waivers; Amendment	14
SECTION 5.03.	Notes Collateral Agent’s Fees and Expenses; Indemnification	15
SECTION 5.04.	Successors and Assigns	16
SECTION 5.05.	Survival of Agreement	16
SECTION 5.06.	Counterparts; Effectiveness; Several Agreement	16
SECTION 5.07.	Severability	16
SECTION 5.08.	Right of Set-Off	17
SECTION 5.09.	Governing Law; Jurisdiction; Consent to Service of Process	17
SECTION 5.10.	WAIVER OF JURY TRIAL	18


SECTION 5.11.	Headings	18
SECTION 5.12.	Security Interest Absolute	18
SECTION 5.13.	Termination or Release	18
SECTION 5.14.	Additional Restricted Subsidiaries	19
SECTION 5.15.	General Authority of the Notes Collateral Agent	20
SECTION 5.16.	Notes Collateral Agent Appointed Attorney-in-Fact	20


Schedules

Schedule I		Intellectual Property

Schedule II		Jointly Owned Patents

Exhibits

Exhibit I		Form of Intellectual Property Security Agreement Supplement

Exhibit II		Form of Perfection Certificate

iii

NOTWITHSTANDING ANYTHING HEREIN TO THE CONTRARY, THE EXERCISE OF ANY RIGHT OR REMEDY BY THE NOTES COLLATERAL AGENT WITH RESPECT TO THE LIENS, SECURITY INTERESTS AND RIGHTS GRANTED PURSUANT TO THIS AGREEMENT OR ANY OTHER COLLATERAL DOCUMENT RELATING TO THE NOTES SHALL BE AS SET FORTH IN, AND SUBJECT TO THE TERMS AND CONDITIONS OF (AND THE EXERCISE OF ANY RIGHT OR REMEDY BY THE NOTES COLLATERAL AGENT HEREUNDER OR THEREUNDER SHALL BE SUBJECT TO THE TERMS AND CONDITIONS OF), THE FIRST LIEN INTERCREDITOR AGREEMENT, DATED AS OF FEBRUARY 19, 2010 (AS AMENDED, AMENDED AND RESTATED, SUPPLEMENTED OR OTHERWISE MODIFIED FROM TIME TO TIME, THE “INTERCREDITOR AGREEMENT”), AMONG CITIBANK, N.A., AS DIRECTING AGENT; CITIBANK, N.A., AS THE SENIOR CREDIT AGREEMENT COLLATERAL AGENT; CITIBANK, N.A., AS THE SENIOR CREDIT AGREEMENT INCREMENTAL COLLATERAL AGENT; CITIBANK, N.A., AS THE INITIAL ADDITIONAL FIRST LIEN REPRESENTATIVE; AND EACH ADDITIONAL AUTHORIZED REPRESENTATIVE FROM TIME TO TIME PARTY THERETO (IN EACH CASE, AS DEFINED IN THE INTERCREDITOR AGREEMENT), AS CONSENTED TO BY THE GRANTORS HEREUNDER FROM TIME TO TIME. WITH THE EXCEPTION OF SECTION 2.01 HEREOF, IN THE EVENT OF ANY CONFLICT BETWEEN THIS AGREEMENT OR ANY OTHER COLLATERAL DOCUMENT RELATING TO THE NOTES AND THE INTERCREDITOR AGREEMENT, THE INTERCREDITOR AGREEMENT SHALL CONTROL.

INTELLECTUAL PROPERTY SECURITY AGREEMENT, dated as of February 19, 2010, among FREESCALE SEMICONDUCTOR, INC., a Delaware corporation (the “Issuer”), FREESCALE SEMICONDUCTOR HOLDINGS V, INC., a Delaware corporation (“Holdings V”), SIGMATEL, LLC, a Delaware limited liability company (“SigmaTel”), the Subsidiaries of FREESCALE SEMICONDUCTOR HOLDINGS III, LTD. (“Holdings III”) from time to time party hereto and CITIBANK, N.A., as collateral agent for the Secured Parties (as defined below) (in such capacity, the “Notes Collateral Agent”).

Reference is made to the Indenture dated as of February 19, 2010 (as amended, supplemented or otherwise modified from time to time, the “Indenture”), among the Issuer, Holdings V, SigmaTel, the other Guarantors named therein and The Bank of New York Mellon Trust Company, N.A., as trustee (the “Trustee”), pursuant to which the Issuer has issued $750,000,000 aggregate principal amount of 10¹/8% Senior Secured Notes due 2018 (the “Notes”) to the holders thereof (the “Holders”). The obligations of the initial Holders to purchase the Notes are conditioned upon, among other things, the execution and delivery of this Agreement. Each of the Issuer, Holdings V and SigmaTel will derive substantial benefits from the execution, delivery and performance of the obligations under the Indenture and the Collateral Documents relating to the Notes and each is, therefore, willing to enter into this Agreement. Accordingly, the parties hereto agree as follows:

[Intellectual Property Security Agreement]

ARTICLE I

DEFINITIONS

SECTION 1.01. Indenture.

(a) Capitalized terms used in this Agreement and not otherwise defined herein have the meanings specified in the Indenture. All terms defined in the New York UCC (as defined herein) and not defined in this Agreement have the meanings specified therein; the term “instrument” shall have the meaning specified in Article 9 of the New York UCC.

(b) The rules of construction specified in Section 1.03 of the Indenture also apply to this Agreement.

SECTION 1.02. Other Defined Terms. As used in this Agreement, the following terms have the meanings specified below:

“Agreement” means this Intellectual Property Security Agreement.

“Claiming Party” has the meaning assigned to such term in Section 4.02.

“Collateral” has the meaning assigned to such term in Section 2.01.

“Collateral Documents” means collectively, the Senior Credit Agreement Collateral Documents, the Additional First Lien Debt Collateral Documents and the Intercreditor Agreement.

“Contributing Party” has the meaning assigned to such term in Section 4.02.

“Copyright License” means any written agreement, now or hereafter in effect, granting any right to any third party under any copyright now or hereafter owned by any Grantor or that such Grantor otherwise has the right to license, or granting any right to any Grantor under any copyright now or hereafter owned by any third party, and all rights of such Grantor under any such agreement.

“Copyrights” means all of the following now owned or hereafter acquired by any Grantor: (a) all copyright rights in any work subject to the copyright laws of the United States or any other country, whether as author, assignee, transferee or otherwise, and (b) all registrations and applications for registration of any such copyright in the United States or any other country, including registrations, recordings, supplemental registrations and pending applications for registration in the United States Copyright Office, including those listed on Schedule I.

“Grantor” means each of Holdings V, the Issuer, SigmaTel and each other Restricted Subsidiary that is a Material Domestic Subsidiary.

“Holders” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Holdings III” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Holdings V” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Indemnitee” means the Notes Collateral Agent, together with its Affiliates, and the officers, directors, employees, agents and attorneys-in-fact of the Notes Collateral Agent and Affiliates.

“Indenture” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Intellectual Property” means all intellectual and similar property of every kind and nature now owned or hereafter acquired by any Grantor, including inventions, designs, Patents, Copyrights, Licenses, Trademarks, trade secrets, confidential or proprietary technical and business information, know-how, show-how or other data or information, the intellectual property rights in software and databases and related documentation, and all additions, improvements and accessions to, and books and records describing any of the foregoing.

“Intellectual Property Security Agreement Supplement” means an instrument in the form of Exhibit I hereto.

“Intercreditor Agreement” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Issuer” has the meaning assigned to such term in the preliminary statement of this Agreement.

“License” means any Patent License, Trademark License, Copyright License or other Intellectual Property license or sublicense agreement to which any Grantor is a party.

“New York UCC” means the Uniform Commercial Code as from time to time in effect in the State of New York.

“Notes” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Notes Collateral Agent” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Notes Documents” means the Indenture, the Notes and the Collateral Documents relating to the Notes.

“Obligations” has the meaning assigned to such term in the Indenture.

“Patent License” means any written agreement, now or hereafter in effect, granting to any third party any right to make, use or sell any invention on which a patent, now or

hereafter owned by any Grantor or that any Grantor otherwise has the right to license, is in existence, or granting to any Grantor any right to make, use or sell any invention on which a patent, now or hereafter owned by any third party, is in existence, and all rights of any Grantor under any such agreement.

“Patents” means all of the following now owned or hereafter acquired by any Grantor: (a) all letters patent of the United States or the equivalent thereof in any other country, all registrations and recordings thereof, and all applications for letters patent of the United States or the equivalent thereof in any other country, including registrations, recordings and pending applications in the United States Patent and Trademark Office or any similar offices in any other country, including those listed on Schedule I, and (b) all reissues, continuations, divisions, continuations-in-part, renewals or extensions thereof, and the inventions disclosed or claimed therein, including the right to make, use and/or sell the inventions disclosed or claimed therein.

“Perfection Certificate” means a certificate substantially in the form of Exhibit II to the Security Agreement, completed and supplemented with the schedules and attachments contemplated thereby, and duly executed by the chief financial officer and the chief legal officer of each of Holdings III, Holdings IV, Holdings V, SigmaTel and the Issuer.

“Proceeds” has the meaning specified in Section 9-102 of the New York UCC.

“Secured Parties” means, collectively, the Notes Collateral Agent, the Holders and the Trustee to the Indenture.

“Security Interest” has the meaning assigned to such term in Section 2.01(a).

“SigmaTel” has the meaning assigned to such term in the preliminary statement of this Agreement.

“Trademark License” means any written agreement, now or hereafter in effect, granting to any third party any right to use any trademark now or hereafter owned by any Grantor or that any Grantor otherwise has the right to license, or granting to any Grantor any right to use any trademark now or hereafter owned by any third party, and all rights of any Grantor under any such agreement.

“Trademarks” means all of the following now owned or hereafter acquired by any Grantor: (a) all trademarks, service marks, trade names, corporate names, company names, business names, fictitious business names, trade styles, trade dress, logos, other source or business identifiers, designs and general intangibles of like nature, now existing or hereafter adopted or acquired, all registrations and recordings thereof, and all registration and recording applications filed in connection therewith, including registrations and registration applications in the United States Patent and Trademark Office or any similar offices in any State of the United States or any other country or any political subdivision thereof, and all extensions or renewals thereof, including those listed on Schedule I, (b) all goodwill connected with the use of and symbolized thereby and (c) all other assets, rights and interests that uniquely reflect or embody such goodwill.

ARTICLE II

SECURITY INTERESTS

SECTION 2.01. Security Interest. (a) As security for the payment or performance, as the case may be, in full of the Obligations, including the Guarantees, each Grantor hereby assigns and pledges to the Notes Collateral Agent, its successors and assigns, for the benefit of the Secured Parties, and hereby grants to the Notes Collateral Agent, its successors and assigns, for the benefit of the Secured Parties, a security interest (the “Security Interest”) in all right, title or interest in or to any and all of the following assets and properties now owned or at any time hereafter acquired by such Grantor or in which such Grantor now has or at any time in the future may acquire any right, title or interest (collectively, the “Collateral”):

(i) all Copyrights;

(ii) all Patents;

(iii) all Trademarks;

(iv) all Licenses;

(v) all other Intellectual Property; and

(vi) all Proceeds and products of any and all of the foregoing and all collateral security and guarantees given by any Person with respect to any of the foregoing.

provided, however, that notwithstanding any of the other provisions herein (and notwithstanding any recording of the Notes Collateral Agent’s Lien made in the U.S. Patent and Trademark Office, U.S. Copyright Office, or other IP registry office), this Agreement shall not constitute a grant of a security interest in any property to the extent that such grant of a security interest is prohibited by any rule of law, statute or regulation or is prohibited by, or constitutes a breach or default under or results in the termination of any contract, license, agreement, instrument or other document evidencing or giving rise to such property, or would result in the forfeiture of the Grantors’ rights in the property including, without limitation, any Trademark applications filed in the United States Patent and Trademark Office on the basis of such Grantor’s “intent-to-use” such trademark, unless and until acceptable evidence of use of the Trademark has been filed with the United States Patent and Trademark Office pursuant to Section 1(c) or Section 1(d) of the ▇▇▇▇▇▇ Act (15 U.S.C. 1051, et seq.), to the extent that granting a lien in such Trademark application prior to such filing would adversely affect the enforceability or validity of such Trademark application.

(b) Each Grantor hereby irrevocably authorizes the Notes Collateral Agent for the benefit of the Secured Parties at any time and from time to time to file in any relevant jurisdiction any initial financing statements with respect to the Collateral or any part thereof and amendments thereto that contain the information required by Article 9 of the Uniform

Commercial Code or the analogous legislation of each applicable jurisdiction for the filing of any financing statement or amendment, including whether such Grantor is an organization, the type of organization and any organizational identification number issued to such Grantor. Each Grantor agrees to provide such information to the Notes Collateral Agent promptly upon request.

The Notes Collateral Agent is further authorized to file with the United States Patent and Trademark Office or United States Copyright Office (or any successor office or any similar office in any other country) such documents as may be necessary or advisable for the purpose of perfecting, confirming, continuing, enforcing or protecting the Security Interest granted by each Grantor, without the signature of any Grantor, and naming any Grantor or the Grantors as debtors and the Notes Collateral Agent as secured party.

(c) The Security Interest is granted as security only and shall not subject the Notes Collateral Agent or any other Secured Party to, or in any way alter or modify, any obligation or liability of any Grantor with respect to or arising out of the Collateral.

SECTION 2.02. Representations and Warranties. Holdings V, the Issuer and SigmaTel jointly and severally represent and warrant, as to themselves and the other Grantors, to the Notes Collateral Agent and the other Secured Parties that:

(a) Except as would not be expected to have a Material Adverse Effect, each Grantor has good and valid rights in and title to (or with respect to the Patents set forth on Schedule II hereto, a joint ownership interest in) the Collateral with respect to which it has purported to grant a Security Interest hereunder and has full power and authority to grant to the Notes Collateral Agent the Security Interest in such Collateral pursuant hereto and to execute, deliver and perform its obligations in accordance with the terms of this Agreement, without the consent or approval of any other Person other than any consent or approval that has been obtained.

(i) The Perfection Certificate has been duly prepared, completed and executed and the information set forth therein, including the exact legal name of each Grantor, is correct and complete in all material respects as of the Closing Date.

(ii) The Uniform Commercial Code financing statements (including fixture filings, as applicable) or other appropriate filings, recordings or registrations prepared by the Notes Collateral Agent based upon the information provided to the Notes Collateral Agent in the Perfection Certificate for filing in each governmental, municipal or other office specified in Schedule 6 to the Perfection Certificate (or specified by notice from the Issuer to the Notes Collateral Agent after the Closing Date in the case of filings, recordings or registrations required by the Indenture), are all the filings, recordings and registrations (other than filings required to be made in the United States Patent and Trademark Office and the United States Copyright Office in order to perfect the Security Interest in Collateral consisting of United States Patents, Trademarks and Copyrights) that are necessary to establish a valid and perfected security interest in favor of the Notes Collateral Agent (for the benefit of the Secured Parties) in respect of all Collateral in which the Security Interest may be perfected by filing, recording or registration in the United States (or any political subdivision thereof) and its territories and possessions, and

no further or subsequent filing, refiling, recording, rerecording, registration or reregistration is necessary in any such jurisdiction, except as provided under applicable law with respect to the filing of continuation statements.

(iii) Each Grantor represents and warrants that a fully executed agreement in the form hereof and containing a description of all Collateral consisting of United States Patents and United States registered Trademarks (and Trademarks for which United States registration applications are pending) and United States registered Copyrights have been delivered to the Notes Collateral Agent for recording by the United States Patent and Trademark Office and the United States Copyright Office pursuant to 35 U.S.C. § 261, 15 U.S.C. § 1060 or 17 U.S.C. § 205 and the regulations thereunder, as applicable, and otherwise as may be required pursuant to the laws of any other necessary jurisdiction, to establish a valid and perfected security interest in favor of the Notes Collateral Agent (for the benefit of the Secured Parties) in respect of all Collateral consisting of Patents, Trademarks and Copyrights in which a security interest may be perfected by filing, recording or registration in the United States (or any political subdivision thereof) and its territories and possessions under the Federal intellectual property laws, and no further or subsequent filing, refiling, recording, rerecording, registration or reregistration is necessary (other than such filings and actions as are necessary to perfect the Security Interest with respect to (i) any Collateral consisting of Patents, Trademarks and Copyrights (or registration or application for registration thereof) acquired or developed by any Grantor after the date hereof), (ii) as may be required under the laws of jurisdictions outside the United States with respect to Collateral created under such laws, and (iii) the Uniform Commercial Code financing and continuation statements contemplated in subsection (i) of this Section 2.02(a).

(b) The Security Interest constitutes (i) a valid security interest in all the Collateral securing the payment and performance of the Obligations, (ii) subject to the filings described in Section 2.02(b), a perfected security interest in all Collateral in which a security interest may be perfected by filing, recording or registering a financing statement or analogous document in the United States (or any political subdivision thereof) and its territories and possessions pursuant to the Uniform Commercial Code and (iii) a security interest that shall be perfected in all Collateral in which a security interest may be perfected upon the receipt and recording of this Agreement (or a fully executed short form agreement in form and substance reasonably satisfactory to the Notes Collateral Agent and the Issuer) with the United States Patent and Trademark Office and the United States Copyright Office, as applicable, within the three-month period (commencing as of the date hereof) pursuant to 35 U.S.C. § 261 or 15 U.S.C. § 1060 or the one-month period (commencing as of the date hereof) pursuant to 17 U.S.C. § 205 and otherwise as may be required pursuant to the laws of any other necessary jurisdiction. The Security Interest is and shall be prior to any other Lien on any of the Collateral, other than (i) any nonconsensual Lien that is expressly permitted pursuant to Section 4.12 of the Indenture and has priority as a matter of law and (ii) Liens expressly permitted pursuant to Section 4.12 of the Indenture.

(c) The Collateral, which is purported to be owned in whole or in part by the Grantors, is owned by the Grantors free and clear of any Lien, except for Liens expressly permitted pursuant to Section 4.12 of the Indenture. None of the Grantors has filed or consented

to the filing of (i) any financing statement or analogous document under the Uniform Commercial Code or any other applicable laws covering any Collateral, (ii) any assignment in which any Grantor assigns any Collateral or any security agreement or similar instrument covering any Collateral with the United States Patent and Trademark Office or the United States Copyright Office or (iii) any assignment in which any Grantor assigns any Collateral or any security agreement or similar instrument covering any Collateral with any foreign governmental, municipal or other office, which financing statement or analogous document, assignment, security agreement or similar instrument is still in effect, except, in each case, for Liens expressly permitted pursuant to Section 4.12 of the Indenture and Liens that are no longer effective.

SECTION 2.03. Covenants.

(a) The Issuer agrees promptly to notify the Notes Collateral Agent in writing of any change (i) in legal name of any Grantor, (ii) in the identity or type of organization or corporate structure of any Grantor, or (iii) in the jurisdiction of organization of any Grantor.

(b) Each Grantor shall, at its own expense, take any and all commercially reasonable actions necessary to defend title to the Collateral against all Persons and to defend the Security Interest of the Notes Collateral Agent in the Collateral and the priority thereof against any Lien not expressly permitted pursuant to Section 4.12 of the Indenture.

(c) Each year, at the time of delivery of annual financial statements with respect to the preceding fiscal year pursuant to Section 4.03 of the Indenture, the Issuer shall deliver to the Notes Collateral Agent a certificate executed by the chief financial officer and the chief legal officer of the Issuer setting forth the information required pursuant to Sections 1(a), 1(c), 1(d), 2(b) and 12 of the Perfection Certificate or confirming that there has been no change in such information since the date of such certificate or the date of the most recent certificate delivered pursuant to this Section 2.03(c).

(d) The Issuer agrees, on its own behalf and on behalf of each other Grantor, at its own expense, to execute, acknowledge, deliver and cause to be duly filed all such further instruments and documents and take all such actions as the Notes Collateral Agent may from time to time reasonably request to better assure, preserve, protect and perfect the Security Interest and the rights and remedies created hereby, including the payment of any fees and taxes required in connection with the execution and delivery of this Agreement, the granting of the Security Interest and the filing of any financing statements or other documents in connection herewith or therewith. Subject to the terms of the Intercreditor Agreement, if any amount payable under or in connection with any of the Collateral that is in excess of $10,000,000 shall be or become evidenced by any promissory note or other instrument, such note or instrument shall be promptly pledged and delivered to the Notes Collateral Agent, for the benefit of the Secured Parties, duly endorsed in a manner reasonably satisfactory to the Notes Collateral Agent.

Without limiting the generality of the foregoing, each Grantor hereby authorizes the Notes Collateral Agent, with prompt notice thereof to the Grantors, to supplement this Agreement by supplementing Schedule I or adding additional schedules hereto to specifically identify any asset or item that may constitute Copyrights, Patents or Trademarks; provided that

any Grantor shall have the right, exercisable within 10 days after it has been notified by the Notes Collateral Agent of the specific identification of such Collateral, to advise the Notes Collateral Agent in writing of any inaccuracy of the representations and warranties made by such Grantor hereunder with respect to such Collateral. Each Grantor agrees that it will use its best efforts to take such action as shall be necessary in order that all representations and warranties hereunder shall be true and correct with respect to such Collateral within 30 days after the date it has been notified by the Notes Collateral Agent of the specific identification of such Collateral.

(e) Subject to the terms of the Intercreditor Agreement, at its option, the Notes Collateral Agent may discharge past due taxes, assessments, charges, fees, Liens, security interests or other encumbrances at any time levied or placed on the Collateral and not permitted pursuant to Section 4.12 of the Indenture, and may pay for the maintenance and preservation of the Collateral to the extent any Grantor fails to do so as required by the Indenture or this Agreement and within a reasonable period of time after the Notes Collateral Agent has requested that it do so, and each Grantor jointly and severally agrees to reimburse the Notes Collateral Agent within 10 days after demand for any payment made or any reasonable expense incurred by the Notes Collateral Agent pursuant to the foregoing authorization; provided, however, Grantors shall not be obligated to reimburse the Notes Collateral Agent with respect to any Intellectual Property Collateral which any Grantor has failed to maintain or pursue, or otherwise allowed to lapse, terminate or be put into the public domain, in accordance with Section 2.04(f). Nothing in this paragraph shall be interpreted as excusing any Grantor from the performance of, or imposing any obligation on the Notes Collateral Agent or any Secured Party to cure or perform, any covenants or other promises of any Grantor with respect to taxes, assessments, charges, fees, Liens, security interests or other encumbrances and maintenance as set forth herein or in the other Notes Documents.

(f) Each Grantor (rather than the Notes Collateral Agent or any Secured Party) shall remain liable (as between itself and any relevant counterparty) to observe and perform all the conditions and obligations to be observed and performed by it under each contract, agreement or instrument relating to the Collateral, all in accordance with the terms and conditions thereof, and each Grantor jointly and severally agrees to indemnify and hold harmless the Notes Collateral Agent and the other Secured Parties from and against any and all liability for such performance.

SECTION 2.04. Additional Covenants.

(a) Except to the extent failure to act could not reasonably be expected to have a Material Adverse Effect, with respect to registration or pending application of each item of its Collateral for which such Grantor has standing to do so, each Grantor agrees to take, at its expense, all reasonable steps, including, without limitation, in the U.S. Patent and Trademark Office, the U.S. Copyright Office and any other governmental authority located in the United States, to (i) maintain the validity and enforceability of any registered Collateral (or applications therefor) and maintain such Collateral in full force and effect, and (ii) pursue the registration and maintenance of each Patent, Trademark, or Copyright registration or application, now or hereafter included in such Collateral of such Grantor, including, without limitation, the payment of required fees and taxes, the filing of responses to office actions issued by the U.S. Patent and Trademark Office, the U.S. Copyright Office or other governmental authorities, the filing of

applications for renewal or extension, the filing of affidavits under Sections 8 and 15 or the U.S. Trademark Act, the filing of divisional, continuation, continuation-in-part, reissue and renewal applications or extensions, the payment of maintenance fees and the participation in interference, reexamination, opposition, cancellation, infringement and misappropriation proceedings.

(b) Except as could not reasonably be expected to have a Material Adverse Effect, no Grantor shall do or permit any act or knowingly omit to do any act whereby any of its Collateral may lapse, be terminated, or become invalid or unenforceable or placed in the public domain (or in the case of a trade secret, becomes publicly known).

(c) Except where failure to do so could not reasonably be expected to have a Material Adverse Effect, each Grantor shall take all reasonable steps to preserve and protect each item of its Collateral, including, without limitation, maintaining the quality of any and all products or services used or provided in connection with any of the Trademarks, consistent with the quality of the products and services as of the date hereof, and taking all reasonable steps necessary to ensure that all licensed users of any of the Trademarks abide by the applicable license’s terms with respect to the standards of quality.

(d) Each Grantor agrees that, should it obtain an ownership or other interest in any Collateral after the Closing Date (“After-Acquired Intellectual Property”) (i) the provisions of this Agreement shall automatically apply thereto, and (ii) any such After-Acquired Intellectual Property shall automatically become part of the Collateral subject to the terms and conditions of this Agreement with respect thereto.

(e) Once every fiscal quarter of the Issuer, with respect to issued or registered Patents (or published applications therefor), Trademarks (or applications therefor), and registered Copyrights, each Grantor shall sign and deliver to the Notes Collateral Agent an appropriate supplemental Intellectual Property Security Agreement with respect to all applicable Intellectual Property owned by it as of the last day of such period, to the extent that such Intellectual Property is not covered by any previous Intellectual Property Security Agreement so signed and delivered by it. In each case, it will promptly cooperate as reasonably necessary to enable the Notes Collateral Agent to make any necessary or reasonably desirable recordations with the U.S. Copyright Office or the U.S. Patent and Trademark Office, as appropriate.

(f) Nothing in this Agreement prevents any Grantor from disposing of, discontinuing the use or maintenance of, failing to pursue, or otherwise allowing to lapse, terminate or be put into the public domain, any of its Collateral to the extent permitted by the Indenture if such Grantor determines in its reasonable business judgment that such discontinuance is desirable in the conduct of its business.

ARTICLE III

REMEDIES

SECTION 3.01. Remedies Upon Default. Subject to the terms of the Intercreditor Agreement, if an Event of Default occurs and is continuing, each Grantor agrees to deliver each item of Collateral to the Notes Collateral Agent on demand, and it is agreed that the

Notes Collateral Agent shall have the right, at the same or different times, with respect to any Collateral, on demand, to cause the Security Interest to become an assignment, transfer and conveyance of any of or all such Collateral by the applicable Grantors to the Notes Collateral Agent, or to license or sublicense, whether general, special or otherwise, and whether on an exclusive or nonexclusive basis, any such Collateral throughout the world on such terms and conditions and in such manner as the Notes Collateral Agent shall determine (other than in violation of any then-existing licensing arrangements to the extent that waivers cannot be obtained), and, generally, to exercise any and all rights afforded to a secured party with respect to the Obligations under the Uniform Commercial Code or other applicable law. Without limiting the generality of the foregoing, each Grantor agrees that the Notes Collateral Agent shall have the right, subject to the mandatory requirements of applicable law and the notice requirements described below, to sell or otherwise dispose of all or any part of the Collateral securing the Obligations at a public or private sale, for cash, upon credit or for future delivery as the Notes Collateral Agent shall deem appropriate. Each such purchaser at any sale of Collateral shall hold the property sold absolutely, free from any claim or right on the part of any Grantor, and each Grantor hereby waives (to the extent permitted by law) all rights of redemption, stay and appraisal which such Grantor now has or may at any time in the future have under any rule of law or statute now existing or hereafter enacted.

The Notes Collateral Agent shall give the applicable Grantors 10 days’ written notice (which each Grantor agrees is reasonable notice within the meaning of Section 9-611 of the New York UCC or its equivalent in other jurisdictions) of the Notes Collateral Agent’s intention to make any sale of Collateral. Such notice, in the case of a public sale, shall state the time and place for such sale. Any such public sale shall be held at such time or times within ordinary business hours and at such place or places as the Notes Collateral Agent may fix and state in the notice (if any) of such sale. At any such sale, the Collateral, or portion thereof, to be sold may be sold in one lot as an entirety or in separate parcels, as the Notes Collateral Agent may (in its sole and absolute discretion) determine. The Notes Collateral Agent shall not be obligated to make any sale of any Collateral if it shall determine not to do so, regardless of the fact that notice of sale of such Collateral shall have been given. The Notes Collateral Agent may, without notice or publication, adjourn any public or private sale or cause the same to be adjourned from time to time by announcement at the time and place fixed for sale, and such sale may, without further notice, be made at the time and place to which the same was so adjourned. In case any sale of all or any part of the Collateral is made on credit or for future delivery, the Collateral so sold may be retained by the Notes Collateral Agent until the sale price is paid by the purchaser or purchasers thereof, but the Notes Collateral Agent shall not incur any liability in case any such purchaser or purchasers shall fail to take up and pay for the Collateral so sold and, in case of any such failure, such Collateral may be sold again upon like notice. At any public (or, to the extent permitted by law, private) sale made pursuant to this Agreement, any Secured Party may bid for or purchase, free (to the extent permitted by law) from any right of redemption, stay, valuation or appraisal on the part of any Grantor (all said rights being also hereby waived and released to the extent permitted by law), the Collateral or any part thereof offered for sale and may make payment on account thereof by using any claim then due and payable to such Secured Party from any Grantor as a credit against the purchase price, and such Secured Party may, upon compliance with the terms of sale, hold, retain and dispose of such property without further accountability to any Grantor therefor. For purposes hereof, a written agreement to purchase the Collateral or any portion thereof shall be treated as a sale thereof; the Notes Collateral Agent

shall be free to carry out such sale pursuant to such agreement and no Grantor shall be entitled to the return of the Collateral or any portion thereof subject thereto, notwithstanding the fact that after the Notes Collateral Agent shall have entered into such an agreement all Events of Default shall have been remedied and the Obligations paid in full. As an alternative to exercising the power of sale herein conferred upon it, the Notes Collateral Agent may proceed by a suit or suits at law or in equity to foreclose this Agreement and to sell the Collateral or any portion thereof pursuant to a judgment or decree of a court or courts having competent jurisdiction or pursuant to a proceeding by a court-appointed receiver. Any sale pursuant to the provisions of this Section 3.01 shall be deemed to conform to the commercially reasonable standards as provided in Section 9-610(b) of the New York UCC or its equivalent in other jurisdictions.

SECTION 3.02. Application of Proceeds.

(a) Subject to the terms of the Intercreditor Agreement, the Notes Collateral Agent shall apply the proceeds of any collection or sale of Collateral, including any Collateral consisting of cash, as follows:

First, to pay Obligations in respect of incurred and unpaid fees and expenses of the Notes Collateral Agent and the Trustee under the Notes Documents;

Second, towards payment of amounts then due and owing and remaining unpaid in respect of the Obligations, pro rata among the Secured Parties according to the amounts of the Obligations then due and owing and remaining unpaid to the Secured Parties.

Third, towards payment of any remaining Obligations, pro rata among the Secured Parties according to the amounts of the Obligations then held by the Secured Parties; and

Last, any balance remaining after the Obligations shall have been paid in full shall be paid over to the Issuer or to whomsoever may be lawfully entitled to receive the same.

The Notes Collateral Agent shall have absolute discretion as to the time of application of any such proceeds, moneys or balances in accordance with this Agreement. Upon any sale of Collateral by the Notes Collateral Agent (including pursuant to a power of sale granted by statute or under a judicial proceeding), the receipt of the Notes Collateral Agent or of the officer making the sale shall be a sufficient discharge to the purchaser or purchasers of the Collateral so sold and such purchaser or purchasers shall not be obligated to see to the application of any part of the purchase money paid over to the Notes Collateral Agent or such officer or be answerable in any way for the misapplication thereof.

(b) In making the determinations and allocations required by this Section 3.02, the Notes Collateral Agent may conclusively rely upon information supplied by the Trustee as to the amounts of unpaid principal and interest and other amounts outstanding with respect to the Obligations, and the Notes Collateral Agent shall have no liability to any of the Secured Parties for actions taken in reliance on such information, provided that nothing in this sentence shall prevent any Grantor from contesting any amounts claimed by any Secured Party in any information so supplied. All distributions made by the Notes Collateral Agent pursuant to this

Section 3.02 shall be (subject to any decree of any court of competent jurisdiction) final (absent manifest error), and the Notes Collateral Agent shall have no duty to inquire as to the application by the Trustee of any amounts distributed to it.

SECTION 3.03. Grant of License to Use Intellectual Property. For the purpose of enabling the Notes Collateral Agent to exercise rights and remedies under this Agreement at such time as the Notes Collateral Agent shall be lawfully entitled to exercise such rights and remedies, each Grantor shall, upon request by the Notes Collateral Agent at any time after and during the continuance of an Event of Default, grant to the Notes Collateral Agent an irrevocable (until the termination of the Indenture) nonexclusive license (exercisable without payment of royalty or other compensation to the Grantors) to use, license or sublicense any of the Collateral now owned or hereafter acquired by such Grantor, and wherever the same may be located, and including in such license reasonable access to all media in which any of the licensed items may be recorded or stored and to all computer software and programs used for the compilation or printout thereof; provided, however, that nothing in this Section 3.03 shall require Grantors to grant any license that is prohibited by any rule of law, statute or regulation or is prohibited by, or constitutes a breach or default under or results in the termination of any contract, license, agreement, instrument or other document evidencing, giving rise to or theretofore granted, to the extent permitted by the Indenture, with respect to such property; provided, further, that such licenses to be granted hereunder with respect to Trademarks shall be subject to the maintenance of quality standards with respect to the goods and services on which such Trademarks are used sufficient to preserve the validity of such Trademarks. The use of such license by the Notes Collateral Agent may be exercised, at the option of the Notes Collateral Agent, during the continuation of an Event of Default; provided that any license, sublicense or other transaction entered into by the Notes Collateral Agent in accordance herewith shall be binding upon the Grantors notwithstanding any subsequent cure of an Event of Default.

ARTICLE IV

INDEMNITY, SUBROGATION AND SUBORDINATION

SECTION 4.01. Indemnity. In addition to all such rights of indemnity and subrogation as the Grantors may have under applicable law (but subject to Section 4.03), the Issuer agrees that, in the event any assets of any Grantor shall be sold pursuant to this Agreement or any other Collateral Document relating to the Notes to satisfy in whole or in part an Obligation owed to any Secured Party, the Issuer shall indemnify such Grantor in an amount equal to the greater of the book value or the fair market value of the assets so sold.

SECTION 4.02. Contribution and Subrogation. Each Grantor (a “Contributing Party”) agrees (subject to Section 4.03) that, in the event assets of any other Grantor shall be sold pursuant to any Collateral Document relating to the Notes to satisfy any Obligation owed to any Secured Party, and such other Grantor (the “Claiming Party”) shall not have been fully indemnified by the Issuer as provided in Section 4.01, the Contributing Party shall indemnify the Claiming Party in an amount equal to the greater of the book value or the fair market value of such assets, in each case multiplied by a fraction of which the numerator shall be the net worth of the Contributing Party on the date hereof and the denominator shall be the aggregate net worth of all the Contributing Parties together with the net worth of the Claiming Party on the date hereof

(or, in the case of any Grantor becoming a party hereto pursuant to Section 5.14, the date of the Intellectual Property Security Agreement Supplement executed and delivered by such Grantor). Any Contributing Party making any payment to a Claiming Party pursuant to this Section 4.02 shall be subrogated to the rights of such Claiming Party to the extent of such payment.

SECTION 4.03. Subordination.

(a) Notwithstanding any provision of this Agreement to the contrary, all rights of the Grantors under Sections 4.01 and 4.02 and all other rights of indemnity, contribution or subrogation under applicable law or otherwise shall be fully subordinated to the indefeasible payment in full in cash of the Obligations. No failure on the part of the Issuer or any Grantor to make the payments required by Sections 4.01 and 4.02 (or any other payments required under applicable law or otherwise) shall in any respect limit the obligations and liabilities of any Grantor with respect to its obligations hereunder, and each Grantor shall remain liable for the full amount of the obligations of such Grantor hereunder.

(b) Each Grantor hereby agrees that upon the occurrence and during the continuance of an Event of Default and after notice from the Notes Collateral Agent all Indebtedness owed by it to any Subsidiary shall be fully subordinated to the indefeasible payment in full in cash of the Obligations.

ARTICLE V

MISCELLANEOUS

SECTION 5.01. Notices. All communications and notices hereunder, other than with respect to the Notes Collateral Agent, shall (except as otherwise expressly permitted herein) be in writing and given as provided in Section 13.01 of the Indenture. All communications and notices hereunder to any Grantor shall be given to it in care of the Issuer as provided in Section 13.01 of the Indenture. All communications and notices hereunder to the Notes Collateral Agent is duly given if in writing and delivered in person or mailed by first-class mail (registered or certified, return receipt requested), fax or overnight air courier guaranteeing next day delivery, to the Notes Collateral Agent’s address:

Citibank, N.A.

▇▇▇ ▇▇▇▇▇▇▇▇▇ ▇▇▇▇▇▇

▇▇▇ ▇▇▇▇, ▇▇ ▇▇▇▇▇

Facsimile: ▇▇▇-▇▇▇-▇▇▇▇

Telephone: ▇▇▇-▇▇▇-▇▇▇▇

Email: ▇▇▇▇▇▇▇▇▇.▇.▇▇▇▇▇@▇▇▇▇▇▇▇▇▇.▇▇▇

Additional Email: ▇▇▇▇▇▇▇▇▇▇▇▇▇▇▇@▇▇▇▇▇▇▇▇▇.▇▇▇

Attention: ▇▇▇▇ ▇▇▇▇▇

SECTION 5.02. Waivers; Amendment.

(a) (a) No failure or delay by the Notes Collateral Agent or any Secured Party in exercising any right or power hereunder or under any other Notes Document shall operate as a

waiver thereof, nor shall any single or partial exercise of any such right or power, or any abandonment or discontinuance of steps to enforce such a right or power, preclude any other or further exercise thereof or the exercise of any other right or power. The rights and remedies of the Notes Collateral Agent and the Secured Parties hereunder and under the other Notes Documents are cumulative and are not exclusive of any rights or remedies that they would otherwise have. No waiver of any provision of this Agreement or consent to any departure by any Grantor therefrom shall in any event be effective unless the same shall be permitted by paragraph (b) of this Section 5.02, and then such waiver or consent shall be effective only in the specific instance and for the purpose for which given. Without limiting the generality of the foregoing, the issuance of any Additional First Lien Debt shall not be construed as a waiver of any Default, regardless of whether the Notes Collateral Agent or any Secured Party may have had notice or knowledge of such Default at the time. No notice or demand on any Grantor in any case shall entitle any Grantor to any other or further notice or demand in similar or other circumstances.

(b) Subject to the terms of the Intercreditor Agreement and except as otherwise provided in the Indenture, neither this Agreement nor any provision hereof may be waived, amended or modified except pursuant to an agreement or agreements in writing entered into by the Notes Collateral Agent and the Grantor or Grantors with respect to which such waiver, amendment or modification is to apply, subject to any consent required in accordance with Section 9.02 of the Indenture.

SECTION 5.03. Notes Collateral Agent’s Fees and Expenses; Indemnification.

(a) The parties hereto agree that the Notes Collateral Agent shall be entitled to reimbursement of its expenses incurred hereunder.

(b) Without limitation of its indemnification obligations under the other Notes Documents, the Issuer agrees to indemnify the Notes Collateral Agent and the other Indemnitees against, and hold each Indemnitee harmless from, any and all losses, claims, damages, liabilities and related expenses, including the reasonable fees, charges and disbursements of any counsel for any Indemnitee, incurred by or asserted against any Indemnitee arising out of, in connection with, or as a result of, the execution, delivery or performance of this Agreement or any claim, litigation, investigation or proceeding relating to any of the foregoing agreement or instrument contemplated hereby, or to the Collateral, whether or not any Indemnitee is a party thereto; provided that such indemnity shall not, as to any Indemnitee, be available to the extent that such losses, claims, damages, liabilities or related expenses are determined by a court of competent jurisdiction by final and nonappealable judgment to have resulted from the gross negligence or willful misconduct of such Indemnitee or any Affiliate, director, officer, employee, counsel, agent or attorney-in-fact of such Indemnitee.

(c) Any such amounts payable as provided hereunder shall be additional Obligations secured hereby and by the other Collateral Documents relating to the Notes. The provisions of this Section 5.03 shall remain operative and in full force and effect regardless of the termination of this Agreement or any other Notes Document, the consummation of the transactions contemplated hereby, the repayment of any of the Obligations, the invalidity or unenforceability of any term or provision of this Agreement or any other Notes Document, or

any investigation made by or on behalf of the Notes Collateral Agent or any other Secured Party. All amounts due under this Section 5.03 shall be payable within 10 days of written demand therefor.

SECTION 5.04. Successors and Assigns. Whenever in this Agreement any of the parties hereto is referred to, such reference shall be deemed to include the permitted successors and assigns of such party; and all covenants, promises and agreements by or on behalf of any Grantor or the Notes Collateral Agent that are contained in this Agreement shall bind and inure to the benefit of their respective successors and assigns.

SECTION 5.05. Survival of Agreement. All covenants, agreements, representations and warranties made by the Grantors in the Notes Documents and in the certificates or other instruments prepared or delivered in connection with or pursuant to this Agreement or any other Notes Document shall be considered to have been relied upon by the Secured Parties and shall survive the execution and delivery of the Notes Documents and the issuance of any Additional First Lien Debt, regardless of any investigation made by any Secured Party or on its behalf and notwithstanding that the Notes Collateral Agent or any Secured Party may have had notice or knowledge of any Default or incorrect representation or warranty at the time any securities are issued under the Indenture, and shall continue in full force and effect as long as the principal of or any accrued interest on any Note is outstanding and unpaid.

SECTION 5.06. Counterparts; Effectiveness; Several Agreement. This Agreement may be executed in counterparts, each of which shall constitute an original but all of which when taken together shall constitute a single contract. Delivery of an executed signature page to this Agreement by facsimile transmission or other electronic communication shall be as effective as delivery of a manually signed counterpart of this Agreement. This Agreement shall become effective as to any Grantor when a counterpart hereof executed on behalf of such Grantor shall have been delivered to the Notes Collateral Agent and a counterpart hereof shall have been executed on behalf of the Notes Collateral Agent, and thereafter shall be binding upon such Grantor and the Notes Collateral Agent and their respective permitted successors and assigns, and shall inure to the benefit of such Grantor, the Notes Collateral Agent and the other Secured Parties and their respective successors and assigns, except that no Grantor shall have the right to assign or transfer its rights or obligations hereunder or any interest herein or in the Collateral (and any such assignment or transfer shall be void) except as expressly contemplated by this Agreement or the Indenture. This Agreement shall be construed as a separate agreement with respect to each Grantor and may be amended, modified, supplemented, waived or released with respect to any Grantor without the approval of any other Grantor and without affecting the obligations of any other Grantor hereunder.

SECTION 5.07. Severability. Any provision of this Agreement held to be invalid, illegal or unenforceable in any jurisdiction shall, as to such jurisdiction, be ineffective to the extent of such invalidity, illegality or unenforceability without affecting the validity, legality and enforceability of the remaining provisions hereof; and the invalidity of a particular provision in a particular jurisdiction shall not invalidate such provision in any other jurisdiction. The parties shall endeavor in good-faith negotiations to replace the invalid, illegal or unenforceable provisions with valid provisions the economic effect of which comes as close as possible to that of the invalid, illegal or unenforceable provisions.

SECTION 5.08. Right of Set-Off. Subject to the terms of the Intercreditor Agreement, in addition to any rights and remedies of the Secured Parties provided by Law, upon the occurrence and during the continuance of any Event of Default, each Secured Party and its Affiliates is authorized at any time and from time to time, without prior notice to the Issuer or any other Grantor, any such notice being waived by the Issuer (on its own behalf and on behalf of each Grantor and its Subsidiaries) to the fullest extent permitted by applicable Law, to set off and apply any and all deposits (general or special, time or demand, provisional or final) at any time held by, and other Indebtedness at any time owing by, such Secured Party and its Affiliates, as the case may be, to or for the credit or the account of the respective Grantors and their Subsidiaries against any and all Obligations owing to such Secured Party and its Affiliates hereunder or under any other Notes Document, now or hereafter existing, irrespective of whether or not such Secured Party or Affiliate shall have made demand under this Agreement or any other Notes Document and although such Obligations may be contingent or unmatured or denominated in a currency different from that of the applicable deposit or Indebtedness. Each Secured Party agrees promptly to notify the Issuer and the Trustee after any such set off and application made by such Secured Party; provided that the failure to give such notice shall not affect the validity of such setoff and application. The rights of the Trustee and each Secured Party under this Section 5.08 are in addition to other rights and remedies (including other rights of setoff) that the Trustee and such Secured Party may have.

SECTION 5.09. Governing Law; Jurisdiction; Consent to Service of Process.

(a) This Agreement shall be construed in accordance with and governed by the law of the State of New York.

(b) Each of the Grantors hereby irrevocably and unconditionally submits, for itself and its property, to the exclusive jurisdiction of the Supreme Court of the State of New York sitting in New York City and of the United States District Court of the Southern District of New York, and any appellate court from any thereof, in any action or proceeding arising out of or relating to this Agreement or any other Notes Document, or for recognition or enforcement of any judgment, and each of the parties hereto hereby irrevocably and unconditionally agrees that all claims in respect of any such action or proceeding may be heard and determined in such New York State or, to the extent permitted by law, in such Federal court. Each of the parties hereto agrees that a final judgment in any such action or proceeding shall be conclusive and may be enforced in other jurisdictions by suit on the judgment or in any other manner provided by law. Nothing in this Agreement or any other Notes Document shall affect any right that the Notes Collateral Agent or any Secured Party may otherwise have to bring any action or proceeding relating to this Agreement or any other Notes Document against any Grantor or its properties in the courts of any jurisdiction.

(c) Each of the Grantors hereby irrevocably and unconditionally waives, to the fullest extent it may legally and effectively do so, any objection which it may now or hereafter have to the laying of venue of any suit, action or proceeding arising out of or relating to this Agreement or any other Notes Document in any court referred to in paragraph (b) of this Section 5.09. Each of the parties hereto hereby irrevocably waives, to the fullest extent permitted by law, the defense of an inconvenient forum to the maintenance of such action or proceeding in any such court.

(d) Each party to this Agreement irrevocably consents to service of process in the manner provided for notices in Section 5.01. Nothing in this Agreement or any other Notes Document will affect the right of any party to this Agreement to serve process in any other manner permitted by law.

SECTION 5.10. WAIVER OF JURY TRIAL. EACH PARTY HERETO HEREBY WAIVES, TO THE FULLEST EXTENT PERMITTED BY APPLICABLE LAW, ANY RIGHT IT MAY HAVE TO A TRIAL BY JURY IN ANY LEGAL PROCEEDING DIRECTLY OR INDIRECTLY ARISING OUT OF OR RELATING TO THIS AGREEMENT, ANY OTHER NOTES DOCUMENT OR THE TRANSACTIONS CONTEMPLATED HEREBY (WHETHER BASED ON CONTRACT, TORT OR ANY OTHER THEORY). EACH PARTY HERETO (A) CERTIFIES THAT NO REPRESENTATIVE, AGENT OR ATTORNEY OF ANY OTHER PARTY HAS REPRESENTED, EXPRESSLY OR OTHERWISE, THAT SUCH OTHER PARTY WOULD NOT, IN THE EVENT OF LITIGATION, SEEK TO ENFORCE THE FOREGOING WAIVER AND (B) ACKNOWLEDGES THAT IT AND THE OTHER PARTIES HERETO HAVE BEEN INDUCED TO ENTER INTO THIS AGREEMENT BY, AMONG OTHER THINGS, THE MUTUAL WAIVERS AND CERTIFICATIONS IN THIS SECTION 5.10.

SECTION 5.11. Headings. Article and Section headings and the Table of Contents used herein are for convenience of reference only, are not part of this Agreement and are not to affect the construction of, or to be taken into consideration in interpreting, this Agreement.

SECTION 5.12. Security Interest Absolute. All rights of the Notes Collateral Agent hereunder, the Security Interest, the grant of a security interest in the Pledged Collateral and all obligations of each Grantor hereunder shall be absolute and unconditional irrespective of (a) any lack of validity or enforceability of the Indenture, any other Notes Document, any agreement with respect to any of the Obligations or any other agreement or instrument relating to any of the foregoing, (b) any change in the time, manner or place of payment of, or in any other term of, all or any of the Obligations, or any other amendment or waiver of or any consent to any departure from the Indenture, any other Notes Document or any other agreement or instrument, (c) any exchange, release or non-perfection of any Lien on other collateral, or any release or amendment or waiver of or consent under or departure from any guarantee, securing or guaranteeing all or any of the Obligations or (d) any other circumstance that might otherwise constitute a defense available to, or a discharge of, any Grantor in respect of the Obligations or this Agreement.

SECTION 5.13. Termination or Release.

(a) This Agreement, the Security Interest and all other security interests granted hereby shall terminate with respect to all Obligations (other than (x) obligations under Secured Hedge Agreements not yet due and payable, (y) Cash Management Obligations not yet due and payable and (z) contingent indemnification obligations not yet accrued and payable) when all the outstanding Obligations have been indefeasibly paid in full.

(b) A Grantor shall automatically be released from its obligations hereunder and the Security Interest in the Collateral of such Grantor shall be automatically released upon the consummation of any transaction permitted by the Indenture as a result of which such Grantor ceases to be a Subsidiary or is designated as an Unrestricted Subsidiary of Holdings III; provided that Holders of more than 50% in principal amount of the total outstanding Notes shall have consented to such transaction (to the extent required by the Indenture) and the terms of such consent did not provide otherwise.

(c) Upon any sale or other transfer by any Grantor of any Collateral (other than any transfer to another Grantor) that is permitted under the Indenture, or upon the effectiveness of any written consent to the release of the security interest granted hereby in any Collateral pursuant to Section 11.02 of the Indenture, the security interest of such Grantor in such Collateral shall be automatically released.

(d) A Grantor (other than Holdings V and the Issuer) shall automatically be released from its obligations hereunder and the Security Interest in the Collateral of such Grantor shall be automatically released if such Grantor ceases to be a Material Domestic Subsidiary.

(e) If the security interest on any Collateral is released pursuant to Section 2.04 of the Intercreditor Agreement and such release results in the release of the security interest on such Collateral under this Agreement or any Collateral Document relating to the Notes, the security interest on such Collateral granted hereunder or under any such Collateral Document relating to the Notes shall be automatically released.

(f) In connection with any termination or release pursuant to paragraph (a), (b) or (c) of this Section 5.13, the Notes Collateral Agent shall execute and deliver to any Grantor, at such Grantor’s expense, all documents that such Grantor shall reasonably request to evidence such termination or release. Any execution and delivery of documents pursuant to this Section 6.13 shall be without recourse to or warranty by the Notes Collateral Agent.

(g) In the event that any of the Collateral shall be transferred by any Grantor in connection with the Foreign Reorganization, the Security Interest granted hereunder on such Collateral shall automatically be discharged and released and all rights to such Collateral shall revert to the applicable Grantor without any further action by the Notes Collateral Agent or any other Person. Without prejudice to the foregoing, upon the request of the applicable Grantor, the Notes Collateral Agent, at the expense of such Grantor, shall promptly execute and deliver to such Grantor, all releases, termination statements, stock certificates, any certificated securities or any other documents necessary or desirable for the release of the Security Interest on such Collateral.

SECTION 5.14. Additional Restricted Subsidiaries. Pursuant to Section 11.05 of the Indenture, certain Restricted Subsidiaries of Holdings III that were not in existence or not Secured Guarantors on the date of the Indenture are required to enter in this Agreement as Grantors upon becoming Secured Guarantors. Upon execution and delivery by the Notes Collateral Agent and a Restricted Subsidiary of an Intellectual Property Security Agreement Supplement, such Restricted Subsidiary shall become a Grantor hereunder with the same force and effect as if originally named as a Grantor herein. The execution and delivery of any such

instrument shall not require the consent of any other Grantor hereunder. The rights and obligations of each Grantor hereunder shall remain in full force and effect notwithstanding the addition of any new Grantor as a party to this Agreement.

SECTION 5.15. General Authority of the Notes Collateral Agent. By acceptance of the benefits of this Agreement and any other Collateral Documents relating to the Notes, each Secured Party (whether or not a signatory hereto) shall be deemed irrevocably (a) to consent to the appointment of the Notes Collateral Agent as its agent hereunder and under such other Collateral Documents relating to the Notes, (b) to confirm that the Notes Collateral Agent shall have the authority to act as the exclusive agent of such Secured Party for the enforcement of any provisions of this Agreement and such other Collateral Documents relating to the Notes against any Grantor, the exercise of remedies hereunder or thereunder and the giving or withholding of any consent or approval hereunder or thereunder relating to any Collateral or any Grantor’s obligations with respect thereto, (c) to agree that it shall not take any action to enforce any provisions of this Agreement or any other Collateral Document relating to the Notes against any Grantor, to exercise any remedy hereunder or thereunder or to give any consents or approvals hereunder or thereunder except as expressly provided in this Agreement or any other Collateral Document relating to the Notes and (d) to agree to be bound by the terms of this Agreement and any other Collateral Documents relating to the Notes.

SECTION 5.16. Notes Collateral Agent Appointed Attorney-in-Fact. Each Grantor hereby appoints the Notes Collateral Agent the attorney-in-fact of such Grantor for the purpose of carrying out the provisions of this Agreement and taking any action and executing any instrument that the Notes Collateral Agent may deem necessary or advisable to accomplish the purposes hereof at any time after and during the continuance of an Event of Default, which appointment is irrevocable (until the termination of the Indenture) and coupled with an interest. Without limiting the generality of the foregoing, the Notes Collateral Agent shall have the right, upon the occurrence and during the continuance of an Event of Default and notice by the Notes Collateral Agent to the Issuer of its intent to exercise such rights, with full power of substitution either in the Notes Collateral Agent’s name or in the name of such Grantor (a) to receive, endorse, assign and/or deliver any and all notes, acceptances, checks, drafts, money orders or other evidences of payment relating to the Collateral or any part thereof; (b) to demand, collect, receive payment of, give receipt for and give discharges and releases of all or any of the Collateral; (c) to commence and prosecute any and all suits, actions or proceedings at law or in equity in any court of competent jurisdiction to collect or otherwise realize on all or any of the Collateral or to enforce any rights in respect of any Collateral; (d) to settle, compromise, compound, adjust or defend any actions, suits or proceedings relating to all or any of the Collateral; and (e) to use, sell, assign, transfer, pledge, make any agreement with respect to or otherwise deal with all or any of the Collateral, and to do all other acts and things necessary to carry out the purposes of this Agreement, as fully and completely as though the Notes Collateral Agent were the absolute owner of the Collateral for all purposes; provided that nothing herein contained shall be construed as requiring or obligating the Notes Collateral Agent to make any commitment or to make any inquiry as to the nature or sufficiency of any payment received by the Notes Collateral Agent, or to present or file any claim or notice, or to take any action with respect to the Collateral or any part thereof or the moneys due or to become due in respect thereof or any property covered thereby. The Notes Collateral Agent and the other Secured Parties shall be accountable only for amounts actually received as a result of the exercise of the

powers granted to them herein, and neither they nor their officers, directors, employees or agents shall be responsible to any Grantor for any act or failure to act hereunder, except for their own gross negligence or wilful misconduct or that of any of their Affiliates, directors, officers, employees, counsel, agents or attorneys-in-fact.

IN WITNESS WHEREOF, the parties hereto have duly executed this Agreement as of the day and year first above written.


FREESCALE SEMICONDUCTOR INC.,

By:	/s/ ▇▇▇▇▇ ▇▇▇▇▇▇
	Name:	▇▇▇▇▇ ▇▇▇▇▇▇
	Title:	Vice President and Treasurer

FREESCALE SEMICONDUCTOR HOLDINGS V, INC.,

By:	/s/ ▇▇▇▇▇ ▇▇▇▇▇▇
	Name:	▇▇▇▇▇ ▇▇▇▇▇▇
	Title:	Treasurer

SIGMATEL, LLC,

By:	Freescale Semiconductor, Inc.,
	as its Sole Member

By:	/s/ ▇▇▇▇▇ ▇▇▇▇▇▇
	Name:	▇▇▇▇▇ ▇▇▇▇▇▇
	Title:	Vice President and Treasurer of the Sole Member

[Intellectual Property Security Agreement]


CITIBANK, N.A.
as Notes Collateral Agent

By:	/s/ ▇▇▇▇▇▇▇ ▇. ▇▇▇▇▇▇▇▇
	Name:	▇▇▇▇▇▇▇ ▇. ▇▇▇▇▇▇▇▇
	Title:	Vice President

[Intellectual Property Security Agreement]

Exhibit I to the

Intellectual Property

Security Agreement

SUPPLEMENT NO. dated as of [ ] (this “Supplement”), to the Intellectual Property Security Agreement, dated as of February 19, 2010, among FREESCALE SEMICONDUCTOR, INC., a Delaware corporation (the “Issuer”), FREESCALE SEMICONDUCTOR HOLDINGS V, INC., a Delaware corporation (“Holdings V”), SIGMATEL, LLC, a Delaware limited liability company (“SigmaTel”), the Subsidiaries of FREESCALE SEMICONDUCTOR HOLDINGS III, LTD. (“Holdings III”) from time to time party thereto and CITIBANK, N.A., as collateral agent for the Secured Parties (as defined below) (in such capacity, the “Notes Collateral Agent”).

A. Reference is made to the Indenture dated as of February 19, 2010 (as amended, supplemented or otherwise modified from time to time, the “Indenture”), among the Issuer, Holdings V, SigmaTel, the other Guarantors named therein and The Bank of New York Mellon Trust Company, N.A., as trustee (the “Trustee”), pursuant to which the Issuer has issued $750,000,000 aggregate principal amount of 10¹/8% Senior Secured Notes due 2018 (the “Notes”) to the holders thereof (the “Holders”).

B. Capitalized terms used herein and not otherwise defined herein shall have the meanings assigned to such terms in the Indenture and the Intellectual Property Security Agreement referred to therein.

C. The Grantors have entered into the Intellectual Property Security Agreement in order to induce the Holders to purchase the Notes and the Trustee to enter into the Indenture. Section 5.14 of the Intellectual Property Security Agreement provides that additional Restricted Subsidiaries of Holdings III may become Grantors under the Intellectual Property Security Agreement by execution and delivery of an instrument in the form of this Supplement. The undersigned Restricted Subsidiary (the “New Subsidiary”) is executing this Supplement in accordance with the requirements of Indenture to become a Grantor under the Intellectual Property Security Agreement.

Accordingly, the Notes Collateral Agent and the New Subsidiary agree as follows:

SECTION 1.

(a) In accordance with Section 5.14 of the Intellectual Property Security Agreement, the New Subsidiary by its signature below becomes a Grantor under the Intellectual Property Security Agreement with the same force and effect as if originally named therein as a Grantor and the New Subsidiary hereby (a) agrees to all the terms and provisions of the Intellectual Property Security Agreement applicable to it as a Grantor thereunder and (b) represents and warrants that the representations and warranties made by it as a Grantor thereunder are true and correct on and as of the date hereof. In furtherance of the foregoing, each reference to a “Grantor” in the Intellectual Property Security Agreement shall be deemed to

Exhibit I-1

include the New Subsidiary. The Intellectual Property Security Agreement is hereby incorporated herein by reference.

(b) As security for the payment or performance, as the case may be, in full of the Obligations, including the Guarantees, the New Subsidiary hereby assigns and pledges to the Notes Collateral Agent, its successors and assigns, for the benefit of the Secured Parties, and hereby grants to the Notes Collateral Agent, its successors and assigns, for the benefit of the Secured Parties, a security interest (the “Security Interest”) in all right, title or interest in or to any and all of the following assets and properties now owned or at any time hereafter acquired by such Grantor or in which such Grantor now has or at any time in the future may acquire any right, title or interest (collectively, the “Collateral”):

(i) all copyright rights in any work subject to the copyright laws of the United States or any other country, whether as author, assignee, transferee or otherwise, and (y) all registrations and applications for registration of any such copyright in the United States or any other country, including registrations, recordings, supplemental registrations and pending applications for registration in the United States Copyright Office, including those listed on Schedule I hereto;

(ii) all letters patent of the United States or the equivalent thereof in any other country, all registrations and recordings thereof, and all applications for letters patent of the United States or the equivalent thereof in any other country, including registrations, recordings and pending applications in the United States Patent and Trademark Office or any similar offices in any other country, including those listed on Schedule I hereto and (y) all reissues, continuations, divisions, continuations-in-part, renewals or extensions thereof, and the inventions disclosed or claimed therein, including the right to make, use and/or sell the inventions disclosed or claimed therein;

(iii) all trademarks, service marks, trade names, corporate names, company names, business names, fictitious business names, trade styles, trade dress, logos, other source or business identifiers, designs and general intangibles of like nature, now existing or hereafter adopted or acquired, all registrations and recordings thereof, and all registration and recording applications filed in connection therewith, including registrations and registration applications in the United States Patent and Trademark Office or any similar offices in any State of the United States or any other country or any political subdivision thereof, and all extensions or renewals thereof, including those listed on Schedule I hereto, (y) all goodwill connected with the use of and symbolized thereby and (z) all other assets, rights and interests that uniquely reflect or embody such goodwill;

(iv) all Patent Licenses, Trademark Licenses, Copyright Licenses or other Intellectual Property licenses or sublicense agreements to which the New Subsidiary is a party;

(v) all other Intellectual Property; and

Exhibit I-2

(vi) all Proceeds and products of any and all of the foregoing and all collateral security and guarantees given by any Person with respect to any of the foregoing;

provided, however, that notwithstanding any of the other provisions herein (and notwithstanding any recording of the Notes Collateral Agent’s Lien made in the U.S. Patent and Trademark Office, U.S. Copyright Office, or other IP registry office), this Agreement shall not constitute a grant of a security interest in any property to the extent that such grant of a security interest is prohibited by any rule of law, statute or regulation or is prohibited by, or constitutes a breach or default under or results in the termination of any contract, license, agreement, instrument or other document evidencing or giving rise to such property, or would result in the forfeiture of the New Subsidiary’s rights in the property including, without limitation: any Trademark applications filed in the United States Patent and Trademark Office on the basis of such Grantor’s “intent-to-use” such trademark, unless and until acceptable evidence of use of the Trademark has been filed with the United States Patent and Trademark Office pursuant to Section 1(c) or Section 1(d) of the ▇▇▇▇▇▇ Act (15 U.S.C. 1051, et seq.), to the extent that granting a lien in such Trademark application prior to such filing would adversely affect the enforceability or validity of such Trademark application.

(c) The New Subsidiary hereby irrevocably authorizes the Notes Collateral Agent for the benefit of the Secured Parties at any time and from time to time to file in any relevant jurisdiction any initial financing statements with respect to the Collateral or any part thereof and amendments thereto that contain the information required by Article 9 of the Uniform Commercial Code or the analogous legislation of each applicable jurisdiction for the filing of any financing statement or amendment, including whether such Grantor is an organization, the type of organization and any organizational identification number issued to such Grantor. The New Subsidiary agrees to provide such information to the Notes Collateral Agent promptly upon request. The Notes Collateral Agent is further authorized to file with the United States Patent and Trademark Office or United States Copyright Office (or any successor office or any similar office in any other country) such documents as may be necessary or advisable for the purpose of perfecting, confirming, continuing, enforcing or protecting the Security Interest granted by the New Subsidiary, without the signature of any Grantor, and naming any Grantor or the Grantors as debtors and the Notes Collateral Agent as secured party.

(d) The Security Interest is granted as security only and shall not subject the Notes Collateral Agent or any other Secured Party to, or in any way alter or modify, any obligation or liability of any Grantor with respect to or arising out of the Collateral.

SECTION 2. The New Subsidiary represents and warrants to the Notes Collateral Agent and the other Secured Parties that this Supplement has been duly authorized, executed and delivered by it and constitutes its legal, valid and binding obligation, enforceable against it in accordance with its terms, except as such enforceability may be limited by Debtor Relief Laws and by general principles of equity.

Exhibit I-3

SECTION 3. This Supplement may be executed in counterparts (and by different parties hereto on different counterparts), each of which shall constitute an original, but all of which when taken together shall constitute a single contract. This Supplement shall become effective when the Notes Collateral Agent shall have received a counterpart of this Supplement that bears the signature of the New Subsidiary and the Notes Collateral Agent has executed a counterpart hereof. Delivery of an executed signature page to this Supplement by facsimile transmission or other electronic communication shall be as effective as delivery of a manually signed counterpart of this Supplement.

SECTION 4. The New Subsidiary hereby represents and warrants that (a) set forth on Schedule I attached hereto is a true and correct schedule of any and all Collateral of the New Subsidiary and (b) set forth under its signature hereto is the true and correct legal name of the New Subsidiary, its jurisdiction of formation and the location of its chief executive office.

SECTION 5. Except as expressly supplemented hereby, the Intellectual Property Security Agreement shall remain in full force and effect.

SECTION 6. THIS SUPPLEMENT SHALL BE GOVERNED BY, AND CONSTRUED IN ACCORDANCE WITH, THE LAWS OF THE STATE OF NEW YORK.

SECTION 7. In case any one or more of the provisions contained in this Supplement should be held invalid, illegal or unenforceable in any respect, the validity, legality and enforceability of the remaining provisions contained herein and in the Intellectual Property Security Agreement shall not in any way be affected or impaired thereby (it being understood that the invalidity of a particular provision in a particular jurisdiction shall not in and of itself affect the validity of such provision in any other jurisdiction). The parties hereto shall endeavor in good-faith negotiations to replace the invalid, illegal or unenforceable provisions with valid provisions the economic effect of which comes as close as possible to that of the invalid, illegal or unenforceable provisions.

SECTION 8. All communications and notices hereunder shall be in writing and given as provided in Section 5.01 of the Intellectual Property Security Agreement.

SECTION 9. The New Subsidiary agrees to reimburse the Notes Collateral Agent for its reasonable out-of-pocket expenses in connection with this Supplement, including the reasonable fees, other charges and disbursements of counsel for the Notes Collateral Agent.

Exhibit I-4

IN WITNESS WHEREOF, the New Subsidiary and the Notes Collateral Agent have duly executed this Supplement to the Intellectual Property Security Agreement as of the day and year first above written.


[NAME OF SUBSIDIARY]

By:
		Name:
		Title: Legal Name: Jurisdiction of Formation: Location of Chief Executive Office:

[Intellectual Property Security Supplement]


CITIBANK, N.A., as Notes Collateral Agent,

By:
		Name:
		Title:

[Intellectual Property Security Supplement]

Schedule I to

Supplement No. to

the Intellectual Property

Security Agreement

INTELLECTUAL PROPERTY

[Intellectual Property Security Supplement]

Exhibit II the

Intellectual Property

Security Agreement

PERFECTION CERTIFICATE

February 19, 2010

Reference is made to the Indenture (as amended, supplemented or otherwise modified from time to time, the “Indenture”) dated as of February 19, 2010, among Freescale Semiconductor, Inc., as issuer (“Freescale”), SigmaTel, LLC (“SigmaTel”), Freescale Semiconductor Holdings V, Inc. (“Holdings”), Freescale Semiconductor Holdings IV, Ltd., (“Foreign Holdings”), Freescale Semiconductor Holdings III, Ltd. (“Parent” and, together with Freescale, SigmaTel, Holdings and Foreign Holdings, the “Grantors”), Freescale Semiconductor Holdings II, Ltd. and Freescale Semiconductor Holdings I, Ltd., as guarantors, and The Bank of New York Mellon, as trustee. Capitalized terms used but not defined herein have the meanings set forth in either the Indenture or the Security Agreement referred to therein, as applicable.

The undersigned Responsible Officers of each of the Grantors hereby certify to the Notes Collateral Agent and each other Secured Party as follows:

1. Names. (a) The exact legal name of each Grantor, as such name appears in its respective certificate of incorporation or certificate of formation, as applicable, is as follows:

Exact Legal Name of Each Grantor

(b) Set forth below is each other legal name each Grantor has had in the past five years, together with the date of the relevant change:


Grantor	Other Legal Name in Past 5 Years	Date of Name Change

(c) Except as set forth in Schedule 1 hereto, no Grantor has changed its identity or corporate structure in any way within the past five years. Changes in identity or corporate structure would include mergers, consolidations and acquisitions, as well as any change in the form, nature or jurisdiction of organization. If any such change has occurred, include in Schedule 1 the information required by Sections 1 and 2 of this certificate as to each acquiree or constituent party to a merger or consolidation.

(d) Set forth below is the Organizational Identification Number, if any, issued by the jurisdiction of formation of each Grantor that is a registered organization:


Grantor		Organizational Identification Number

Sched

2. Current Locations. (a) The chief executive office of each Grantor is located at the address set forth opposite its name below:

(b) The jurisdiction of formation of each Grantor that is a registered organization is set forth opposite its name below:


Grantor		Jurisdiction

(c) Set forth below is a list of all domestic real property owned by each Grantor, the name of the Grantor that owns said property and the book value apportioned to each site:


Owner	Address	Net Book Value at 12/31/2009

(d) Set forth below opposite the name of each Grantor are the names and locations of all Persons other than such Grantor that have possession of any of the Collateral of such Grantor:

3. Unusual Transactions. All Accounts have been originated by the Grantors and all Inventory has been acquired by the Grantors in the ordinary course of business.

4. File Search Reports. File search reports have been obtained from each Uniform Commercial Code filing office identified with respect to such Grantor in Section 2 hereof, and such search reports reflect no liens against any of the Collateral other than those permitted under the Indenture.

5. UCC Filings. Financing statements in substantially the form of Schedule 5 hereto have been prepared for filing in the proper Uniform Commercial Code filing office in the jurisdiction in which each Grantor is located.

6. Schedule of Filings. Attached hereto as Schedule 6 is a schedule setting forth, with respect to the filings described in Section 5 above, each filing and the filing office in which such filing is to be made.

7. Stock Ownership and other Equity Interests. Attached hereto as Schedule 7 is a true and correct list of all the issued and outstanding stock, partnership interests, limited liability company membership interests or other Equity Interests held by, directly or indirectly, any Grantor and the record and beneficial owners of such stock, partnership interests, membership interests or other Equity Interests. Also set forth on

Schedule 7 is each equity investment held by, directly or indirectly, any Grantor that represents 50% or less of the Equity Interests of the entity in which such investment was made.

8. Debt Instruments. Attached hereto as Schedule 8 is a true and correct list of all promissory notes and other evidence of indebtedness held by any Grantor that are required to be pledged under the Security Agreement, including all intercompany notes held by any Grantor.

9. Assignment of Claims Act. Attached hereto as Schedule 9 is a true and correct list of all written contracts between the Borrower or any Material Domestic Subsidiary and the United States government or any department or agency thereof that have a remaining value of at least $5,000,000, setting forth the contract number, name and address of contracting officer (or other party to whom a notice of assignment under the Assignment of Claims Act should be sent), contract start date and end date, agency with which the contract was entered into, and a description of the contract type.

10. Advances. Attached hereto as Schedule 10 is (a) a true and correct list of all advances made by any Grantor to any Subsidiary of Parent who is not a Grantor (other than those identified on Schedule 8), which advances will be on and after the date hereof evidenced by one or more intercompany notes pledged to the Notes Collateral Agent under the Security Agreement and (b) a true and correct list of all unpaid intercompany transfers of goods sold and delivered by any Grantor to any Subsidiary of Parent who is not a Grantor.

11. Mortgage Filings. Attached hereto as Schedule 11 is a schedule setting forth, with respect to each Material Real Property, (a) the exact name of the person that owns such property as such name appears in its certificate of incorporation or other organizational document, (b) if different from the name identified pursuant to clause (a), the exact name of the current record owner of such property reflected in the records of the filing office for such property identified pursuant to the following clause and (c) the filing office in which a mortgage with respect to such Material Real Property must be filed or recorded in order for the Notes Collateral Agent to obtain a perfected security interest therein.

12. Intellectual Property. Attached hereto as Schedule 12A in proper form for filing with the United States Patent and Trademark Office is a schedule setting forth all of each Grantor’s Patents and Trademarks, including the name of the registered owner and the registration number of each Patent and Trademark owned by any Grantor. Attached hereto as Schedule 12B in proper form for filing with the United States Copyright Office is a schedule setting forth all of each Grantor’s Copyrights, including the name of the registered owner and the registration number of each Copyright owned by any Grantor.

13. Commercial Tort Claims. Attached hereto as Schedule 13 is a true and correct list of commercial tort claims in excess of $5,000,000 held by any Grantor, including a brief description thereof.

IN WITNESS WHEREOF, the undersigned have duly executed this certificate on the date first written above.


FREESCALE SEMICONDUCTOR, INC.

By:
		Name:
		Title:

FREESCALE SEMICONDUCTOR HOLDINGS V, INC.

By:
		Name:
		Title:

FREESCALE SEMICONDUCTOR HOLDINGS IV, LTD.

By:
		Name:
		Title:

FREESCALE SEMICONDUCTOR HOLDINGS III, LTD.

By:
		Name:
		Title:

SIGMATEL, LLC

By:		Freescale Semiconductor, Inc., as Sole Member

By:
		Name:
		Title:

[Perfection Certificate]

SCHEDULE 1

Changes in Identity or Corporate Structure Within Past Five Years


Grantor	Description of Change	Effective Date of Change

Sched. 1-1

SCHEDULE 5

UCC Financing Statements

Sched. 5-1

SCHEDULE 6

UCC Filings and Filing Offices


Grantor	Description of Filing	Filing Office

Sched. 6-1

SCHEDULE 7

Stock Ownership and Other Equity Interests


Country	Issuer (Entity Name)	Owner (% Ownership)

Entities in which Freescale owns less than 50% of the equity:

Sched. 7-1

SCHEDULE 8

Debt Instruments

Issuer

Principal

Amount

Date of Note

Maturity

Date

Sched. 8-1

SCHEDULE 9

Government Contracts

Sched. 9-1

SCHEDULE 10

Advances

(a) Advances made by any Grantor to any Subsidiary of Parent who is not a Grantor

Lender

Borrower

Amount

Outstanding

Facility

Start

Facility

End

Facility Amount

(b) Unpaid intercompany transfers of goods:

Sched. 10-1

SCHEDULE 11

Mortgage Filings


Record Owner	Property	Filing Office

Sched. 11-1

SCHEDULE 12A

Patents, Patent Licenses, Trademarks and Trademark Licenses

Sched. 12A-1

SCHEDULE 12B

Copyrights and Copyright Licenses

Sched. 12B-1

SCHEDULE 13

Commercial Tort Claims

Sched. 13-1

Schedule I

to Intellectual Property

Security Agreement

INTELLECTUAL PROPERTY

I. Copyrights


Title	Reg. No.	Reg. Date	Record Owner/ Liens	Status
Hero chip.	▇▇▇▇▇▇▇▇▇	7/26/2006	Freescale Semiconductor, Inc.; Citibank lien	Registered
STMP3400 boot loader boot ROM A4-03: general release.	TX5338512	6/11/2001	SigmaTel, Inc.; Citibank lien (recorded against title, but not reg. no.)	Registered
STIR4200 coinstaller.	TX5385381	6/12/2001	SigmaTel, Inc.; Citibank lien	Registered
STIr4200 NDIS miniport device driver is a computer program with trade secrets.	TX5377823	6/12/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 audio player firmware ATLM-0117.	TX5338511	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 booty booter: ver booty-01.	TX5338509	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 device control class firmware ver DCC.017.	TX5338510	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 host firmware update utility.	TX5329066	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 host formatter utility.	TX5329065	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 host SCSI miniport driver.	TX5329058	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
STMP3400 host USB device driver: general release.	TX5338508	6/11/2001	SigmaTel, Inc.; Citibank lien	Registered
Sigma Tel host audio driver 0205 software.	TX5355465	6/07/2001	SigmaTel, Inc.	Registered
Sigma Tel host audio driver wdm 7085 general software.	TX5355469	6/07/2001	SigmaTel, Inc.	Registered
SigmaTel host audio NT driver 4.5049.	▇▇▇▇▇▇▇▇▇	6/12/2001	SigmaTel, Inc.	Registered
SigmaTel host audio unified NT driver 6004.	TX5431336	6/12/2001	SigmaTel, Inc.	Registered

II. U.S. Registered Trademarks and Trademark Applications


▇▇▇▇	Reg. No. (App. No.)	Reg. Date (App. Date)	Record Owner/ Liens	Status
ALTIVEC	3,142,787	9/12/2006	Freescale Semiconductor, Inc.; Citibank lien	Registered
C-5	2,399,754	10/31/2000	Freescale Semiconductor, Inc.; Citibank lien	Registered
CODETAP	1,690,728	6/2/1992	Freescale Semiconductor, Inc.	Registered
CODETEST	2,079,931	7/15/1997	Freescale Semiconductor, Inc.; Citibank lien	Registered
CODEWARRIOR	3,444,193	6/10/2008	Freescale Semiconductor, Inc.	Registered
CODEWARRIOR	1,981,365	6/18/1996	Freescale Semiconductor, Inc.; Citibank lien	Registered
COLDFIRE	2,053,242	4/15/1997	Freescale Semiconductor, Inc.; Citibank lien	Registered
C-PORT	2,824,229	3/23/2004	Freescale Semiconductor, Inc.; Citibank lien	Registered
C-▇▇▇▇	2,399,755	10/31/2000	Freescale Semiconductor, Inc.; Citibank lien	Registered
DESIGN ONLY	3,411,019	4/8/2008	Freescale Semiconductor, Inc.	Registered
DESIGN ONLY	(77-538,073)	(8/4/2008)	Freescale Semiconductor, Inc.	Pending
DESIGN ONLY	1,676,605	2/25/1992	Freescale Semiconductor, Inc.	Registered
DESIGN ONLY	3,538,548	11/25/2008	Freescale Semiconductor, Inc.; Citibank lien	Registered
DIGITAL DNA	2,764,480	9/16/2003	Freescale Semiconductor, Inc.	Registered
FREESCALE	3,259,075	7/3/2007	Freescale Semiconductor, Inc.	Registered
FREESCALE	(76-567,257)	(12/30/2003)	Freescale Semiconductor, Inc.	Pending
FREESCALE MARATHON	2,997,722	9/20/2005	Freescale Semiconductor, Inc.; Citibank lien	Registered
FREESCALE SEMICONDUCTOR and Design	3,358,102	12/18/2007	Freescale Semiconductor, Inc.	Registered
FREESCALE SEMICONDUCTOR and Design	(78-376,532)	(3/1/2004)	Freescale Semiconductor, Inc.; Citibank lien	Pending
INNOVATIVE CONVERGENCE	2,986,035	8/16/2005	Freescale Semiconductor, Inc.; Citibank lien	Registered
METROWERKS	1,655,296	9/3/1991	Freescale Semiconductor, Inc.	Registered
MOBILEGT	2,860,558	7/6/2004	Freescale Semiconductor, Inc.; Citibank lien	Registered
POWERPARTS	2,908,899	12/7/2004	Freescale Semiconductor, Inc.; Citibank lien	Registered
POWERQUICC	3,276,522	8/7/2007	Freescale Semiconductor, Inc.; Citibank lien	Registered
POWERTAP	2,271,081	8/17/1999	Freescale Semiconductor, Inc.; Citibank lien	Registered
PROCESSOR EXPERT	(77-869,524)	(11/10/2009)	Freescale Semiconductor, Inc.	Pending
QORIQ	(77-494,217)	(6/9/2008)	Freescale Semiconductor, Inc.	Pending
SEAWAY NETWORKS	3,128,609	8/15/2006	Freescale Semiconductor, Inc.; Citibank lien	Registered


▇▇▇▇	Reg. No. (App. No.)	Reg. Date (App. Date)	Record Owner/ Liens	Status
STARCORE	3,030,024	12/13/2005	Freescale Semiconductor, Inc.; Citibank lien	Registered
STREAMWISE	3,150,419	10/3/2006	Freescale Semiconductor, Inc.	Registered
STREAMWISE	3,197,979	1/16/2007	Freescale Semiconductor, Inc.	Registered
SYMPHONY	3,684,432	9/15/2009	Freescale Semiconductor, Inc.; Citibank lien	Registered
VORTIQA	(77-761,881)	(6/17/200)	Freescale Semiconductor, Inc.	Pending
XTREMESPECTRUM	2,967,379	7/12/2005	Freescale Semiconductor, Inc.; Citibank lien	Registered
DESIGN ONLY	2,936,253	3/29/2005	Sigmatel, Inc.	Registered
DESIGN ONLY	2,939,857	4/12/2005	Sigmatel, Inc.	Registered
DIGICOLOR	2,962,456	6/14/2005	Sigmatel, Inc.	Registered
SIGMATEL	2,513,693	12/4/2001	Sigmatel, Inc.; Citibank lien	Registered

U.S. Patents Assigned to SigmaTel


Patent No.	Grant Date	Application No.	Application Date	Title
6204651	20-Mar-01	09/551123	18-Apr-00	METHOD AND APPARATUS FOR REGULATING AN OUTPUT VOLTAGE OF A SWITCH MODE CONVERTER
6313770	06-Nov-01	09/596152	15-Jun-00	SYSTEM FOR SAMPLING AN ANALOG SIGNAL AND METHOD THEREOF
6535901	18-Mar-03	09/558902	26-Apr-00	METHOD AND APPARATUS FOR GENERATING A FAST MULTIPLY ACCUMULATOR
6522511	18-Feb-03	09/595300	15-Jun-00	HIGH SPEED ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
6584162	24-Jun-03	09/629067	31-Jul-00	METHOD AND APPARATUS SAMPLE RATE CONVERSIONS IN AN ANALOG TO DIGITAL CONVERTER
6404172	11-Jun-02	09/716895	20-Nov-00	METHOD AND APPARATUS FOR PROVIDING INTEGRATED BUCK OR BOOST CONVERSION
6366522	02-Apr-02	09/716616	20-Nov-00	METHOD AND APPARATUS FOR CONTROLLING POWER CONSUMPTION OF AN INTEGRATED CIRCUIT
6362605	26-Mar-02	09/645722	24-Aug-00	METHOD AND APPARATUS FOR PROVIDING POWER TO AN INTEGRATED CIRCUIT
6329800	11-Dec-01	09/690501	17-Oct-00	METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN DRIVER CIRCUITS
▇▇▇▇▇▇▇	22-Jun-04	09/▇▇▇▇▇▇	27-Jul-00	EDGE SENSITIVE DETECTION CIRCUIT
6633187	14-Oct-03	09/716731	20-Nov-00	METHOD AND APPARATUS FOR ENABLING A STAND ALONE INTEGRATED CIRCUIT
6999584	14-Feb-06	09/705580	02-Nov-00	METHOD AND APPARATUS FOR PRESENTING CONTENT DATA AND PROCESSING DATA
6522275	18-Feb-03	09/779158	08-Feb-01	METHOD AND APPARATUS FOR SAMPLE RATE CONVERSION FOR USE IN AN ANALOG TO DIGITAL CONVERTER
6567027	20-May-03	09/779810	08-Feb-01	METHOD AND APPARATUS FOR ANALOG TO DIGITAL CONVERSION UTILIZING A MOVING SUM
6373277	16-Apr-02	09/▇▇▇▇▇▇	22-Feb-01	LINE DRIVER HAVING VARIABLE IMPEDANCE TERMINATION
▇▇▇▇▇▇▇	27-Jul-04	09/728027	30-Nov-00	SWITCH CAPACITOR CIRCUIT AND APPLICATIONS THEREOF
6507223	14-Jan-03	09/790780	22-Feb-01	DIFFERENTIAL LINE DRIVER HAVING ADJUSTABLE COMMON MODE OPERATION
▇▇▇▇▇▇▇	25-Dec-07	11/223171	09-Sep-05	METHOD AND APPARATUS FOR REGULATING MULTIPLE OUTPUTS OF A SINGLE INDUCTOR DC TO DC CONVERTER
6977447	20-Dec-05	10/207450	29-Jul-02	METHOD AND APPARATUS FOR REGULATING MULTIPLE OUTPUTS OF A SINGLE INDUCTOR DC TO DC CONVERTER
7366577	29-Apr-08	10/351797	27-Jan-03	PROGRAMMABLE ANALOG INPUT/OUTPUT INTEGRATED CIRCUIT SYSTEM
6778119	17-Aug-04	10/603544	25-Jun-03	METHOD AND APPARATUS FOR ACCURATE DIGITAL-TO-ANALOG CONVERSION
7197412	27-Mar-07	11/407821	20-Apr-06	METHOD AND INTEGRATED CIRCUIT FOR USE BY A HANDHELD MULTIPLE FUNCTION DEVICE
6965334	15-Nov-05	10/944510	17-Sep-04	VARIABLE BANDGAP REFERENCE
6859156	22-Feb-05	10/603545	25-Jun-03	VARIABLE BANDGAP REFERENCE AND APPLICATIONS THEREOF
6853171	08-Feb-05	10/603555	25-Jun-03	LOW LOSS MULTIPLE OUTPUT STAGE FOR A DC-TO-DC CONVERTER
7046530	16-May-06	10/603547	25-Jun-03	METHOD AND APPARATUS FOR CURRENT LIMITING OF AN OUTPUT OF A DC-TO-DC CONVERTER
7402981	22-Jul-08	10/675116	30-Sep-03	METHOD AND APPARATUS TO PERFORM BATTERY CHARGING USING A DC-DC CONVERTER CIRCUIT
7075280	11-Jul-06	10/675114	30-Sep-03	PULSE-SKIPPING PFM DC-DC CONVERTER USING A VOLTAGE MODE CONTROL LOOP
7030695	18-Apr-06	10/675115	30-Sep-03	LOW THRESHOLD VOLTAGE CIRCUIT EMPLOYING A HIGH THRESHOLD VOLTAGE OUTPUT STAGE
7382111	03-Jun-08	11/189307	26-Jul-05	OVERVOLTAGE AND BACKFLOW CURRENT PROTECTION FOR A BATTERY CHARGER


6967468	22-Nov-05	10/675101	30-Sep-03	OVERVOLTAGE AND BACKFLOW CURRENT PROTECTION FOR A BATTERY CHARGER
7221725	22-May-07	10/608934	27-Jun-03	HOST INTERFACE DATA RECEIVER
7259480	21-Aug-07	10/607948	27-Jun-03	CONSERVING POWER OF A SYSTEM ON A CHIP USING AN ALTERNATE POWER SOURCE
7036029	25-Apr-06	10/607960	27-Jun-03	CONSERVING POWER OF A SYSTEM ON A CHIP USING SPEED SENSING
7278119	02-Oct-07	10/612577	02-Jul-03	BATTERY-OPTIMIZED SYSTEM-ON-A-CHIP AND APPLICATIONS THEREOF
7254244	07-Aug-07	10/628827	28-Jul-03	POP AND CLICK REDUCTION USING DAC POWER UP AND POWER DOWN PROCESSING
7130980	31-Oct-06	10/723710	26-Nov-03	USE OF A RESOURCE IDENTIFIER TO IMPORT A PROGRAM FROM EXTERNAL MEMORY FOR AN OVERLAY
7424588	09-Sep-08	10/723781	26-Nov-03	USE OF MULTIPLE OVERLAYS TO IMPORT PROGRAMS FROM EXTERNAL MEMORY
7302560	27-Nov-07	11/728681	26-Mar-07	USE OF NAND FLASH FOR HIDDEN MEMORY BLOCKS TO STORE AN OPERATING SYSTEM PROGRAM
7203828	10-Apr-07	10/723909	26-Nov-03	USE OF NAND FLASH FOR HIDDEN MEMORY BLOCKS TO STORE AN OPERATING SYSTEM PROGRAM
7210032	24-Apr-07	10/723665	26-Nov-03	METHOD FOR INITIALIZING MULTIFUNCTION HANDHELD DEVICE BY DOWNLOADING SECOND BOOT ALGORITHM FROM A COUPLED HOST IF SECOND BOOT ALGORITHM IN THE HANDHELD DEVICE IS NOT EXECUTABLE
7104684	12-Sep-06	10/718769	22-Nov-03	ON-CHIP DIGITAL THERMOMETER TO SENSE AND MEASURE DEVICE TEMPERATURES
7234071	19-Jun-07	10/720785	24-Nov-03	ON-CHIP REALTIME CLOCK MODULE HAS INPUT BUFFER RECEIVING OPERATIONAL AND TIMING PARAMETERS AND OUTPUT BUFFER RETRIEVING THE PARAMETERS
7109745	19-Sep-06	11/189308	26-Jul-05	CONFIGURABLE INTEGRATED CIRCUIT FOR USE IN A MULTI-FUNCTION HANDHELD DEVICE
6998871	14-Feb-06	10/723634	26-Nov-03	CONFIGURABLE INTEGRATED CIRCUIT FOR USE IN A MULTI-FUNCTION HANDHELD DEVICE
7129743	31-Oct-06	11/407475	20-Apr-06	DIGITAL AUDIO SYSTEM ON A CHIP
7250787	31-Jul-07	11/526839	25-Sep-06	DIGITAL AUDIO SYSTEM ON A CHIP WITH CONFIGURABLE GPIOS
7164565	16-Jan-07	10/723965	26-Nov-03	ESD PROTECTION CIRCUIT
7372967	13-May-08	10/723170	26-Nov-03	MICROPHONE BIAS CIRCUIT
6906591	14-Jun-05	10/723492	26-Nov-03	AMPLIFIER HAVING MOS CAPACITOR COMPENSATION
6940303	06-Sep-05	10/721203	25-Nov-03	SYSTEM AND METHOD TO ESTABLISH AN ADJUSTABLE ON-CHIP IMPEDANCE
7164320	16-Jan-07	11/009110	10-Dec-04	CURRENT THRESHOLD CIRCUIT
7208919	24-Apr-07	11/130539	17-May-05	METHOD AND APPARATUS FOR DIGITALLY REGULATING AN OUTPUT VOLTAGE USING NOISE-SHAPED COMPONENT SELECTION
7246027	17-Jul-07	11/078150	11-Mar-05	POWER OPTIMIZATION OF A MIXED-SIGNAL SYSTEM ON AN INTEGRATED CIRCUIT
7209069	24-Apr-07	11/105015	13-Apr-05	SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER WITH CURRENT STEERED DIGITAL-TO-ANALOG CONVERTER
7262585	28-Aug-07	11/130675	17-May-05	METHOD AND APPARATUS FOR BI-DIRECTIONAL CURRENT LIMIT IN A DUAL-POWER SOURCE CAPABLE DEVICE
7486148	03-Feb-09	11/728684	26-Mar-07	CONTROLLABLE PHASE LOCKED LOOP WITH OUTPUT OSCILLATION ADJUSTMENT AND METHOD FOR PRODUCING AN OUTPUT OSCILLATION FOR USE THEREWITH
7202752	10-Apr-07	11/126553	11-May-05	CONTROLLABLE PHASE LOCKED LOOP WITH OUTPUT OSCILLATION ADJUSTMENT AND METHOD FOR PRODUCING AN OUTPUT OSCILLATION FOR USE THEREWITH
7202750	10-Apr-07	11/153144	15-Jun-05	CONTROLLABLE PHASE LOCKED LOOP VIA ADJUSTABLE DELAY AND METHOD FOR PRODUCING AN OUTPUT OSCILLATION FOR USE THEREWITH


7515078	07-Apr-09	11/728812	26-Mar-07	PROGRAMMABLE SAMPLE RATE ANALOG TO DIGITAL CONVERTER AND METHOD FOR USE THEREWITH
7199739	03-Apr-07	11/152910	15-Jun-05	PROGRAMMABLE SAMPLE RATE ANALOG TO DIGITAL CONVERTER AND METHOD FOR USE THEREWITH
7323921	29-Jan-08	11/287550	22-Nov-05	CLOCK GENERATOR, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHOD FOR USE THEREWITH
7391347	24-Jun-08	11/287572	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
7301492	27-Nov-07	11/498204	01-Aug-06	CONTROLLED SAMPLING MODULE AND METHOD FOR USE THEREWITH
7106241	12-Sep-06	11/237340	28-Sep-05	CONTROLLED SAMPLING MODULE AND METHOD FOR USE THEREWITH
7630645	08-Dec-09	11/273703	14-Nov-05	DETECTING AN INFRARED TRANSCEIVER TYPE
7394987	01-Jul-08	11/273699	14-Nov-05	PROGRAMMABLE INFRARED DATA PROCESSOR
7394314	01-Jul-08	11/325121	04-Jan-06	CLASS-D AMPLIFIER WITH NOISE-IMMUNITY FEEDBACK
7535287	19-May-09	11/446612	05-Jun-06	SEMICONDUCTOR DEVICE AND SYSTEM AND METHOD OF CRYSTAL SHARING
7512720	31-Mar-09	11/118150	29-Apr-05	SYSTEM AND METHOD FOR ACCESSING UNIVERSAL SERIAL BUS NETWORKS
7135909	14-Nov-06	11/130946	17-May-05	TEMPERATURE SENSOR CIRCUIT AND SYSTEM
7459955	02-Dec-08	11/527914	27-Sep-06	Integrated circuit temperature sensing method [TEMPERATURE SENSOR SYSTEM AND METHOD]
7376762	20-May-08	11/263227	31-Oct-05	SYSTEMS AND METHODS FOR DIRECT MEMORY ACCESS
7116262	03-Oct-06	11/171918	30-Jun-05	SYSTEM AND METHOD TO RECEIVE DATA
7428603	23-Sep-08	11/171919	30-Jun-05	SYSTEM AND METHOD FOR COMMUNICATING WITH MEMORY DEVICES via plurality of state machines and a DMA controller
7508686	24-Mar-09	11/170485	29-Jun-05	SYSTEM AND METHOD FOR CONFIGURING DIRECT CURRENT CONVERTER
7378829	27-May-08	11/166871	24-Jun-05	METHOD AND SYSTEM FOR PROVIDING VOLTAGE
7245247	17-Jul-07	11/355934	16-Feb-06	ANALOG TO DIGITAL SIGNAL CONVERTER HAVING SAMPLING CIRCUIT WITH DIVIDED INTEGRATING CAPACITANCE
7620380	17-Nov-09	11/388795	24-Mar-06	ADJUSTABLE AUTOMATIC GAIN CONTROL
7565112	21-Jul-09	11/366266	02-Mar-06	REDUCED ADJACENT CHANNEL INTERFERENCE IN A RADIO RECEIVER
7227478	05-Jun-07	11/302761	14-Dec-05	SAMPLE RATE CONVERTER WITH SELECTABLE SAMPLING RATE AND TIMING REFERENCE
7460847	02-Dec-08	11/217763	01-Sep-05	HANDHELD AUDIO SYSTEM WITH RADIO RECEIVER AND METHOD FOR USE THEREWITH
7395401	01-Jul-08	11/241299	30-Sep-05	SYSTEM AND METHOD FOR ACCESSING SOLID-STATE MEMORY DEVICES
7420866	02-Sep-08	11/717350	13-Mar-07	METHOD AND SYSTEM OF OPERATING MODE DETECTION
7212463	01-May-07	11/233999	23-Sep-05	METHOD AND SYSTEM OF OPERATING MODE DETECTION
7512864	31-Mar-09	11/242425	30-Sep-05	SYSTEM AND METHOD OF ACCESSING NON-VOLATILE COMPUTER MEMORY
7518661	14-Apr-09	11/240332	30-Sep-05	SYSTEM AND METHOD OF AUDIO DETECTION
7453288	18-Nov-08	11/356227	16-Feb-06	CLOCK TRANSLATOR AND PARALLEL TO SERIAL CONVERTER
7233875	19-Jun-07	11/284655	21-Nov-05	TEST SET FOR TESTING A DEVICE AND METHODS FOR USE THEREWITH
7574590	11-Aug-09	11/259610	26-Oct-05	Method for booting a system on a chip integrated circuit [SYSTEM AN A CHIP INTEGRATED CIRCUIT, PROCESSING SYSTEM AND METHODS FOR USE THEREWITH]
7359254	15-Apr-08	11/249963	13-Oct-05	CONTROLLER FOR CONTROLLING A SOURCE CURRENT TO A MEMORY CELL, PROCESSING SYSTEM AND METHODS FOR USE THEREWITH
7301826	27-Nov-07	11/652327	11-Jan-07	MEMORY PROCESSING SYSTEM AND METHODS FOR USE THEREWITH


7212458	01-May-07	11/257816	25-Oct-05	MEMORY PROCESSING SYSTEM AND METHODS FOR USE THEREWITH
7230557	12-Jun-07	11/344275	31-Jan-06	AUDIO CODEC ADAPTED TO DUAL BIT-STREAMS AND METHODS FOR USE THEREWITH
7490266	10-Feb-09	11/352695	13-Feb-06	INTEGRATED CIRCUIT AND PROCESSING SYSTEM WITH IMPROVED POWER SOURCE MONITORING AND METHODS FOR USE THEREWITH
7508326	24-Mar-09	11/643498	20-Dec-06	AUTOMATICALLY DISABLING INPUT/OUTPUT SIGNAL PROCESSING BASED ON THE REQUIRED MULTIMEDIA FORMAT
7594087	22-Sep-09	11/335292	19-Jan-06	System and method for writing data to and erasing data from NON-VOLATILE MEMORY
7321261	22-Jan-08	11/402189	11-Apr-06	FULL SWING AMPLIFYING CIRCUIT AND APPLICATIONS THEREOF
7577419	18-Aug-09	11/641994	19-Dec-06	DIGITAL MIXER SYSTEM AND METHOD
7620792	17-Nov-09	11/507650	21-Aug-06	PROCESSING SYSTEM, MEMORY AND METHODS FOR USE THEREWITH
7379356	27-May-08	11/542410	03-Oct-06	MEMORY, INTEGRATED CIRCUIT AND METHODS FOR ADJUSTING A SENSE AMP ENABLE SIGNAL USED THEREWITH
7391346	24-Jun-08	11/702269	05-Feb-07	SWITCHING AMPLIFIER SYSTEM AND METHOD
7583216	01-Sep-09	11/863631	28-Sep-07	ADJUSTABLE DAC AND APPLICATIONS THEREOF
5714909	03-Feb-98	08/661333	14-Jun-96	TRANSIMPEDANCE AMPLIFIER AND METHOD FOR CONSTRUCTING SAME
6055283	25-Apr-00	09/197823	23-Nov-98	DATA DETECTION CIRCUIT
5892800	06-Apr-99	08/822338	20-Mar-97	DATA DETECTION CIRCUIT HAVING A PRE-AMPLIFIER CIRCUIT
6128354	03-Oct-00	09/197653	23-Nov-98	DATA DETECTION PRE-AMPLIFIER CIRCUIT
6175601	16-Jan-01	09/198075	23-Nov-98	INFRA-RED DATA PROCESSING CIRCUIT
6163580	19-Dec-00	08/871194	09-Jun-97	METHOD AND APPARATUS FOR DATA DETECTION WITH AN ENHANCED ADAPTIVE THRESHOLD
5933040	03-Aug-99	08/871217	09-Jun-97	METHOD AND APPARATUS FOR A DATA DETECTION CIRCUIT OPERATING FROM A LOW VOLTAGE POWER SOURCE
6144473	07-Nov-00	08/871041	09-Jun-97	METHOD AND APPARATUS FOR TRANSCEIVING INFRARED SIGNALS
6212230	03-Apr-01	09/071239	04-Apr-98	METHOD AND APPARATUS FOR PULSE POSITION MODULATION
5977822	02-Nov-99	09/055190	04-Apr-98	METHOD AND APPARATUS OF PULSE POSITION DEMODULATION
6151149	21-Nov-00	09/055166	04-Apr-98	METHOD AND APPARATUS FOR PULSE PATTERN MODULATION
6526111	25-Feb-03	09/197615	23-Nov-98	METHOD AND APPARATUS FOR PHASE LOCKED LOOP HAVING REDUCED JITTER AND/OR FREQUENCY BIASING
6137279	24-Oct-00	09/376501	18-Aug-99	ADJUSTABLE POWER CONTROL MODULE AND APPLICATIONS THEREOF
6147634	14-Nov-00	09/211616	15-Dec-98	METHOD AND APPARATUS FOR DIGITAL TO ANALOG CONVERSION WITH REDUCED NOISE
6819677	16-Nov-04	09/246653	08-Feb-99	METHOD AND APPARATUS FOR RECOVERING DATA THAT WAS TRANSPORTED UTILIZING MULTIPLE DATA TRANSPORT PROTOCOLS
6857034	15-Feb-05	09/549651	14-Apr-00	COMPUTER PERIPHERAL DEVICE INCORPORATING INFRARED TRANSMISSIONS
6362755	26-Mar-02	09/551414	18-Apr-00	METHOD AND APPARATUS FOR SAMPLE RATE CONVERSION AND APPLICANTS THEREOF
6931139	16-Aug-05	09/690215	17-Oct-00	COMPUTER AUDIO SYSTEM
6430220	06-Aug-02	09/665029	19-Sep-00	DISTORTION REDUCTION METHOD AND APPARATUS FOR LINEARIZATION OF DIGITAL PULSE WIDTH MODULATION BY EFFICIENT CALCULATION
6552607	22-Apr-03	10/054144	12-Nov-01	TIME DIVISION MULTIPLEXED PWM AMPLIFIER
7206563	17-Apr-07	10/826732	16-Apr-04	REDUCTION OF RADIO FREQUENCY INTERFERENCE (RFI) PRODUCED BY SWITCHING AMPLIFIERS
7649935	19-Jan-10	11/198383	05-Aug-05	DIGITAL ADAPTIVE FEEDFORWARD HARMONIC DISTORTION COMPENSATION FOR DIGITALLY CONTROLLED POWER STAGE


5617058	01-Apr-97	08/556615	13-Nov-95	DIGITAL SIGNAL PROCESSING FOR LINEARIZATION OF SMALL INPUT SIGNALS TO A TRI-STATE POWER SWITCH
5077539	31-Dec-91	07/633762	26-Dec-90	SWITCHING AMPLIFIER
7471723	30-Dec-08	10/438298	13-May-03	ERROR CONCEALMENT AND ERROR RESILIENCE
7362810	22-Apr-08	10/438306	13-May-03	POST-FILTER FOR DEBLOCKING AND DERINGING OF VIDEO DATA
7170529	30-Jan-07	10/693814	24-Oct-03	IMAGE PROCESSING
7280154	09-Oct-07	10/763572	23-Jan-04	INTERPOLATIVE INTERLEAVING OF VIDEO IMAGES
7424056	09-Sep-08	10/614673	04-Jul-03	METHOD FOR MOTION ESTIMATION AND BANDWIDTH REDUCTION IN MEMORY AND DEVICE FOR PERFORMING THE SAME
7284080	16-Oct-07	10/614676	07-Jul-03	MEMORY BUS ASSIGNMENT FOR FUNCTIONAL DEVICES IN AN AUDIO/VIDEO SIGNAL PROCESSING SYSTEM
7143102	28-Nov-06	09/967793	28-Sep-01	AUTOGENERATED PLAY LISTS FROM SEARCH CRITERIA
7478084	13-Jan-09	11/328978	10-Jan-06	REMOTE-DIRECTED MANAGEMENT OF MEDIA CONTENT
7043479	09-May-06	09/992091	16-Nov-01	REMOTE-DIRECTED MANAGEMENT OF MEDIA CONTENT
7146322	05-Dec-06	10/123977	16-Apr-02	INTERLEAVING OF INFORMATION INTO COMPRESSED DIGITAL AUDIO STREAMS
7228054	05-Jun-07	10/208456	29-Jul-02	AUTOMATED PLAYLIST GENERATION
6606281	12-Aug-03	09/881900	14-Jun-01	PERSONAL AUDIO PLAYER WITH A REMOVABLE MULTI-FUNCTION MODULE
D451900	11-Dec-01	29/125073	15-Jun-00	AUDIO PLAYER APPARATUS
D451899	11-Dec-01	29/131132	13-Oct-00	AUDIO PLAYER APPARATUS
7206367	17-Apr-07	09/903040	10-Jul-01	APPARATUS AND METHOD TO SYNCHRONIZE MULTIMEDIA PLAYBACK OVER A NETWORK USING OUT-OF-BAND SIGNALING
7543186	02-Jun-09	10/939535	13-Sep-04	SYSTEM AND METHOD FOR IMPLEMENTING SOFTWARE BREAKPOINTS
7409623	05-Aug-08	10/981086	04-Nov-04	SYSTEM AND METHOD OF READING NON-VOLATILE COMPUTER MEMORY
7142141	28-Nov-06	11/416768	03-May-06	SYSTEM AND METHODS FOR SCHEDULING ACCESS TO AN ANALOG-TO-DIGITAL CONVERTER AND A MICROPROCESSOR
7397408	08-Jul-08	11/545221	10-Oct-06	SYSTEM AND METHODS FOR SCHEDULING ACCESS TO AN ANALOG-TO-DIGITAL CONVERTER AND A MICROPROCESSOR
7071859	04-Jul-06	11/171554	30-Jun-05	SYSTEM AND METHODS FOR SCHEDULING ACCESS TO AN ANALOG-TO-DIGITAL CONVERTER AND A MICROPROCESSOR
7501794	10-Mar-09	11/015538	17-Dec-04	SYSTEM, METHOD AND SEMICONDUCTOR DEVICR FOR CHARGING A SECONDARY BATTERY
7529878	05-May-09	11/118593	29-Apr-05	METHOD AND SYSTEM OF MEMORY MANAGEMENT
7555591	30-Jun-09	11/118587	29-Apr-05	METHOD AND SYSTEM OF MEMORY MANAGEMENT
7644251	1/5/2010	11/312852	19-Dec-05	NON-VOLATILE SOLID-STATE MEMORY CONTROLLER
7599451	6-Oct-09	11/126832	11-May-05	SAMPLE RATE CONVERSION MODULE AND APPLICATIONS THEREOF
7620131	17-Nov-09	11/287549	22-Nov-05	DIGITAL CLOCK CONTROLLER, RADIO RECEIVER, AND METHODS FOR USE THEREWITH
7627712	1-Dec-09	11/085967	22-Mar-05	METHOD AND SYSTEM FOR MANAGING MULTI-PLANE MEMORY DEVICES
7634696	15-Dec-09	11/070970	03-Mar-05	SYSTEM AND METHOD FOR TESTING MEMORY
7631163	8-Dec-09	11/356897	17-Feb-06	Fast virtual to physical memory mapping [MEMORY MANAGEMENT UNIT]
7656968	2-Feb-10	11/287571	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
7629709	08-Dec-09	11/025734	29-Dec-04	REGULATION OF A DC TO DC CONVERTER
7640041	29-Dec-09	11/290329	30-Nov-05	MULTIPLE FUNCTION HANDHELD DEVICE


7430659		30-Sep-08		10/723706		26-Nov-03		SYSTEM AND METHOD TO INITIALIZE A MULTIPLE FUNCTION DEVICE WITH A MULTI-PART BOOT ALGORITHM

Sigmatel, LLC Patent Applications


Appl. No.	Appl. No.	Title
10/066552	31-Jan-02	EXPANSION PERIPHERAL TECHNIQUES FOR PORTABLE AUDIO PLAYER
10/722998	26-Nov-03	SYSTEM AND METHOD FOR DYNAMICALLY ALLOCATING SHARED MEMORY WITHIN A MULTIPLE FUNCTION DEVICE
11/728679	26-Mar-07	METHOD AND CIRCUIT FOR USE BY A HANDHELD MULTIPLE FUNCTION DEVICE
11/852759	10-Sep-07	SYSTEM-ON-A-CHIP FOR PROCESSING MULTIMEDIA DATA AND APPLICATIONS THEREOF
10/865585	10-Jun-04	FLEXIBLE MEMORY INTERFACE SYSTEM
11/494791	27-Jul-06	CIRCUIT FOR USE WITH CELLULAR TELEPHONE WITH VIDEO FUNCTONALITY
11/494781	27-Jul-06	Circuit for use in a multifunction handheld device with wireless host interface [USE OF A RESOURCE IDENTIFIER TO IMPORT A PROGRAM FROM EXTERNAL MEMORY FOR AN OVERLAY]
11/494790	27-Jul-06	CIRCUIT FOR USE IN MULTIFUNCTION HANDHELD DEVICE HAVING A RADIO RECEIVER
11/265047	02-Nov-05	EQUALIZATION SETTING DETERMINATION FOR AUDIO DEVICES
11/▇▇▇▇▇▇	14-Dec-05	AUDIO OUTPUT DRIVER FOR REDUCING ELECTROMAGNETIC INTERFERENCE AND IMPROVING AUDIO CHANNEL PERFORMANCE
11/▇▇▇▇▇▇	17-Jun-05	MULTI-MODE DRIVER CIRCUIT
11/▇▇▇▇▇▇	17-Jun-05	ANTI-POP DRIVER CIRCUIT
11/▇▇▇▇▇▇	28-Sep-05	RECEIVER AND METHODS FOR USE THEREWITH
11/232592	22-Sep-05	PILOT TRACKING MODULE OPERABLE TO ADJUST INTERPOLATOR SAMPLE TIMING WITHIN A HANDHELD AUDIO SYSTEM
11/287570	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
11/287551	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
11/126554	11-May-05	HANDHELD AUDIO SYSTEM
11/268827	08-Nov-05	PATCHING ROM CODE
11/126864	11-May-05	DIGITAL DECODER AND APPLICATIONS THEREOF
11/166872	24-Jun-05	SYSTEM AND METHOD OF USING A PROTECTED NON-VOLATILE MEMORY
11/170487	29-Jun-05	SYSTEM AND METHOD OF ROUTING AUDIO SIGNALS TO MULTIPLE SPEAKERS
11/302771	14-Dec-05	DIGITAL GAIN ADJUSTMENT IN A WIRELESS RECEIVER
11/405887	18-Apr-06	CLOCK ADJUSTMENT FOR A HANDHELD AUDIO SYSTEM
11/294663	05-Dec-05	LOW NOISE, LOW DISTORTION RADIO RECEIVER FRONT-END
11/233081	22-Sep-05	METHOD TO ATTENUATE SPECIFIC COMPONENTS WITHIN A DATA SIGNAL
11/265867	03-Nov-05	POWER MANAGEMENT FOR A BETTERY-POWERED HANDHELD AUDIO DEVICE
11/355477	16-Feb-06	ADJUST SWITCHING RATE OF A POWER SUPPLY TO MITIGATE INTERFERENCE
11/233085	22-Sep-05	METHOD TO ADJUSTABLY CONVERT A FIRST DATA SIGNAL HAVING A FIRST TIME DOMAIN TO A SECOND DATA SIGNAL HAVING A SECOND TIME DOMAIN
11/328830	09-Jan-06	INTEGRATED CIRCUIT HAVING RADIO RECEIVER AND METHODS FOR USE THEREWITH
11/227357	15-Sep-05	RADIO RECEIVER WITH STEREO DECODER AND METHOD FOR USE THEREWITH
11/240581	30-Sep-05	SYSTEM AND METHOD OF MEMORY BLOCK MANAGEMENT
11/356338	16-Feb-06	DECIMATION FILTER
11/242404	03-Oct-05	METHOD AND SYSTEM FOR RECEIVING AND DECODING AUDIO SIGNALS
11/386873	22-Mar-06	SAMPLE RATE CONVERTER
11/262903	31-Oct-05	SYSTEM AND METHOD FOR ACCESSING DATA FROM A MEMORY DEVICE
11/241682	30-Sep-05	SYSTEM AND METHOD FOR SYSTEM RESOURCE ACCESS
11/344272	31-Jan-06	BATTERYING NOISE CANCELING HEADPHONES, AUDIO DEVICE AND METHODS FOR USE THEREWITH
11/507378	21-Aug-06	PROCESSING SYSTEM AND METHODS FOR USE THEREWITH
11/352690	13-Feb-06	INTEGRATED CIRCUIT, UNIVERSAL SERIAL BUS ON-THE-GO POWER SOURCE AND METHODS FOR USE THEREWITH


Appl. No.	Appl. No.	Title
11/344274	31-Jan-06	DIGITAL MICROPHONE INTERFACE, AUDIO CODEC AND METHODS FOR USE THEREWITH
11/244468	06-Oct-05	WIRELESS HANDSET AND METHODS FOR USE THEREWITH
11/340441	26-Jan-06	WIRELESS HANDSET AND METHODS FOR USE THEREWITH
11/388675	24-Mar-06	COMPARATIVE SIGNAL STRENGTH DETECTION
12/127623	27-May-08	AUTOMATICALLY DISABLING INPUT/OUTPUT SIGNAL PROCESSING BASED ON THE REQUIRED MULTIMEDIA FORMAT
11/472034	21-Jun-06	INFRARED RECEIVER, INFRARED BRIDGE DEVICE AND METHODS FOR USE THEREWITH
11/▇▇▇▇▇▇	14-Dec-05	TOUCH SCREEN DRIVER AND METHODS FOR USE THEREWITH
11/▇▇▇▇▇▇	11-Apr-06	BUFFER CONTROLLER, CODEC AND METHODS FOR USE THEREWITH
11/▇▇▇▇▇▇	22-Nov-05	AUDIO OUTPUT DRIVER AND METHODS FOR USE THEREWITH
11/▇▇▇▇▇▇	19-Dec-05	DIGITAL SECURITY SYSTEM
12/016577	18-Jan-08	ECC SHORTCUT FOR FLASH
11/▇▇▇▇▇▇	27-Mar-06	HEADPHONE DRIVER AND METHODS FOR USE THEREWITH
11/▇▇▇▇▇▇	09-Feb-06	MASS STORAGE DEVICE, MASS STORAGE CONTROLLER AND METHODS FOR USE THEREWITH
11/436937	18-May-06	NON-VOLATILE MEMORY ERROR CORRECTION SYSTEM AND METHOD
11/641995	19-Dec-06	DEMODULATOR SYSTEM AND METHOD
11/641564	19-Dec-06	DIGITAL AUDIO PROCESSING SYSTEM AND METHOD
11/500632	07-Aug-06	SYSTEM AND METHOD OF PROCESSING COMPRESSED AUDIO DATA
11/365231	01-Mar-06	CODEC INTEGRATED CIRCUIT, CODEC AND METHODS FOR USE THEREWITH
11/389778	27-Mar-06	AUDIO AMPLIFIER AND METHODS FOR USE THEREWITH
12/194435	19-Aug-08	AUDIO SIGNAL PROCESSING SYSTEM AND METHOD
11/796979	30-Apr-07	GAIN CONTROL MODULE AND APPLICATIONS THEREOF
11/544501	06-Oct-06	HANDHELD DEVICE, INTEGRATED CIRCUIT AND METHODS FOR PLAYING SPONSOR INFORMATION WITH THE PLAYBACK OF PROGRAM CONTENT
11/644523	22-Dec-06	SYSTEM AND METHOD OF SIGNAL PROCESSING
11/796057	26-Apr-07	DIGITAL PLL AND APPLICATIONS THEREOF
11/728193	23-Mar-07	WIRELESS TRANSCEIVER AND METHOD FOR USE THEREWITH
11/728263	23-Mar-07	WIRELESS HANDSET AND WIRELESS HEADSET WITH WIRELESS TRANSCEIVER
11/701628	02-Feb-07	DEVICE, SYSTEM AND METHOD FOR CONTROLLING MEMORY OPERATIONS
11/726943	23-Mar-07	SYSTEM AND METHOD TO CONTROL ONE TIME PROGRAMMABLE MEMORY
11/704656	09-Feb-07	SYSTEM AND METHOD FOR CONTROLLING MEMORY OPERATIONS
11/799363	01-May-07	SYSTEM ON A CHIP WITH RTC POWER SUPPLY
11/789763	25-Apr-07	SYSTEM ON A CHIP WITH RTC POWER SUPPLY
11/789760	25-Apr-07	SOC WITH LOW POWER AND PERFORMANCE MODES
11/863662	28-Sep-07	MULTIMEDIA SOC WITH ADVANCED ▇▇▇▇ SENSE APPLICATIONS
11/825841	09-Jul-07	SYSTEM AND METHOD FOR DEMODULATING AUDIO SIGNALS
11/862312	27-Sep-07	CLOCK SYSTEM AND APPLICATIONS THEREOF
11/▇▇▇▇▇▇	29-Oct-07	TOUCH SCREEN DRIVER FOR RESOLVING PLURAL CONTEMPORANEOUS TOUCHES AND METHODS FOR USE THEREWITH
12/046804	12-Mar-08	INTEGRATED CIRCUIT TEST SOCKET HAVING ELASTIC CONTACT SUPPORT AND METHODS FOR USE THEREWITH
10/346736	17-Jan-03	TEXTURE ENCODING PROCEDURE
12/406765	18-Mar-09	METHOD FOR DETERMINING DISPLAY ORDER OF VOPS IN DECODER END OF MPEG IMAGE SYSTEM AND DEVICE FOR EXECUTING THE SAME
11/546853	12-Oct-06	INTERLEAVING OF INFORMATION INTO COMPRESSED DIGITAL AUDIO STREAMS
11/732737	04-Apr-07	AUTOMATED PLAYLIST GENERATION
12/022973	30-Jan-08	EXPANSION PERIPHERAL TECHNIQUES FOR PORTABLE AUDIO PLAYER
11/171917	30-Jun-05	SEMICONDUCTOR DEVICE INCLUDING A UNIQUE IDENTIFIER AND ERROR CORRECTION CODE
10/969498	20-Oct-04	INFRARED ADAPTER WITH DATA PACKET THROTTLE
12/360628	27-Jan-09	CHARGING A SECONDARY BATTERY
11/170475	29-Jun-05	SYSTEM AND METHOD OF MANAGING CLOCK SPEED IN AN ELECTRONIC DEVICE
11/166503	24-Jun-05	INTEGRATED CIRCUIT WITH MEMORY-LESS PAGE TABLE
11/085995	22-Mar-05	METHOD AND SYSTEM FOR COMMUNICATING WITH MEMORY DEVICES [UTILIZING SELECTED TIMING PARAMETERS FROM A TIMING TABLE]

U.S. Patents Assigned to Freescale Semiconductor, Inc.


Patent No.	Grant Date	Appl No.	Appl Date	Title
5173836	22-Dec-92	07/846109	05-Mar-92	A HERMETICALLY SEALED INTERFACE
5386341	31-Jan-95	08/143594	01-Nov-93	SEMICONDUCTOR CARRIER ASSEMBLY [Flexible substrate folded in a U-shape with a rigidizer plate located in the notch of the U-shape]
6053049	25-Apr-00	08/865956	30-May-97	ELECTRICAL DEVICE HAVING ATMOSPHERIC ISOLATION
6194246	27-Feb-01	09/382943	25-Aug-99	PROCESS FOR FABRICATING ELECTRONIC DEVICES HAVING A THERMALLY CONDUCTIVE SUBSTRATE
6697956	24-Feb-04	09/495197	31-Jan-00	METHOD AND APPARATUS FOR PHRASE SYNCHRONIZING A PLURALITY OF MICROCONTROLLERS OF A DISTRIBUTED MICROCONTROLLER NETWORK IN A BRAKE-BY-WIRE AUTOMOBILE BRAKING SYSTEM
6301306	09-Oct-01	09/579934	26-May-00	METHOD AND APPARATUS FOR GENERATING A SHORT-RANGE WIRELESS DATA COMMUNICATION LINK
5187811	16-Feb-93	07/896913	11-Jun-92	ERROR DETECTION
5020076	28-May-91	07/526156	21-May-90	HYBRID MODULATION APPARATUS
5140286	18-Aug-92	07/739573	02-Aug-91	AN OSCILLATOR [Oscillator with bias and buffer circuits formed in a die mounted with distributed elements on ceramic substrate]
5278994	11-Jan-94	07/709737	03-Jun-91	POWER AMPLIFIER SATURATION DETECTION AND CORRECTION METHOD AND APPARATUS
5150075	22-Sep-92	07/709738	03-Jun-91	POWER AMPLIFIER RAMP UP METHOD AND APPARATUS
5424689	13-Jun-95	08/172000	22-Dec-93	FILTERING DEVICE for use IN A PHASE LOCKED LOOP CONTROLLER
5363071	08-Nov-94	08/055900	04-May-93	APPARATUS AND METHOD FOR VARYING THE COUPLING OF A RADIO FREQUENCY SIGNAL
5448770	05-Sep-95	08/042956	05-Apr-93	TEMPERATURE-COEFFICIENT CONTROLLED RADIO FREQUENCY SIGNAL DETECTING CIRCUITRY
5493700	20-Feb-96	08/144940	29-Oct-93	AUTOMATIC FREQUENCY CONTROL APPARATUS
5513382	30-Apr-96	08/407787	20-Mar-95	MULTI-CERMAIC LAYER SWITCH CIRCUIT
5673001	30-Sep-97	08/482158	07-Jun-95	METHOD AND APPARATUS FOR AMPLIFYING A SIGNAL
6020787	01-Feb-00	08/902340	29-Jul-97	METHOD AND APPARATUS FOR AMPLIFYING A SIGNAL
5430416	04-Jul-95	08/201284	23-Feb-94	POWER AMPLIFIER HAVING NESTED AMPLITUDE MODULATION CONTROLLER AND PHASE MODULATION CONTROLLER
5511235	23-Apr-96	08/236736	02-May-94	APPARATUS FOR DETECTING A SIGN ALING CHANNEL DURING SCANNING INCLUDING A CONTROLLED FREQUENCY CONVERTER CIRCUIT AND A CONTROLLED FILTER BANDWIDTH, AND A METHOD THEREFOR
5634202	27-May-97	08/149486	09-Nov-93	METHOD AND APPARATUS FOR INTEGRATING A PLURALITY OF ANALOG INPUT SIGNALS PRIOR TO TRANSMITTING A COMMUNICATIONS SIGNAL
6185411	06-Feb-01	08/939157	29-Aug-97	APPARATUS AND METHOD FOR ENABLING ELEMENTS OF A PHASE LOCKED LOOP
5799011	25-Aug-98	08/808331	28-Feb-97	CDMA POWER CONTROL CHANNEL ESTIMATION USING DYNAMIC COEFFICEINT SCALING
6243410	05-Jun-01	09/089992	03-Jun-98	DEMODULATOR HAVING AN INFINITE-DURATION IMPULSE RESPONSE FILTER WITH DYNAMIC COEFFICEINT SCALING
5737327	07-Apr-98	08/624329	29-Mar-96	METHOD AND APPARATUS FOR DEMODULATION AND POWER CONTROL BIT DETECTION IN A SPREAD SPECTRUM COMMUNICATION SYSTEM
5673003	30-Sep-97	08/625658	29-Mar-96	AMPLIFIER CIRCUIT HAVING A VARIABLE BANDWIDTH
5859890	12-Jan-99	08/806811	26-Feb-97	DUAL MODULUS PRESCALER
6215359	10-Apr-01	09/563721	01-May-00	IMPEDANCE MATCHING FOR A DUAL BAND POWER AMPLIFIER
6243566	05-Jun-01	09/562734	01-May-00	IMPEDANCE MATCHING FOR A DUAL BAND POWER AMPLIFIER
6195536	27-Feb-01	09/562733	01-May-00	IMPEDANCE MATCHING FOR A DUAL BAND POWER AMPLIFIER
5870670	09-Feb-99	08/717877	23-Sep-96	INTEGRATED IMAGE REJECT MIXER
5867063	02-Feb-99	08/760767	05-Dec-96	GAIN DISTRIBUTION CIRCUIT
6137347	24-Oct-00	09/187464	04-Nov-98	MID SUPPLY REFERENCE GENERATOR
6400218	04-Jun-02	09/515824	29-Feb-00	VARIABLE GAIN CONTROL CIRCUIT AND METHOD therefore


Patent No.	Grant Date	Appl No.	Appl Date	Title
6049233	11-Apr-00	09/042753	17-Mar-98	PHASE DETECTION APPARATUS
6327319	04-Dec-01	09/187621	▇▇-▇▇▇-▇▇	▇▇▇▇▇ DETECTOR WITH FREQUENCY STEERING
6690945	10-Feb-04	09/619932	20-Jul-00	METHOD FOR SUPPRESSING TRANSIENTS USING A PULSE-SHAPING LOOK-UP TABLE
5905757	18-May-99	08/725871	04-Oct-96	A FILER CO-PROCESSOR
6018192	25-Jan-00	09/126576	30-Jul-98	ELECTRONIC DEVICE WITH A THERMAL CONTROL CAPABILITY
5428504	27-Jun-95	08/044889	09-Apr-93	COOLING COVER FOR RF POWER DEVICES
5784427	21-Jul-98	08/672010	24-Jun-96	FEEDBACK AND SHIFT UNIT
5781566	14-Jul-98	08/669671	24-Jun-96	CYCLIC REDUNDANCY CODER
5386624	07-Feb-95	08/085890	06-Jul-93	METHOD AND APPARATUS FOR UNDER ENCAPSULATING COMPONENTS ON CIRCUIT SUPPORTING SUBSTRATES
5198264	30-Mar-93	07/584958	19-Sep-90	METHOD OF ADHERING POLYIMIDE TO A SUBSTRATE
5584053	10-Dec-96	08/511573	04-Aug-95	COMMONLLY COUPLED HIGH FREQUENCY TRANSMITTING/RECEIVING SWITCHING MODULE
5801108	01-Sep-98	08/716785	11-Sep-96	LOW TEMPERATURE COFIREABLE DIELECTRIC PASTE AND METHOD OF FABRICATING SAME
5011066	30-Apr-91	07/558939	27-Jul-90	ENHANCED COLLAPSE SOLDER INTERCONNECTION
5742210	21-Apr-98	08/799516	12-Feb-97	NARROW-BAAND OVERCOPPLED DIRECTIONAL COUPLER IN MULTILAYER PACKAGE
5120678	09-Jun-92	07/609483	05-Nov-90	ELECTRICAL COMPONENT PACKAGE COMPRISING POLYMER-REINFORCED SOLDER BUMP INTERCONNECTIONS
5019673	28-May-91	07/570751	22-Aug-90	FLIP CHIP PACKAGE FOR [IC’S ] integrated circuits
5184768	09-Feb-93	07/619944	29-Nov-90	SOLDER INTERCONNECTION VERIFICATION
5136366	04-Aug-92	07/609355	05-Nov-90	OVERMOLDED SEMICONDUCTOR PACKAGE WITH ANCHORING MEANS
5233504	03-Aug-93	07/919338	27-Jul-92	NONCOLLAPSING MULTISOLDER INTERCONNECTION
5557142	17-Sep-96	07/650326	04-Feb-91	SHIELDED SEMICONDUCTOR DEVICE PACKAGE
5382471	17-Jan-95	08/012824	03-Feb-93	ADHERENT METAL COATING FOR ALUMINUM NITRIDE SURFACES
5217589	08-Jun-93	07/770270	03-Oct-91	METHOD OF ADHERENT METAL COATING FOR ALUMINUM NITRDE SURFACES
5218759	15-Jun-93	07/670663	18-Mar-91	METHOD OF MAKING A TRANSFER MOLDED SEMICONDUCTOR DEVICE
5086966	11-Feb-92	07/608872	05-Nov-90	PALLADIUM-COATED SOLDER BALL
5148968	22-Sep-92	07/653553	11-Feb-91	SOLDER BUMP STRETCH DEVICE
5217597	08-Jun-93	07/678418	01-Apr-91	SOLDER BUMP TRANSFER METHOD
5293067	08-Mar-94	07/898231	12-Jun-92	INTEGRATED CIRCUIT CHIP CARRIER
5296738	22-Mar-94	07/927774	10-Aug-92	MOISTURE RELIEF FOR CHIP CARRIER
5542171	06-Aug-96	07/771663	04-Oct-91	[A] METHOD OF SELECTIVELY RELEASING PLASTIC MOLDING MATERIAL FROM A SURFACE
5217568	08-Jun-93	07/830153	03-Feb-92	SILICON ETCHING PROCESS USING POLYMERIC MASK FOR EXAMPLE TO FORM V-GROOVE FOR AN OPTICAL FIBER COUPLING
5313365	17-May-94	07/906346	30-Jun-92	Encapsulated electronic package [POLYMER COMPOSITE-GLOB TOPPED PAD ARRAY CARRIER ]
5194137	16-Mar-93	07/740272	05-Aug-91	SOLDER PLATE REFLOW METHOD FOR FORMING SOLDER-BUMPED TERMINALS
5128632	07-Jul-92	07/700966	16-May-91	ADAPTIVE LOCK TIME CONTROLLER FOR A FREQUENCY SYNTHESIZER AND METHOD THEREFOR
5186383	16-Feb-93	07/770070	02-Oct-91	METHOD FOR FORMING SOLDER BUMP INTERCONNECTIONS TO A SOLDER-PLATED CIRCUIT TRACE
5220489	15-Jun-93	07/774921	11-Oct-91	MULTI-COMPONENT INTEGRATED CIRCUIT PACKAGE
5203076	20-Apr-93	07/812332	23-Dec-91	VACUUM INFILTRATION OF UNDER FILL MATERIAL FOR FLIP CHIP DEVICES
5192871	09-Mar-93	07/776034	15-Oct-91	VOLTAGE VARIABLE CAPACITOR HAVING AMORPHOUS DIELECTRIC FILM
5278726	11-Jan-94	07/824136	22-Jan-92	METHOD AND APPARATUS FOR PARTIALLY OVERMOLDED INTEGRATED CIRCUIT PACKAGE
5160409	03-Nov-92	07/740271	05-Aug-91	SOLDER PLAT REFLOW METHOD FOR A SOLDER BUMP ON A CIRCUIT TRACE INTERSECTION
5218234	08-Jun-93	07/811841	23-Dec-91	SEMICONDUCTOR DEVICE WITH CONTROLLED SPREAD POLYMERIC UNDERFILL


Patent No.	Grant Date	Appl No.	Appl Date	Title
5255839	26-Oct-93	07/816684	02-Jan-92	METHOD AND APPARATUS FOR SOLDER APPLICATION AND REFLOW
5311059	10-May-94	07/825367	24-Jan-92	BACK-PLANE GROUNDING FOR FLIP CHIP INTEGRATED CIRCUIT
5093612	03-Mar-92	07/548478	05-Jul-90	SECONDARY VOLTAGE SUPPLY AND VOLTAGE CLAMPING CIRCUIT
5191321	02-Mar-93	07/520894	09-May-90	SINGLE CELL BIMOS ELECTROLUMIN ESCENT DISPLAY DRIVER
▇▇▇▇▇▇▇	05-Apr-94	07/▇▇▇▇▇▇	04-May-92	EPROM PACKAGE AND METHOD OF OPTICALLY ERASING
5327013	05-Jul-94	08/091937	15-Jul-93	SOLDER BUMPING OF INTEGRATED CIRCUIT DIE
5281684	25-Jan-94	07/876147	30-Apr-92	SOLDER BUMPING OF INTEGRATED CIRCUIT DIE
5263196	16-Nov-93	07/615107	19-Nov-90	METHOD AND APPARATUS FOR COMPENSATION OF IMBALANCE IN ZERO-IF DOWNCONVERTERS
5229070	20-Jul-93	07/908109	02-Jul-92	LOW TEMPERATURE WETTING TIN BASE SOLDER PASTE
5371404	06-Dec-94	08/013391	04-Feb-93	THERMALLY CONDUCTIVE INTEGRATED CIRCUIT PACKAGE WITH RADIO FREQUENCY SHIELDING
5535101	09-Jul-96	07/970901	03-Nov-92	Leadless INTEGRATED CIRCUIT PACKAGE
5460922	24-Oct-95	08/276147	18-Jul-94	METHOD FOR FABRICATING ELECTRODE PATTERNS
5338999	16-Aug-94	08/057027	05-May-93	PIEZOELECTRIC LEAD ZIRCONIUM TITANATE DEVICE AND METHOD FOR FORMING SAME
5320272	14-Jun-94	08/042227	02-Apr-93	[PROCESS FOR FORMING] TIN- BISMUTH SOLDER CONNECTION HAVING IMPROVED HIGH TEMPERATURE PROPERTIES and process for forming same
5316205	31-May-94	08/043102	05-Apr-93	METHOD FOR FORMING GOLD BUMP CONNECTION USING TIN-BISMUTH SOLDER
5429292	04-Jul-95	08/304025	07-Sep-94	TIN BISMUTH SOLDER PASTE AND METHOD USING PASTE TO FROM CONNECTION HAVING IMPROVED HIGH TEMPERATURE PROPERTIES
5389160	14-Feb-95	08/069640	01-Jun-93	TIN BISMUTH SOLDER PASTE AND METHOD USING PASTE TO FROM CONNECTION HAVING IMPROVED HIGH TEMPERATURE PROPERTIES
6436730	20-Aug-02	08/677755	10-Jul-96	MICROELECTRONIC PACKAGE COMPRISING TIN-COPPER BUMP INTERCONNECTIONS, AND METHOD FOR FORMING SAME
5410184	25-Apr-95	08/130830	04-Oct-93	MICROELECTRONIC PACKAGE COMPRISING TIN-COPPER BUMP INTERCONNECTIONS, AND METHOD FOR FORMING SAME
5523920	04-Jun-96	08/176992	03-Jan-94	PRINTED CIRCUIT BOARD COMPRISING ELEVATED BOND PADS
5379186	03-Jan-95	08/085807	06-Jul-93	ENCAPSULATED ELECTRONIC COMPONENT HAVING A HEAT DIFFUSING LAYER
5446625	29-Aug-95	08/365988	28-Dec-94	CHIP CARRIER having copper pattern plated with gold on one surface and devoid of gold on another surface [AND METHOD FOR MANUFACTURE]
5426263	20-Jun-95	08/172340	23-Dec-93	ELECTRONIC ASSEMBLY HAVING A DOUBLE-SIDED LEADLESS COMPONENT
5435481	25-Jul-95	08/181724	18-Jan-94	SOLDERING PROCESS
5758275	26-May-98	08/537196	29-Sep-95	METHOD AND APPARATUS FOR SCHEDULING ADAPTATION FOR A NOTCH FILTER
5551627	03-Sep-96	08/314833	29-Sep-94	ALLOY SOLDER CONNECT ASSEMBLY AND METHOD OF CONNECTION
5460704	24-Oct-95	08/314102	28-Sep-94	Method of depositing ferrite film [FERRITE FILM AND METHOD OF DEPOSITING SAME]
5695877	09-Dec-97	08/695541	12-Aug-96	Doped ferrite film [METHOD OF DEPOSITING FERRITE FILM (AS AMEMDED)]
5429293	04-Jul-95	08/358295	19-Dec-94	SOLDERING PROCESS
5637834	10-Jun-97	08/383128	03-Feb-95	MULTILAYER CIRCUIT SUBSTRATE AND METHOD FOR FORMING SAME
5501943	26-Mar-96	08/391816	21-Feb-95	METHOD OF PATTERNING AN INORGANIC OVERCOAT FOR A LIQUID CRYSTAL DISPLAY ELECTRODE
5597110	28-Jan-97	08/519439	25-Aug-95	METHOD FOR FORMING A SOLDER BUMP BY SOLDER-▇▇▇▇▇▇▇ OR THE LI KE
5792594	11-Aug-98	08/625157	28-Mar-96	METALLIZATION AND TERMINATION PROCESS FOR AN INTEGRATED CIRCUIT CHIP
5848466	15-Dec-98	08/752019	19-Nov-96	METHOD FOR FORMING A MICROELECTRONIC ASSEMBLY [AND ASSEMBLY FORMED THEREBY]
6194250	27-Feb-01	09/152899	14-Sep-98	LOW-PROFILE MICROELECTRIC PACKAGE [, AND METHOD FOR FORMING SAME]
5844315	01-Dec-98	08/621912	22-Mar-96	LOW-PROFILE MICROELECTRIC PACKAGE [, AND METHOD FOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
				FORMING SAME]
5667128	16-Sep-97	08/537953	28-Sep-95	WORKSTATION FOR PROCESSING A FLEXIBLE MEMBRANCE
5721450	24-Feb-98	08/489573	12-Jun-95	MOISTURE RELIEF FOR CHIP CARRIERS
6083819	04-Jul-00	09/105749	26-Jun-98	METHOD AND ASSEMBLY FOR PROVIDING INPROVED UNDERCHIP ENCAPSULATION
6201192	13-Mar-01	09/558825	26-Apr-00	METHOD AND ASSEMBLY FOR PROVIDING INPROVED UNDERCHIP ENCAPSULATION
5804881	08-Sep-98	08/562861	22-Nov-95	METHOD AND ASSEMBLY FOR PROVIDING INPROVED UNDERCHIP ENCAPSULATION
6242802	05-Jun-01	08/502993	17-Jul-95	MOISURE ENHANCED BALL GRID ARRAY PACKAGE
6034333	07-Mar-00	08/975720	19-Nov-97	[ASSEMBLY HAVING A] FRAME EMBEDDED IN A POLYMERIC ENCAPSULANT [AND METHOD FOR FORMING SAME]
5720100	24-Feb-98	08/581695	29-Dec-95	ASSEMBLY HAVING A FRAME EMBEDDED IN A POLYMERIC ENCAPSULANT AND METHOD FOR FORMING SAME
5930598	27-Jul-99	09/120164	21-Jul-98	MICROELECTRONIC ASSEMBLY INCLUDING A DECOMPOSABLE ENCAPSULANT, AND METHOD FOR FORMING AND REWORKING SAME
5821456	13-Oct-98	08/641394	29-Apr-96	MICROELECTRONIC ASSEMBLY INCLUDING A DECOMPOSABLE ENCAPSULANT, AND METHOD FOR FORMING AND REWORKING SAME
5696666	09-Dec-97	08/540995	11-Oct-95	LOW PROFILE EXPOSED DIE CHIP CARRIER PACKAGE
5891606	06-Apr-99	08/727832	07-Oct-96	HIGH-DENSITY CIRCUIT STRUCTURE WITH INTERLAYER ELECTRICAL CONNECTIONS AND PROCESS THEREFOR
5749614	12-May-98	08/567012	30-Nov-95	VACUUM PICKUP TOOL FOR PLACING BALLS IN A CUSTOMIZED PATTERN
5895976	20-Apr-99	08/657216	31-May-96	MICROELECTRONIC ASSEMBLY INCLUDING POLYMERIC REINFORCEMENT DIE AND METHOD FOR FORMING SAME
6229097	08-May-01	08/612693	08-Mar-96	SUBSTRATE HAVING TRIM WINDOW IN A C5 ARRAY
5753904	19-May-98	08/581697	29-Dec-95	TOOL FOR DETECTING MISSING BALLS USING A PHOTODETECTOR
5891795	06-Apr-99	08/617156	07-Apr-98	HIGH DENSITY INTERCONNECT SUBSTRATE [AND METHOD OF MANUFACTURING SAME]
5869899	09-Feb-99	09/078115	13-May-98	HIGH DENSITY INTERCONNECT SUBSTRATE AND METHOD OF MANUFACTURING SAME
5856068	05-Jan-99	08/850791	02-May-97	METHOD FOR FABRICATING A PRINT ED CIRCUIT BOARD UNDER SUPER ATMOSPHERIC PRESSURE
5829668	03-Nov-98	08/706863	30-Aug-96	METHOD FOR FORMING SOLDER BUMPS ON BOND PADS
6013571	11-Jan-00	08/876582	16-Jun-97	MICROELECTRONIC ASSEMBLY INCLUDING COLUMNAR INTERCONNECTIONS AND METHOD FOR FORMING SAME
5729438	17-Mar-98	08/660389	07-Jun-96	DISCRETE COMPONENT PAD ARRAY CARRIER
5844319	01-Dec-98	08/808773	28-Feb-97	MICROELECTRONIC ASSEMBLY WITH COLLAR SURROUNDING INTEGRATED CIRCUIT COMPONENT ON A SUBSTRATE
6200829	13-Mar-01	09/299158	22-Apr-99	MICROELECTRONIC ASSEMBLY WITH CONNECTION TO A BURIED ELECTRICAL ELEMENT, AND METHOD FOR FORMING SAME
5898215	27-Apr-99	08/766653	13-Dec-96	MICROELECTRONIC ASSEMBLY WITH CONNECTION TO A BURIED ELECTRICAL ELEMENT, AND METHOD FOR FORMING SAME
5856912	05-Jan-99	08/811561	28-Feb-97	MICROELECTRONIC ASSEMBLY FOR CONNECTION TO AN EMBEDDED ELECTRICAL ELEMENT, AND METHOD FOR FORMING SAME
6046910	04-Apr-00	09/040568	18-Mar-98	MICROELECTRONIC ASSEMBLY HAVING SLIDABLE contacts and method for manufacturing the assembly
6093972	25-Jul-00	09/304152	03-May-99	MICROELECTRONIC PACKAGE INCLUDING A POLYMER ENCAPSULATED DIE [, AND METHOD FOR FORMING SAME]
5895229	20-Apr-99	08/858756	19-May-97	MICROELECTRONIC PACKAGE INCLUDING A POLYMER ENCAPSULATED DIE , AND METHOD FOR FORMING SAME
5814401	29-Sep-98	08/794826	04-Feb-97	SELECTIVELY FILLED ADHESIVE FILM CONTAINING A FLUXING AGENT
6391762	21-May-02	09/439099	12-Nov-99	METHOD OF FORMING A MICROELECTRIC ASSEMBLY WITH A PARTICULATE FREE UNDERFILL MATERIAL AND A MICROELECTRONIC ASSEMBLY INCORPORATING THE SAME


Patent No.	Grant Date	Appl No.	Appl Date	Title
5831832	03-Nov-98	08/905009	11-Aug-97	MOLDED PLASTIC BALL GRID ARRAY PACKAGE
5928001	27-Jul-99	08/925157	08-Sep-97	SURFACE MOUNTABLE FLEXIBLE INTERCONNECT
6373139	16-Apr-02	09/413705	06-Oct-99	LAYOUT FOR A BALL GRID ARRAY
5584059	10-Dec-96	08/085439	30-Jun-93	DC OFFSET REDUCTION IN A ZERO-IF TRANSMITTER
6562663	13-May-03	09/819393	28-Mar-01	MICROELECTRONIC ASSEMBLY WITH DIE SUPPORT AND METHOD
6171114	09-Jan-01	09/593884	14-Jun-00	LOW INSERTION FORCE ARRAY CONNECTOR FOR PROVIDING A REMOVABLE HIGH DENSITY ELECTRICAL INTERCONNECT TO A FLEXIBLE CIRCUIT
6800946	05-Oct-04	10/328326	23-Dec-02	SELECTIVE UNDERFILL FOR [OPTO-ELECTRONIC] FLIP CHIPS AND FLIP-CHIP ASSEMBLIES
6309912	30-Oct-01	09/597215	20-Jun-00	METHOD OF INTERCONNECTING AN EMBEDDED INTEGRATED CIRCUIT
6418029	09-Jul-02	09/515078	28-Feb-00	INTERCONNECT SYSTEM HAVING VERTICALLY MOUNTED PASSIVE COMPONENTS ON AN UNDERSIDE OF A SUBSTRATE
6326554	04-Dec-01	09/533702	23-Mar-00	SURFACE MOUNT FLEXIBLE INTERCONNECT AND COMPONENT CARRIER
6774497	10-Aug-04	10/402631	28-Mar-03	FLIP-CHIP ASSEMBLY WITH THIN UNDERFILL AND THICK SOLDER MASK
5528254	18-Jun-96	08/251444	31-May-94	ANTENNA AND METHOD FOR FORMING SAME
5553019	03-Sep-96	08/376518	23-Jan-95	WRITE ONCE READ MANY MEMORY USING EEPROM CELLS
5697088	09-Dec-97	08/692161	05-Aug-96	BALUN TRANSFORMER
7200378	03-Apr-07	10/017252	13-Dec-01	ROCKING POTENTIAL-WELL SWITCH AND MIXER
6020261	01-Feb-00	09/323256	01-Jun-99	PROCESS FOR FORMING HIGH ASPECT RATIO CIRCUIT FEATURES
6625232	23-Sep-03	09/575271	22-May-00	SMART DC OFFSET CORRECTION LOOP
6356217	12-Mar-02	09/515843	29-Feb-00	ENHANCED DC OFFSET CORRECTION THROUGH BANDWIDTH AND CLOCK SPEED SELECTION
6317064	13-Nov-01	09/515834	29-Feb-00	DC OFFSET CORRECTION ADAPTABLE TO MULTIPLE REQUIREMENTS
6327313	04-Dec-01	09/473673	29-Dec-99	METHOD AND APPARATUS FOR DC OFFSET CORRECTION
6677876	13-Jan-04	10/228580	27-Aug-02	DIFFERENTIAL SIGMA-DELTA DAC WITH DYNAMIC SPECTRAL SHAPING
6690748	10-Feb-04	10/036620	21-Dec-01	RECEIVER WITH IMPROVED DIGITAL INTERMEDIATE TO BASE BAND DEMODULATOR
6594317	15-Jul-03	10/029038	08-Apr-02	SIMPLE ENCODING/DECODING TECHNIQUE FOR CODE POSITION MODULATION
5343437	30-Aug-94	08/019492	19-Feb-93	MEMORY HAVING NONVOLATILE AND VOLATILE MEMORY BANKS
▇▇▇▇▇▇▇	13-Jan-04	10/134300	29-Apr-02	SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER AND METHOD
6700520	02-Mar-04	10/244317	16-Sep-02	MULTI-BIT CONTINUOUS TMIE SIGMA-DELTA ADC
7063919	20-Jun-06	10/209167	31-Jul-02	LITHOGRAPHIC TEMPLATE HAVING A REPAIRED GAP DEFECT METHOD OF REPAIR AND USE
6772813	10-Aug-04	10/328231	23-Dec-02	REMOVABLE HEATED END EFFECTOR
6803836	12-Oct-04	10/256304	27-Sep-02	MULTILAYER CERAMIC PACKAGE TRANSMISSION LINE PROBE
6649445	18-Nov-03	10/241265	11-Sep-02	WAFER COATING AND SINGULATION METHOD
6650022	18-Nov-03	10/241017	11-Sep-02	SEMICONDUCTOR DEVICE EXHIBITING ENHANCED PATTERN RECOGNITION WHEN ILLUMINATED IN A MACHINE VISION SYSTEM
6638872	28-Oct-03	10/255881	26-Sep-02	INTEGRATION OF MONOCRYSTALLINE OXIDE DEVICES WITH FULLY DEPLETED CMOS ON NON-SILICON SUBSTRATES
6730623	04-May-04	10/256931	27-Sep-02	COFIREABLE DIELECTRIC COMPOSITION
6819200	16-Nov-04	10/206164	26-Jul-02	BROADBAND BALUN AND IMPEDANCE TRANSFORMER FOR PUSH-PULL AMPLIFIERS
6614307	02-Sep-03	10/211825	02-Aug-02	HYBRID STRUCTURE FOR DISTRIBUTED POWER AMPLIFIERS
7432024	07-Oct-08	11/423621	12-Jun-06	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
7083880	01-Aug-06	10/222734	15-Aug-02	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
6821878	23-Nov-04	10/376405	27-Feb-03	AREA-ARRAY DEVICE ASSEMBLY WITH PRE-APPLIED UNDERFILL LAYERS ON PRINTED WIRING BOARD
6974776	13-Dec-05	10/611546	01-Jul-03	ACTIVATION PLATE FOR ELECTROLESS AND IMMERSION PLATING OF INTEGRATED CIRCUITS
7432838	07-Oct-08	10/554805	30-Apr-04	METHOD AND APPARATUS FOR REDUCED POWER CONSUMPTION ADC CONVERSION


Patent No.	Grant Date	Appl No.	Appl Date	Title
6890816	10-May-05	10/359879	07-Feb-03	COMPOUND SEMICONDUCTOR STRUCTURE INCLUDING AN EPITAXIAL PEROVSKITE LAYER AND METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURES AND DEVICES
6811936	02-Nov-04	10/334297	31-Dec-02	STRUCTURE AND PROCESS FOR A PELLICLE MEMBRANE FOR 157 NANOMETER LITHOGRAPHY
7265994	04-Sep-07	10/356419	31-Jan-03	UNDERFILL FILM FOR PRINTED WIRING ASSEMBLIES
6774732	10-Aug-04	10/367007	14-Feb-03	SYSTEM AND METHOD FOR COARSE TUNING A PHASE LOCKED LOOP (PLL) SYNTHESIZER USING 2-PI SLIP DETECTION
6837293	04-Jan-05	10/462160	16-Jun-03	HEATED NOZZLE ASSEMBLY
6764864	20-Jul-04	10/418372	17-Apr-03	BST ON LOW-LOSS SUBSTRATES FOR FREQUENCY AGILE APPLICATIONS
7019403	28-Mar-06	10/652136	29-Aug-03	ADHESIVE FILM AND TACKING PADS FOR PRINTED WIRING ASSEMBLIES
7105886	12-Sep-06	10/895552	21-Jul-04	HIGH K DIELECTRIC FILM
7078796	18-Jul-06	10/610745	01-Jul-03	CORROSION-RESISTANT COPPER BOND PAD AND INTEGRATED DEVICE
6992371	31-Jan-06	10/892693	16-Jul-04	DEVICE INCLUDING AN AMORPHOUS CARBON LAYER FOR IMPROVED ADHESION OF ORGANIC LAYERS AND METHOD OF FABRICATION
7596134	29-Sep-09	10/613853	02-Jul-03	FLEXIBLE METHOD AND APPARATUS FOR PERFORMING DIGITAL MODULATION AND DEMODULATION
7406102	29-Jul-08	10/613476	02-Jul-03	MULTI-MODE METHOD AND APPARATUS FOR PERFORMING DIGITAL MODULATION AND DEMODULATION
7457726	25-Nov-08	11/199562	08-Aug-05	SYSTEM AND METHOD FOR SELECTIVELY OBTAINING PROCESSOR DIAGNOSTIC DATA
7653675	26-Jan-10	11/199576	08-Aug-05	CONVOLUTION OPERATION IN A MULTI-MODE WIRELESS PROCESSING SYSTEM
5778306	07-Jul-98	08/745345	08-Nov-96	LOW LOSS HIGH FREQUENCY TRANSMITTING/RECEIVING SWITCHING MODULE
6100787	08-Aug-00	08/864300	28-May-97	MULTILAYER CERAMIC PACKAGE WITH LOW-VARIANCE EMBEDDED RESISTORS [AND METHOD OF MAKING SAME]
6137062	24-Oct-00	09/076048	11-May-98	BALL GRID ARRAY WITH RECESSED SOLDER BALLS
5973568	26-Oct-99	09/088356	01-Jun-98	POWER AMPLIFIER OUTPUT MODULE FOR DUAL-MODE DIGITAL SYSTEMS
6289204	11-Sep-01	09/112733	09-Jul-98	INTEGRATION OF A RECEIVER FRONT-END IN MULTILAYER CERAMIC INTEGRATED CIRCUIT TECHNOLOGY
6576520	10-Jun-03	10/040984	07-Jan-02	AMORPHOUS CARBON LAYER FOR IMPROVED ADHESION OF PHOTORESIST AND METHOD OF FABRICATION
6368924	09-Apr-02	09/703208	31-Oct-00	AMORPHOUS CARBON LAYER FOR IMPROVED ADHESION OF PHOTORESIST AND METHOD OF FABRICATION
6791125	14-Sep-04	10/261370	30-Sep-02	SEMICONDUCTOR DEVICE STRUCTURES WHICH UTILIZE METAL SULFIDES
5835999	10-Nov-98	08/660624	06-Jun-96	LOW POWER REGENERATIVE FEEDBACK DEVICE AND METHOD
6580172	17-Jun-03	10/103608	21-Mar-02	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
6387787	14-May-02	09/797558	02-Mar-01	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
5818276	06-Oct-98	08/610178	04-Mar-96	NON-OVERLAPPING CLOCK GENERATOR CIRCUIT AND METHOD THEREFOR
5525920	11-Jun-96	08/431965	01-May-95	COMPARATOR CIRCUIT AND METHOD THEREFOR
6430593	06-Aug-02	09/037173	10-Mar-98	METHOD, DEVICE AND ARTICLE OF MANUFACTURE FOR EFFICIENT TASK SCHEDULING IN A MULTI-TASKING PREEMPTIVE PRIORITY-BASED REAL-TIME OPERATING SYSTEM
6360243	19-Mar-02	09/041101	10-Mar-98	METHOD, DEVICE AND ARTICLE OF MANUFACTURE FOR IMPLEMENTING A REAL-TIME TASK SCHEDULING ACCELERATOR
6128672	03-Oct-00	09/037692	10-Mar-98	DATA TRANSFER USING SOFTWARE INTERRUPT SERVICE ROUTINE BETWEEN HOST PROCESSOR AND EXTERNAL DEVICE WITH QUEUE ON HOST PROCESSOR AND HARDWARE QUEUE POINTERS ON EXTERNAL DEVICE
6411232	25-Jun-02	09/409779	30-Sep-99	METHOD AND SYSTEM FOR DETERMINING AN ELEMENT CONVERSION CHARACTERISTIC CONTEMPORANEOUS WITH CONVERTING AN INPUT SIGNAL IN A SIGNAL CONVERTER
7042964	09-May-06	10/023543	17-Dec-01	VITERBI DECODER, METHOD AND UNIT THEREFOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
7340178	04-Mar-08	10/504009	13-Jan-03	CONVERSION BETWEEN OPTICAL AND RADIO FREQUENCY SIGNALS
6517977	11-Feb-03	09/819388	28-Mar-01	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
6737202	18-May-04	10/081199	22-Feb-02	METHOD OF FABRICATING A TIERED STRUCTURE USING A MULTI-LAYERED RESIST STACK AND USE
6852454	08-Feb-05	10/174464	18-Jun-02	MULTI-TIERED LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
5214705	25-May-93	07/769307	01-Oct-91	CIRCUIT AND METHOD FOR COMMUNICATING DIGITAL AUDIO INFORMATION
5258999	02-Nov-93	07/770507	03-Oct-91	CIRCUIT AND METHOD FOR RECEIVING AND TRANSMITTING CONTROL AND STATUS INFORMATION
5119149	02-Jun-92	07/600947	22-Oct-90	GATE-DRAIN SHIELD REDUCES GATE TO DRAIN CAPACITANCE
5041740	20-Aug-91	07/516636	30-Apr-90	PARALLEL CLOCKED LATCH
5032741	16-Jul-91	07/532723	04-Jun-90	CDCFL LOGIC CIRCUITS HAVING SHARED LOADS
5060031	22-Oct-91	07/584014	18-Sep-90	COMPLEMENTARY HETEROJUNCTION FIELD EFFECT TRANSISTOR WITH AN ANISOTYPE N+ GATE FOR P-CHANNEL DEVICES
5081511	14-Jan-92	07/578167	06-Sep-90	HETEROJUNCTION FIELD EFFECT TRANSISTOR WITH MONOLAYERS IN CHANNEL REGION
5075744	24-Dec-91	07/620819	03-Dec-90	GAAS HETEROSTRUCTURE HAVING A GAASYP1-Y STRESS-COMPENSATION LAYER
5034092	23-Jul-91	07/594790	09-Oct-90	PLASMA ETCHING OF SEMICONDUCTOR SUBSTRATES
5185278	09-Feb-93	07/601087	22-Oct-90	METHOD OF MAKING SELF-ALIGNED GATE PROVIDING IMPROVED BREAKDOWN VOLTAGE
5116774	26-May-92	07/673438	22-Mar-91	HETEROJUNCTION METHOD AND STRUCTURE
5107148	21-Apr-92	07/684634	12-Apr-91	BIDIRECTIONAL BUFFER HAVING TRI-STATE BUFFERS FOR CIRCUIT ISOLATION
5298441	29-Mar-94	07/709741	03-Jun-91	METHOD OF MAKING HIGH TRANSCONDUCTANCE HETEROSTRUCTURE FIELD EFFECT TRANSISTOR
5224198	29-Jun-93	07/767180	30-Sep-91	WAVEGUIDE VIRTUAL IMAGE DISPLAY
5273615	28-Dec-93	07/862892	06-Apr-92	APPARATUS AND METHOD FOR HANDLING FRAGILE SEMICONDUCTOR WAFERS
5275971	04-Jan-94	07/871785	20-Apr-92	METHOD OF FORMING AN OHMIC CONTACT TO III-V SEMICONDUCTOR MATERIALS
5430327	04-Jul-95	08/121081	14-Sep-93	OHMIC CONTACT FOR III-V SEMICONDUCTOR MATERIALS
5256599	26-Oct-93	07/891111	01-Jun-92	SEMICONDUCTOR WAFER WAX MOUNTING AND THINNING PROCESS
5221849	22-Jun-93	07/899439	16-Jun-92	SEMICONDUCTOR DEVICE WITH ACTIVE QUANTUM WELL GATE
5355005	11-Oct-94	07/971118	04-Nov-92	SELF-DOPED COMPLEMENTARY FIELD EFFECT TRANSISTOR
5545359	13-Aug-96	08/288854	11-Aug-94	METHOD OF MAKING A PLASTIC MOLDED OPTOELECTRONIC INTERFACE
5539200	23-Jul-96	08/334175	03-Nov-94	INTEGRATED OPTOELECTRONIC SUBSTRATE
5399893	21-Mar-95	08/111326	24-Aug-93	DIODE PROTECTED SEMICONDUCTOR DEVICE
5336327	09-Aug-94	08/154575	19-Nov-93	CVD REACTOR WITH UNIFORM LAYER DEPOSITING ABILITY
6064780	16-May-00	08/348414	02-Dec-94	INTERCONNECT SUBSTRATE WITH A SINGLE CONTACT ACCESSIBLE IN AN UPPER AND AN END SURFACE
5326985	05-Jul-94	07/951994	28-Sep-92	BIPOLAR DOPED SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING
5388323	14-Feb-95	08/263117	21-Jun-94	Method of forming a probe for an atomic force microscope [PROBE FOR PROVIDING SURFACE IMAGES]
5444016	22-Aug-95	08/083751	25-Jun-93	METHOD OF MAKING OHMIC CONTACTS TO A COMPLEMENTARY III-V SEMICONDUCTOR DEVICE
5480829	02-Jan-96	08/083755	25-Jun-93	METHOD OF MAKING A III-V COMPLEMENTARY HETEROSTRUCTURE DEVICE WITH COMPATIBLE NON-GOLD OHMIC CONTACTS
5349214	20-Sep-94	08/119554	13-Sep-93	COMPLEMENTARY HETEROJUNCTION DEVICE
5427965	27-Jun-95	08/262292	20-Jun-94	METHOD OF FABRICATING A COMPLEMENTARY HETEROJUNCTION FET
5410158	25-Apr-95	08/007229	22-Jan-93	BIPOLAR TRANSISTOR APPARATUS WITH ISO-TERMINALS
5615473	01-Apr-97	08/453856	30-May-95	METHOD OF MAKING A FERRITE/SEMICONDUCTOR RESONATOR/FILTER


Patent No.	Grant Date	Appl No.	Appl Date	Title
5658810	19-Aug-97	08/563432	24-Nov-95	METHOD FOR MAKING A SENSOR FOR DETERMINING A RATIO OF MATERIALS IN A MIXTURE
5500543	19-Mar-96	08/223068	04-Apr-94	SENSOR FOR DETERMINING A RATIO OF MATERIALS IN A MIXTURE AND METHOD
5397717	14-Mar-95	08/090858	12-Jul-93	A METHOD OF FABRICATING A SILICON CARBIDE VERTICAL MOSFET [AND DEVICE]
5371038	06-Dec-94	08/139180	21-Oct-93	METHOD OF FORMING A QUANTUM MULTI-FUNCTION SEMICONDUCTOR DEVICE
5511170	23-Apr-96	08/100815	02-Aug-93	DIGITAL BUS DATA RETENTION
5883404	16-Mar-99	08/297279	29-Aug-94	COMPLEMENTARY HETEROJUNCTION SEMICONDUCTOR DEVICE
5739557	14-Apr-98	08/384050	06-Feb-95	REFRACTORY GATE HETEROSTRUCTURE FIELD EFFECT TRANSISTOR
5760459	02-Jun-98	08/835548	08-Apr-97	HIGH PERFORMANCE HIGH VOLTAGE NON-EPI BIPOLAR TRANSISTOR
5895247	20-Apr-99	08/905008	11-Aug-97	METHOD OF FORMING A HIGH PERFORMANCE, HIGH VOLTAGE NON-EPI BIPOLAR TRANSISTOR
5574457	12-Nov-96	08/489349	12-Jun-95	SWITCHED CAPACITOR GAIN STAGE
5796256	18-Aug-98	08/634600	24-Apr-96	ESO SENSOR AND METHOD OF USE
5977950	02-Nov-99	08/158337	29-Nov-93	MANUALLY CONTROLLABLE CURSOR IN A VIRTUAL IMAGE
5399887	21-Mar-95	08/238081	03-May-94	MODULATION DOPED FIELD EFFECT TRANSISTOR
5821911	13-Oct-98	08/371674	12-Jan-95	MINIATURE VIRTUAL IMAGE COLOR DISPLAY
5969698	19-Oct-99	08/158342	29-Nov-93	MANUALLY CONTROLLABLE CURSOR AND CONTROL PANEL IN A VIRTUAL IMAGE
5491491	13-Feb-96	08/332170	31-Oct-94	PORTABLE ELECTRONIC EQUIPMENT WITH BINOCULAR VIRTUAL DISPLAY
5852316	22-Dec-98	08/298721	31-Aug-94	COMPLEMENTARY HETEROJUNCTION AMPLIFIER
5477169	19-Dec-95	08/261799	20-Jun-94	LOGIC CIRCUIT WITH NEGATIVE DIFFERENTIAL RESISTANCE DEVICE [AND METHODS OF FABRICATION]
5748161	05-May-98	08/610533	04-Mar-96	INTEGRATED ELECTRO-OPTICAL PACKAGE WITH INDEPENDENT MENU BAR
5818404	06-Oct-98	08/610532	04-Mar-96	INTEGRATED ELECTRO-OPTICAL PACKAGE
5661312	26-Aug-97	08/413319	30-Mar-95	SILICON CARBIDE MOSFET
5621225	15-Apr-97	08/599434	18-Jan-96	Light emitting diode display package LED DISPLAY PACKAGING WITH SUBSTRATE REMOVAL AND METHOD OF FABRICATION
5489988	06-Feb-96	08/368502	03-Jan-95	ENVIRONMENTAL SENSOR AND METHOD THEREFOR
5571374	05-Nov-96	08/538064	02-Oct-95	METHOD OF ETCHING SILICON CARBIDE
5885860	23-Mar-99	08/874433	16-Jun-97	SILICON CARBIDE TRANSISTOR AND METHOD
6002148	14-Dec-99	08/497569	30-Jun-95	SILICON CARBIDE TRANSISTOR AND METHOD
5514891	07-May-96	08/459855	02-Jun-95	N-TYPE HIGFET AND METHOD
5751159	12-May-98	08/523327	05-Sep-95	SEMICONDUCTOR ARRAY AND SWITCHES FORMED ON A COMMON SUBSTRATE FOR ARRAY TESTING PURPOSES
5641695	24-Jun-97	08/538063	02-Oct-95	METHOD OF FORMING A SILICON CARBIDE JFET
5856684	05-Jan-99	08/712760	12-Sep-96	HIGH POWER HFET WITH IMPROVED CHANNEL INTERFACES
5831699	03-Nov-98	08/639671	29-Apr-96	DISPLAY WITH INACTIVE PORTIONS AND ACTIVE PORTIONS AND HAVING DRIVERS IN THE INACTIVE PORTIONS
▇▇▇▇▇▇▇	20-Apr-99	08/625606	29-Mar-96	METHOD OF FABRICATING SEMICONDUCTOR DEVICES AND THE DEVICES
5583350	10-Dec-96	08/552155	02-Nov-95	FULL COLOR LIGHT EMITTING DIODE DISPLAY ASSEMBLY
5693955	02-Dec-97	08/625666	29-Mar-96	TUNNEL TRANSISTOR
5975757	02-Nov-99	09/055121	03-Apr-98	PROVE FOR PROVIDING SURFACE IMAGES AND METHOD FOR MAKING
5725788	10-Mar-98	08/608022	04-Mar-96	APPARATUS AND METHOD FOR PATTERNING A SURFACE
5895929	20-Apr-99	09/110976	07-Jul-98	LOW SUBTHRESHOLD LEAKAGE CURRENT HFET
5612232	18-Mar-97	08/625605	29-Mar-96	A METHOD OF FABRICATING SEMICONDUCTOR DEVICES AND THE DEVICES
5665658	09-Sep-97	08/620688	21-Mar-96	METHOD OF FORMING A DIELECTRIC LAYER STRUCTURE
5940683	17-Aug-99	08/588470	18-Jan-96	LED DISPLAY PACKAGING WITH SUBSTRATE REMOVAL AND METHOD OF FABRICATION
5597768	28-Jan-97	08/619400	21-Mar-96	METHOD OF FORMING A GA203 DIELECTRIC LAYER


Patent No.	Grant Date	Appl No.	Appl Date	Title
5780878	14-Jul-98	08/681684	29-Jul-96	LATERAL GATE VERTICAL DRIFT REGION TRANSISTOR
5818634	06-Oct-98	08/692360	05-Aug-96	DUAL MODE OPTICAL MAGNIFIER SYSTEM
5763862	09-Jun-98	08/672002	24-Jun-96	DUAL CARD SMART CARD READER [WITH VISUAL IMAGE DISPLAY]
5770849	23-Jun-98	08/702087	23-Aug-96	SMART CARD DEVICE WITH PAGER AND VISUAL IMAGE DISPLAY
5784141	21-Jul-98	08/726005	04-Oct-96	BI-STABLE NON-PIXELLATED PHASE SPATIAL LIGHT MODULATOR FOR ENHANCED DISPLAY RESOLUTION AND METHOD OF FABRICATION
5789733	04-Aug-98	08/717058	20-Sep-96	SMART CARD WITH CONTACTLESS OPTICAL INTERFACE
5801798	01-Sep-98	08/773538	23-Dec-96	FAST SPEED LIQUID CRYSTAL PHASE SPATIAL LIGHT MODULATOR FOR ENHANCED DISPLAY RESOLUTION
5838416	17-Nov-98	08/799316	13-Feb-97	DEVICE AND METHOD FOR ENHANCING THE VIEWING ANGLE OF A DISPLAY
5801799	01-Sep-98	08/773539	23-Dec-96	MULTI-DIRECTIONAL LIQUID CRYSTAL PHASE SPATIAL LIGHT MODULATOR FOR ENHANCED DISPLAY RESOLUTION
5973379	26-Oct-99	09/080480	18-May-98	FERROELECTRIC SEMICONDUCTOR DEVICE
5851844	22-Dec-98	08/743761	07-Nov-96	FERROELECTRIC SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
6452205	17-Sep-02	09/819438	29-Mar-01	SPARSE-CARRIER DEVICES AND METHOD OF FABRICATION
6262451	17-Jul-01	08/816707	13-Mar-97	ELECTRODE STRUCTURE FOR TRANSISTORS NON-VOLATILE MEMORIES AND THE LIKE
6025735	15-Feb-00	08/772735	23-Dec-96	PROGRAMMABLE SWITCH MATRIX AND METHOD OF PROGRAMMING
5789766	04-Aug-98	08/820851	20-Mar-97	LED ARRAY WITH STACKED DRIVER CIRCUITS AND METHODS OF MANUFACTURE
▇▇▇▇▇▇▇	09-Mar-99	08/775054	27-Dec-96	METHOD OF PASSIVATING SEMICONDUCTOR DEVICES AND THE PASSIVATED DEVICES
6147741	14-Nov-00	08/806272	25-Feb-97	[DIGITAL SCANNER AND METHOD OF FABRICATION] Digital scanner employing recorded phase information and method of fabrication
6255710	03-Jul-01	09/072339	04-May-98	3-D SMART POWER IC
5846847	08-Dec-98	08/743769	07-Nov-96	Method of manufacturing a ferroelectric device FERROELECTRIC SEMICONDUCTOR DEVICE FERROELECTRIC SEMICONDUCTOR SUBSTRATE AND METHODS OF MANUFACTURE
6001722	14-Dec-99	08/879379	20-Jun-97	METALLIZATION/DEPOSITION FOR SEMICONDUCTOR DEVICES
5904553	18-May-99	08/917119	25-Aug-97	FABRICATION METHOD FOR A GATE QUALITY OXIDE-COMPOUND SEMICONDUCTOR STRUCTURE
6359294	19-Mar-02	08/812952	04-Mar-97	INSULATOR COMPOUND SEMICONDUCTOR INTERFACE STRUCTURE [AND METHODS OF FABRICATION]
6030453	29-Feb-00	08/812950	04-Mar-97	III-V EPITAXIAL WAFER PRODUCTION
6100549	08-Aug-00	09/133041	12-Aug-98	HIGH BREAKDOWN VOLTAGE RESURF HFET
5907792	25-May-99	08/917122	25-Aug-97	METHOD OF FORMING A SILICON NITRIDE LAYER
5917204	29-Jun-99	08/829035	31-Mar-97	INSULATED GATE BIPOLAR TRANSISTOR WITH REDUCED ELECTRIC FIELDS
5877047	02-Mar-99	08/912221	15-Aug-97	LATERAL GATE, VERTICAL DRIFT REGION TRANSLATION
5937285	10-Aug-99	08/863109	23-May-97	METHOD OF FABRICATING SUBMICRON FETS AND [DEVICE] with low temperature group III-V material
5902130	11-May-99	08/896234	17-Jul-97	THERMAL PROCESSING OF OXIDE COMPOUND SEMICONDUCTOR STRUCTURE
5933750	03-Aug-99	09/054561	03-Apr-98	METHOD OF FABRICATING A SEMICONDUCTOR DEVICE WITH A THINNED SUBSTRATE
6026013	15-Feb-00	09/163877	30-Sep-98	QUANTUM RANDOM ADDRESS MEMORY
6262461	17-Jul-01	09/102105	22-Jun-98	METHOD AND APPARATUS FOR CREATING A VOLTAGE THRESHOLD IN A FET
6472278	29-Oct-02	09/679184	22-Jan-01	METHOD AND APPARATUS FOR CREATING A VOLTAGE THRESHOLD IN A FET
6222686	24-Apr-01	09/425855	22-Oct-99	GRADIENT INDEX MAGNIFYING LENS
6657683	02-Dec-03	10/142037	09-May-02	FRONT ILLUMINATOR FOR A LIQUID CRYSTAL DISPLAY AND METHOD OF MAKING SAME
6421104	16-Jul-02	09/426169	22-Oct-99	FRONT ILLUMINATOR FOR A LIQUID CRYSTAL DISPLAY AND


Patent No.	Grant Date	Appl No.	Appl Date	Title
				METHOD OF MAKING SAME
6025281	15-Feb-00	08/993603	18-Dec-97	PASSIVATION OF OXIDE-COMPOUND SEMICONDUCTOR INTERFACES
6110840	29-Aug-00	09/024148	17-Feb-98	METHOD OF PASSIVATING THE SURFACE OF A SI SUBSTRATE
6131017	10-Oct-00	09/049534	27-Mar-98	DUAL SYSTEM PORTABLE ELECTRONIC COMMUNICATOR
6115618	05-Sep-00	09/028438	24-Feb-98	PORTABLE ELECTRONIC DEVICE WITH REMOVABLE DISPLAY
6069593	30-May-00	09/028539	24-Feb-98	DISPLAY CARRIER AND ELECTRONIC DISPLAY CONTROL FOR MULTIPLE DISPLAYS IN A PORTABLE ELECTRONIC DEVICE
6029073	22-Feb-00	09/028035	24-Feb-98	DISPLAY CARRIER WITH BINOCULAR VIEWING FOR A PORTABLE ELECTRONIC DEVICE
6494217	17-Dec-02	09/768107	23-Jan-01	LASER CLEANING PROCESS FOR SEMICONDUCTOR MATERIAL AND THE LIKE
6061137	09-May-00	09/072756	04-May-98	INSITU ENDPOINT DETECTION FOR MEMBRANE FORMATION
6043143	28-Mar-00	09/072197	04-May-98	OHMIC CONTACT AND METHOD OF MANUFACTURE
6265329	24-Jul-01	09/036947	09-Mar-98	QUANTUM DEPOSITION DISTRIBUTION CONTROL
6057566	02-May-00	09/069338	29-Apr-98	SEMICONDUCTOR DEVICE
6083806	04-Jul-00	09/110352	06-Jul-98	METHOD OF FORMING AN ALIGNMENT ▇▇▇▇
6630746	07-Oct-03	09/566961	09-May-00	SEMICONDUCTOR DEVICE AND METHOD OF MAKING THE SAME
6211530	03-Apr-01	09/097026	12-Jun-98	SPARSE-CARRIER DEVICES AND METHOD OF FABRICATION
6097627	01-Aug-00	09/163878	30-Sep-98	QUANTUM RANDOM ADDRESS MEMORY WITH NANO-DIODE MIXER
5991190	23-Nov-99	09/163879	30-Sep-98	QUANTUM RANDOM ADDRESS MEMORY WITH PIEZO READOUT
6016269	18-Jan-00	09/163880	30-Sep-98	QUANTUM RANDOM ADDRESS MEMORY WITH MAGNETIC READOUT AND/OR NANO-MEMORY ELEMENTS
6236611	22-May-01	09/467788	20-Dec-99	PEAK PROGRAM CURRENT APPARATUS AND METHOD
6365474	02-Apr-02	09/599697	22-Jun-00	Method of fabricating an integrated circuit SEMICONDUCTOR DEVICE AND METHOD
6703258	09-Mar-04	10/187526	02-Jul-02	ENHANCED PROBE FOR GATHERING DATA FROM SEMICONDUCTOR DEVICES
6479892	12-Nov-02	09/703107	31-Oct-00	ENHANCED PROBE FOR GATHERING DATA FROM SEMICONDUCTOR DEVICES
6420923	16-Jul-02	09/614311	12-Jul-00	LOW SUPPLY CURRENT CONTROLLED FET P1 ATTENUATOR
6320425	20-Nov-01	09/614324	12-Jul-00	DUAL FET DIFFERENTIAL VOLTAGE CONTROLLED ATTENUATOR
6452445	17-Sep-02	09/594988	15-Jun-00	VOLTAGE CONTROLLED VARIABLE GAIN ELEMENT
6433626	13-Aug-02	09/761085	16-Jan-01	CURRENT MODE FILTER WITH COMPLEX ZEROS
6845233	18-Jan-05	09/973596	09-Oct-01	RF RECEIVERS WITH REDUCED SPURIOUS RESPONSE FOR MOBILE STATIONS AND METHODS THEREFOR
6487398	26-Nov-02	09/929578	14-Aug-01	LOW NOISE ARCHITECTURE FOR A DIRECT CONVERSION TRANSMITTER
6950910	27-Sep-05	10/008939	08-Nov-01	MOBILE WIRELESS COMMUNICATION DEVICE ARCHITECTURES AND METHODS THEREFOR
7127563	24-Oct-06	11/220735	07-Sep-05	SHARED MEMORY ARCHITECTURE
6239636	29-May-01	09/569417	12-May-00	DIGITAL WAVEFORM GENERATOR APPARATUS AND METHOD THEREFOR
6693490	17-Feb-04	10/092968	07-Mar-02	IMPROVED ADJUSTABLE GAIN CONTROL SYSTEM AND METHOD THEREOF
6889036	03-May-05	10/092932	07-Mar-02	INTEGRATED FREQUENCY SELECTABLE RESONANT COUPLING NETWORK AND METHOD THEREOF
6406791	18-Jun-02	09/638228	14-Aug-00	MULTIPHASE DIALECTRIC COMPOSITION AND MULTILAYERED DEVICE INCORPORATING THE SAME
6459344	01-Oct-02	09/810681	19-Mar-01	SWITCH ASSEMBLY AND METHOD OF FORMING THE SAME
6377125	23-Apr-02	09/809377	15-Mar-01	DISTRIBUTED AMPLIFIER HAVING SEPARATELY BIASED SECTIONS
7506438	24-Mar-09	09/712749	14-Nov-00	LOW PROFILE INTEGRATED MODULE INTERCONNECTS AND METHOD OF FABRICATION
6648999	18-Nov-03	09/940291	27-Aug-01	LOW-PRESSURE LAMINATED CERAMIC DEVICES AND METHOD
6433640	13-Aug-02	09/865266	25-May-01	METHODS AND APPARATUS FOR AMPLIFYING A TELECOMMUNICATION SIGNAL
6714095	30-Mar-04	10/174238	18-Jun-02	TAPERED CONSTANT “R” NETWORK FOR USE IN DISTRIBUTED AMPLIFIERS
6664606	16-Dec-03	10/128043	23-Apr-02	MULTILAYER integrated CIRCUIT structure [APPARATUS] WITH REDUCED magnetic COUPLING


Patent No.	Grant Date	Appl No.	Appl Date	Title
6653911	25-Nov-03	10/120170	10-Apr-02	A BROAD BAND IMPEDANCE MATCHING DEVICE WITH REDUCED LINE WIDTH
6664935	16-Dec-03	10/208961	31-Jul-02	BROAD BAND IMPEDANCE MATCHING DEVICE WITH COUPLED TRANSMISSION LINES
6426683	30-Jul-02	09/436428	09-Nov-99	INTEGRATED FILTER WITH IMPROVED I/O MATCHING AND METHOD OF FABRICATION
6278158	21-Aug-01	09/474681	29-Dec-99	VOLTAGE VARIABLE CAPACITOR WITH IMPROVED C-V LINEARITY
6410861	25-Jun-02	09/454342	03-Dec-99	LOW PROFILE INTERCONNECT STRUCTURE
6629367	07-Oct-03	09/730959	06-Dec-00	[METHOD FOR FORMING AN] ELECTRICALLY ISOLATED VIA IN A MULTILAYER CERAMIC PACKAGE [AND AN ELECTRICAL CONNECTION FORMED WITH THE VIA]
6556099	29-Apr-03	09/769886	25-Jan-01	MULTILAYERED TAPERED TRANSMISSION LINE, DEVICE AND METHOD FOR MAKING THE SAME
7446681	04-Nov-08	11/424064	14-Jun-06	LOOKUP TABLE ARRAY COMPRESSION AND INDEXING
7443256	28-Oct-08	11/775230	10-Jul-07	OSCILLATOR CIRCUIT WITH A VOLTAGE RESTRICTION BLOCK
7382158	03-Jun-08	11/867006	04-Oct-07	LEVEL SHIFTER CIRCUIT
7659704	09-Feb-10	12/022160	30-Jan-08	REGULATOR CIRCUIT
7573247	11-Aug-09	11/775231	10-Jul-07	SERIES REGULATOR CIRCUIT
7511537	31-Mar-09	11/869750	10-Oct-07	COMPARATOR CIRCUIT FOR REDUCING CURRENT CONSUMPTION BY SURPRESSING GLITCHES DURING A TRANSISTIONAL PERIOD
7612588	03-Nov-09	12/037094	26-Feb-08	POWER ON DETECTION CIRCUIT
7501876	10-Mar-09	11/873424	17-Oct-07	LEVEL SHIFTER CIRCUIT
7477082	13-Jan-09	11/749147	15-May-07	METHOD AND CIRCUIT FOR DRIVING H-BRIDGE THAT REDUCES SWITCHING NOISE
▇▇▇▇▇▇▇	24-Mar-09	11/759944	08-Jun-07	METHOD AND CIRCUIT FOR REDUCING REGULATOR OUTPUT NOISE
7576526	18-Aug-09	12/014809	16-Jan-08	OVERCURRENT DETECTION CIRCUIT
7652486	26-Jan-10	12/015515	17-Jan-08	CAPACITANCE DETECTION CIRCUIT INCLUDING VOLTAGE COMPENSATION FUNCTION
7635998	22-Dec-09	12/▇▇▇▇▇▇	10-Jul-08	PRE-DRIVER FOR BRIDGE CIRCUIT
▇▇▇▇▇▇▇	29-Oct-91	07/▇▇▇▇▇▇	03-Apr-90	SINGLE FAULT/TOLERANT MMIC SWITCHES
5194833	16-Mar-93	07/792568	▇▇-▇▇▇-▇▇	▇▇▇▇▇▇▇▇▇ COMPENSATED MICROWAVE CONDUCTORS
5387547	07-Feb-95	07/965319	23-Oct-92	PROCESS FOR ADJUSTING THE IMPEDANCE OF A MICROWAVE CONDUCTOR USING AN AIRBRIDGE
5296736	22-Mar-94	07/993563	21-Dec-92	LEVELED NON-COPLANAR SEMICONDUCTOR DIE CONTACTS
5501006	26-Mar-96	08/239796	09-May-94	METHOD FOR CONNECTION OF SIGNALS TO AN INTEGRATED CIRCUIT
5696797	09-Dec-97	08/279376	22-Jul-94	DEMODULATOR WITH BASEBAND DOPPLER SHIFT COMPENSATION AND METHOD
6159834	12-Dec-00	09/022595	12-Feb-98	METHOD OF FORMING A GATE QUALITY OXIDE COMPOUND SEMICONDUCTOR STRUCTURE
5945718	31-Aug-99	09/022593	12-Feb-98	SELF-ALIGNED METAL-OXIDE-COMPOUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION
6094295	25-Jul-00	09/022703	12-Feb-98	ULTRAVIOLET TRANSMITTING OXIDE WITH METALLIC OXIDE PHASE AND METHOD OF FABRICATION
6316164	13-Nov-01	09/527062	16-Mar-00	PROXIMITY EFFECT CORRECTION METHOD THROUGH UNIFORM REMOVAL OF FRACTION OF INTERIOR PIXELS
6531344	11-Mar-03	09/611043	06-Jul-00	HIGH FREQUENCY GALLIUM ARSENIDE MMIC DIE COATING METHOD
7005717	28-Feb-06	10/845523	14-May-04	SEMICONDUCTOR DEVICE AND METHOD
7105866	12-Sep-06	10/911624	05-Aug-04	HETEROJUNCTION TUNNELING DIODES AND PROCESS FOR FABRICATING SAME
6493497	10-Dec-02	09/669602	26-Sep-00	ELECTRO-OPTIC STRUCTURE AND PROCESS FOR FABRICATING SAME
6590236	08-Jul-03	09/624296	24-Jul-00	SEMICONDUCTOR STRUCTURE FOR USE WITH HIGH-FREQUENCY SIGNALS
6555946	29-Apr-03	09/624803	24-Jul-00	ACOUSTIC WAVE DEVICE AND PROCESS FOR FORMING THE SAME
6673646	06-Jan-04	09/795784	28-Feb-01	GROWTH OF COMPOUND SEMICONDUCTOR STRUCTURES ON PATTERNED OXIDE FILMS AND PROCESS FOR FABRICATING SAME
6501121	31-Dec-02	09/712875	15-Nov-00	SEMICONDUCTOR STRUCTURE [AND PROCESS FOR FABRICATING SAME]


Patent No.	Grant Date	Appl No.	Appl Date	Title
6427066	30-Jul-02	09/607420	30-Jun-00	APPARATUS AND METHOD FOR EFFECTING COMMUNICATIONS AMONG A PLURALITY OF REMOTE STATIONS
6410941	25-Jun-02	09/608931	30-Jun-00	RECONFIGURABLE SYSTEMS USING HYBRID INTEGRATED CIRCUITS WITH OPTICAL PORTS
6501973	31-Dec-02	09/607722	30-Jun-00	APPARATUS AND METHOD FOR MEASURING SELECTED PHYSICAL CONDITION OF AN ANIMATE SUBJECT
6477285	05-Nov-02	09/607744	30-Jun-00	INTEGRATED CIRCUITS WITH OPTICAL SIGNAL PROPAGATION
6638838	28-Oct-03	09/678372	02-Oct-00	SEMICONDUCTOR STRUCTURE INCLUDING A PARTIALLY ANNEALED LAYER AND METHOD OF FORMING THE SAME
6563118	13-May-03	09/733181	08-Dec-00	PYROELECTRIC DEVICE ON A MONOCRYSTALLINE SEMICONDUCTOR SUBSTRATE AND PROCESS FOR FABRICATING SAME
6559471	06-May-03	09/733688	08-Dec-00	QUANTUM WELL PHOTODETECTOR AND METHOD FOR FABRICATING SAME
6583034	24-Jun-03	09/740219	18-Dec-00	SEMICONDUCTOR STRUCTURE INCLUDING A COMPLIANT SUBSTRATE HAVING A GRADED MONOCRYSTALLINE LAYER AND METHODS FOR FABRICATING THE STRUCTURE AND SEMICONDUCTOR DEVICES INCLUDING THE STRUCTURE
7211852	01-May-07	11/117349	29-Apr-05	STRUCTURE AND METHOD FOR FABRICATING GAN DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE
7045815	16-May-06	10/207210	30-Jul-02	A SEMICONDUCTOR STRUCTURE EXHIBITING REDUCED LEAKAGE CURRENT AND METHOD OF FABRICATING SAME
6462360	08-Oct-02	09/921901	06-Aug-01	INTEGRATED GALLIUM ARSENIDE COMMUNICATION SYSTEMS
6673667	06-Jan-04	09/929021	15-Aug-01	METHOD FOR MANUFACTURING A SUBSTANTIALLY INTEGRAL MONOLITHIC APPARATUS INCLUDING A PLURALITY OF SEMICONDUCTOR MATERIALS
6646293	11-Nov-03	09/906783	18-Jul-01	STRUCTURE AND METHOD FOR FABRICATING [HETEROJUNCTION BIPOLAR TRANSISTORS AND] HIGH ELECTRON MOBILITY TRANSISTORS UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE [FOR MATERIALS USED TO FORM THE SAME]
6472276	29-Oct-02	09/908902	20-Jul-01	USING SILICATE LAYERS FOR COMPOSITE SEMICONDUCTOR STRUCTURES
7019332	28-Mar-06	09/908888	20-Jul-01	FABRICATION OF A WAVELENGTH LOCKER WITHIN A SEMICONDUCTOR STRUCTURE
6589856	08-Jul-03	09/921905	06-Aug-01	METHOD AND APPARATUS FOR CONTROLLING ANTI-PHASE DOMAINS IN SEMICONDUCTOR STRUCTURES AND DEVICES
6855992	15-Feb-05	09/910753	24-Jul-01	STRUCTURE AND METHOD FOR FABRICATING CONFIGURABLE TRANSISTOR DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE FOR MATERIALS USED TO FORM THE SAME
6667196	23-Dec-03	09/911507	25-Jul-01	METHOD FOR REAL-TIME MONITORING AND CONTROLLING PEROVSKITE OXIDE FILM GROWTH AND SEMICONDUCTOR STRUCTURE FORMED USING THE METHOD
6531740	11-Mar-03	09/905903	17-Jul-01	INTEGRATED IMPEDANCE MATCHING AND STABILITY NETWORK
6472694	29-Oct-02	09/910022	23-Jul-01	MICROPROCESSOR STRUCTURE having a compound semiconductor layer
7020374	28-Mar-06	10/356550	03-Feb-03	OPTICAL WAVEGUIDE STRUCTURE AND METHOD FOR FABRICATING THE SAME
6916717	12-Jul-05	10/137383	03-May-02	METHOD FOR GROWING A MONOCRYSTALLINE OXIDE LAYER AND FOR FABRICATING A SEMICONDUCTOR DEVICE ON A MONOCRYSTALLINE SUBSTRATE
6885065	26-Apr-05	10/299801	20-Nov-02	A FERROMAGNETIC SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
6965128	15-Nov-05	10/356549	03-Feb-03	STRUCTURE AND METHOD FOR FABRICATING SEMICONDUCTOR MICRORESONATOR DEVICES
6806202	19-Oct-04	10/309500	03-Dec-02	METHOD OF REMOVING SILICON OXIDE FROM A SURFACE OF A SUBSTRATE
7169619	30-Jan-07	10/299246	19-Nov-02	A METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURES AND DEVICES ON VICINAL SUBSTRATES USING A LOW TEMPERATURE, LOW PRESSURE, ALKALINE EARTH METAL-RICH PROCESS
6963090	08-Nov-05	10/339379	09-Jan-03	ENHANCEMENT MODE METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR
7342276	11-Mar-08	10/861467	07-Jun-04	METHOD AND APPARATUS UTILIZING MONOCRYSTALLINE INSULATOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
6113690	05-Sep-00	09/093081	08-Jun-98	METHOD OF PREPARING CRYSTALLINE ALKALINE EARTH METAL OXIDES ON A SI SUBSTRATE
6241821	05-Jun-01	09/273929	22-Mar-99	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A CRYSTALLINE ALKALINE EARTH METAL OXIDE INTERFACE WITH SILICON
6224669	01-May-01	09/662390	14-Sep-00	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A CRYSTALLINE ALKALINE EARTH METAL OXIDE INTERFACE WITH SILICON
6248459	19-Jun-01	09/274268	22-Mar-99	SEMICONDUCTOR STRUCTURE HAVING A CRYSTALLINE ALKALINE EARTH METAL OXIDE INTERFACE WITH SILICON
6319730	20-Nov-01	09/354522	15-Jul-99	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE INCLUDING A METAL OXIDE INTERFACE
6270568	07-Aug-01	09/354173	15-Jul-99	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE WITH REDUCED LEAKAGE CURRENT DENSITY
6693298	17-Feb-04	09/908707	20-Jul-01	STRUCTURE AND METHOD FOR FABRICATING EPITAXIAL SEMICONDUCTOR ON INSULATOR (SOI) STRUCTURES AND DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE FOR MATERIALS USED TO FORM SAME
6709989	23-Mar-04	09/885409	21-Jun-01	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE INCLUDING A MONOCRYSTALLINE METAL OXIDE INTERFACE WITH SILICON
6479173	12-Nov-02	09/465623	17-Dec-99	SEMICONDUCTOR STRUCTURE HAVING A CRYSTALLINE ALKALINE EARTH METAL SILICON NITRIDE/OXIDE INTERFACE WITH SILICON
6291319	18-Sep-01	09/465622	17-Dec-99	METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A STABLE CRYSTALLINE INTERFACE WITH SILICON
6693033	17-Feb-04	09/983854	26-Oct-01	METHOD OF REMOVING AN AMORPHOUS OXIDE FROM A MONOCRYSTALLINE SURFACE
7067856	27-Jun-06	10/768108	02-Feb-04	SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, COMMUNICATING DEVICE, INTEGRATED CIRCUIT, AND PROCESS FOR FABRICATING THE SAME
6392257	21-May-02	09/502023	10-Feb-00	SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR DEVICE, COMMUNICATING DEVICE, INTEGRATED CIRCUIT, AND PROCESS FOR FABRICATING THE SAME
7434039	07-Oct-08	11/470728	07-Sep-06	COMPUTER PROCESSOR CAPABLE OF RESPONDING WITH A COMPARABLE EFFICIENCY TO BOTH SOFTWARE-STATE-INDEPENDENT AND STATE-DEPENDENT EVENTS
6492202	10-Dec-02	09/473303	28-Dec-99	METHOD OF ASSEMBLING COMPONENTS ONTO A CIRCUIT BOARD [AND ELECTRONIC COMPONENT THEREOF]
6151594	21-Nov-00	08/294235	22-Aug-94	ARTIFICIAL NEURON AND METHOD OF USING SAME
5548685	20-Aug-96	08/176604	03-Jan-94	ARTIFICIAL NEURON USING ADDER CIRCUIT AND METHOD OF USING SAME
5740325	14-Apr-98	08/764113	09-Dec-96	Computer system having a polynomial co-processor [COMPUTER UTILIZING NEURAL NETWORK AND METHOD OF USING SAME]
5583964	10-Dec-96	08/235996	02-May-94	COMPUTER UTILIZING NEURAL NETWORK AND METHOD OF USING SAME
5958001	28-Sep-99	08/220772	31-Mar-94	OUTPUT PROCESSING CIRCUIT FOR A NEURAL NETWORK AND METHOD OF USING SAME
5737768	07-Apr-98	08/808225	28-Feb-97	METHOD AND SYSTEM FOR STORING DATA BLOCKS IN A MEMORY DEVICE
5948052	07-Sep-99	08/838251	17-Apr-97	APPARATUS USING A LOGARITHM BASED PROCESSOR AND AN AUDIO AMPLIFIER [PER JGT THIS IS CIP OF 341N]
5642305	24-Jun-97	08/381368	31-Jan-95	LOGARITHM/INVERSE-LOGARITHM CONVERTER AND METHOD OF USING SAME
6249857	19-Jun-01	08/954130	20-Oct-97	APPARATUS USING A MULTIPLE INSTRUCTION REGISTER LOGARITHM BASED PROCESSOR
7566648	28-Jul-09	11/738514	22-Apr-07	METHOD OF MAKING SOLDER PAD
7615806	10-Nov-09	11/263119	31-Oct-05	METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE AND STRUCTURE THEREOF
7391659	24-Jun-08	11/341809	27-Jan-06	METHOD FOR MULTIPLE STEP PROGRAMMING A MEMORY CELL
7521317	21-Apr-09	11/376412	15-Mar-06	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
7565639	21-Jul-09	11/650254	04-Jan-07	INTEGRATED ASSIST FEATURES FOR EPITAXIAL GROWTH BULK TILES WITH COMPENSATION


Patent No.	Grant Date	Appl No.	Appl Date	Title
7556992	07-Jul-09	11/496106	31-Jul-06	METHOD FOR FORMING VERTICAL STRUCTURES IN A SEMICONDUCTOR DEVICE
7483327	27-Jan-09	11/366286	02-Mar-06	APPARATUS AND METHOD FOR ADJUSTING AN OPERATING PARAMETER OF AN INTEGRATED CIRCUIT
7498864	03-Mar-09	11/397747	04-Apr-06	ELECTRONIC FUSE FOR OVERCURRENT PROTECTION
7647573	12-Jan-10	11/442196	26-May-06	METHOD AND DEVICE FOR TESTING DELAY PATHS OF AN INTEGRATED CIRCUIT
7649781	19-Jan-10	11/435944	17-May-06	BIT CELL REFERENCE DEVICE AND METHODS THEREOF
7518177	14-Apr-09	11/854363	12-Sep-07	SEMICONDUCTOR STORAGE DEVICE
7289352	30-Oct-07	11/372495	10-Mar-06	SEMICONDUCTOR STORAGE DEVICE
7439105	21-Oct-08	11/366279	02-Mar-06	METAL GATE WITH ZIRCONIUM
7471582	30-Dec-08	11/460745	28-Jul-06	MEMORY CIRCUIT USING A REFERENCE FOR SENSING
7279959	09-Oct-07	11/420559	26-May-06	CHARGE PUMP SYSTEM WITH REDUCED RIPPLE AND METHOD THEREFOR
7369450	06-May-08	11/420558	26-May-06	NONVOLATILE MEMORY HAVING LATCHING SENSE AMPLIFIER AND METHOD OF OPERATION
7479422	20-Jan-09	11/373536	10-Mar-06	SEMICONDUCTOR DEVICE WITH STRESSORS AND METHOD THEREFOR
7386821	10-Jun-08	11/423240	09-Jun-06	PRIMITIVE CELL METHOD FOR FRONT END PHYSICAL DESIGN
7479785	20-Jan-09	11/465311	17-Aug-06	CONTROL AND TESTING OF A MICRO ELECTROMECHANICAL SWITCH
7586238	08-Sep-09	11/465319	17-Aug-06	CONTROL AND TESTING OF A MICRO ELECTROMECHANICAL SWITCH HAVING A PIEZO ELEMENT
7510938	31-Mar-09	11/510030	25-Aug-06	SEMICONDUCTOR SUPERJUNCTION STRUCTURE
7651918	26-Jan-10	11/510541	25-Aug-06	STRAINED SEMICONDUCTOR POWER DEVICE AND METHOD
7611955	03-Nov-09	11/454403	15-Jun-06	METHOD OF FORMING A BIPOLAR TRANSISTOR AND SEMICONDUCTOR COMPONENT THEREOF
7442616	28-Oct-08	11/454654	15-Jun-06	METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR THEREOF
7638386	29-Dec-09	11/455025	15-Jun-06	INTEGRATED CMOS AND BIPOLAR DEVICES METHOD AND STRUCTURE
7317222	08-Jan-08	11/341813	27-Jan-06	MEMORY CELL USING A DIELECTRIC HAVING NON-UNIFORM THICKNESS
7442590	28-Oct-08	11/380530	27-Apr-06	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A FIN AND STRUCTURE THEREOF
7642163	05-Jan-10	11/693829	30-Mar-07	Process of forming ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS WITHIN A DIELECTRIC LAYER [AND PROCESS OF FORMING THE ELECTRONIC DEVICE]
7589945	15-Sep-09	11/513638	31-Aug-06	DISTRIBUTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT WITH VARYING CLAMP SIZE
7341914	11-Mar-08	11/376411	15-Mar-06	METHOD FOR FORMING A NON-VOLATILE MEMORY AND A PERIPHERAL DEVICE ON A SEMICONDUCTOR SUBSTRATE
7615866	10-Nov-09	11/419798	23-May-06	CONTACT SURROUNDED BY PASSIVATION AND POLYIMIDE AND METHOD THEREFOR
7470624	30-Dec-08	11/651253	08-Jan-07	INTEGRATED ASSIST FEATURES FOR EPITAXIAL GROWTH BULK/SOI HYBRID TILES WITH COMPENSATION
7581202	25-Aug-09	11/756187	31-May-07	METHOD FOR GENERATION, PLACEMENT, AND ROUTING OF TEST STRUCTURES IN TEST CHIPS
7592230	22-Sep-09	11/510552	25-Aug-06	TRENCH POWER DEVICE AND METHOD
7598517	06-Oct-09	11/510547	25-Aug-06	SUPERJUNCTION TRENCH DEVICE AND METHOD
7567782	28-Jul-09	11/494821	28-Jul-06	RE-CONFIGURABLE IMPEDANCE MATCHING AND HARMONIC FILTER SYSTEM
7531383	12-May-09	11/554920	31-Oct-06	ARRAY QUAD FLAT NO-LEAD PACKAGE AND METHOD OF FORMING SAME
7517747	14-Apr-09	11/530053	08-Sep-06	NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
7445976	04-Nov-08	11/420525	26-May-06	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING AN INTERLAYER AND STRUCTURE THEREOF
7550318	23-Jun-09	11/502679	11-Aug-06	INTERCONNECT FOR IMPROVED DIE TO SUBSTRATE ELECTRICAL COUPLING
7436025	14-Oct-08	11/540770	29-Sep-06	TERMINATION STRUCTURES FOR SUPER JUNCTION DEVICES
7619297	17-Nov-09	12/390133	20-Feb-09	ELECTRONIC DEVICE INCLUDING AN INDUCTOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
7524731	28-Apr-09	11/540614	29-Sep-06	Process of forming an ELECTRONIC DEVICE INCLUDING AN INDUCTOR [AND A PROCESS OF FORMING THE SAME]
7624329	24-Nov-09	11/468638	30-Aug-06	PRGRAMMING A MEMORY DEVICE HAVING ERROR CORRECTION LOGIC
7479465	20-Jan-09	11/460748	28-Jul-06	TRANSFER OF STRESS TO A LAYER
7630693	08-Dec-09	11/600351	16-Nov-06	TRANSMITTER WITH IMPROVED POWER EFFICIENCY
7579243	25-Aug-09	11/535345	26-Sep-06	SPLIT GATE MEMORY CELL METHOD
7580001	25-Aug-09	11/753749	25-May-07	ANTENNA STRUCTURE FOR INTEGRATED CIRCUIT DIE USING BOND WIRE
7629220	08-Dec-09	11/428038	30-Jun-06	METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
7554841	30-Jun-09	11/534715	25-Sep-06	CIRCUIT FOR STORING INFORMATION IN AN INTEGRATED CIRCUIT AND METHOD THEREFOR
7579228	25-Aug-09	11/825953	10-Jul-07	DISPOSABLE ORGANIC SPACERS
7524719	28-Apr-09	11/469163	31-Aug-06	SELF-ALIGNED SPLIT GATE MEMORY CELL AND METHOD OF MAKING
7595257	29-Sep-09	11/508610	22-Aug-06	Process of forming an electronic device including a barrier layer [ELECTRONIC DEVICE INCLUDING A BARRIER LAYER AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE]
7292485	06-Nov-07	11/461200	31-Jul-06	SRAM HAVING VARIABLE POWER SUPPLY AND METHOD THEREFOR
7560354	14-Jul-09	11/835643	08-Aug-07	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A DOPED SEMICONDUCTOR LAYER
7494825	24-Feb-09	11/649094	03-Jan-07	TOP CONTACT ALIGNMENT IN SEMICONDUCTOR DEVICES
7564716	21-Jul-09	11/560554	16-Nov-06	MEMORY DEVICE WITH RETAINED INDICATOR OF READ REFERENCE LEVEL
7397722	08-Jul-08	11/670632	02-Feb-07	MULTIPLE BLOCK MEMORY WITH COMPLEMENTARY DATA PATH
7518947	14-Apr-09	11/536136	28-Sep-06	SELF-TIMED MEMORY HAVING COMMON TIMING CONTROL CIRCUIT AND METHOD THEREFOR
7608513	27-Oct-09	11/626928	25-Jan-07	DUAL GATE LDMOS DEVICE AND METHOD
7592273	22-Sep-09	11/737499	19-Apr-07	SEMICONDUCTOR DEVICE WITH HYDROGEN BARRIER AND METHOD THEREFOR
7598596	06-Oct-09	11/602639	21-Nov-06	METHODS AND APPARATUS FOR A DUAL-METAL MAGNETIC SHIELD STRUCTURE
7544605	09-Jun-09	11/562161	21-Nov-06	METHOD OF MAKING A CONTACT ON A BACKSIDE OF A DIE
7571404	04-Aug-09	11/566915	05-Dec-06	A FAST ON-CHIP DECOUPLING CAPACITANCE BUDGETING METHOD AND DEVICE FOR REDUCED POWER SUPPLY NOISE
7632715	15-Dec-09	11/620074	05-Jan-07	METHOD OF PACKAGING SEMICONDUCTOR DEVICES
7609541	27-Oct-09	11/616635	27-Dec-06	MEMORY CELLS WITH LOWER POWER CONSUMPTION DURING A WRITE OPERATION
7476563	13-Jan-09	11/561241	17-Nov-06	METHOD OF PACKAGING A DEVICE USING A DIELECTRIC LAYER
7608898	27-Oct-09	11/554851	31-Oct-06	ONE TRANSISTOR DRAM CELL STRUCTURE
7557008	07-Jul-09	11/625882	23-Jan-07	METHOD OF MAKING A NON-VOLATILE MEMORY DEVICE
7440313	21-Oct-08	11/561206	17-Nov-06	TWO-PORT SRAM HAVING IMPROVED WRITE OPERATION
7655502	02-Feb-10	12/510369	28-Jul-09	METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONNECTOR
7588951	15-Sep-09	11/561063	17-Nov-06	METHOD OF PACKAGING A SEMICONDUCTOR DEVICE AND A PREFABRICATED CONNECTOR
7629182	08-Dec-09	11/736272	17-Apr-07	SPACE AND PROCESS EFFICIENT MRAM AND METHOD
7572723	11-Aug-09	11/552821	25-Oct-06	[A] MICROPAD FOR BONDING AND A METHOD THEREFOR
7575968	18-Aug-09	11/742081	30-Apr-07	INVERSE SLOPE ISOLATION AND DUAL SURFACE ORIENTATION INTEGRATION
7542351	02-Jun-09	11/756192	31-May-07	INTEGRATED CIRCUIT FEATURING A NON-VOLATILE MEMORY WITH CHARGE/DISCHARGE RAMP RATE CONTROL AND METHOD THEREFOR
7416945	26-Aug-08	11/676403	19-Feb-07	METHOD FOR FORMING A SPLIT GATE MEMORY DEVICE
7544997	09-Jun-09	11/676114	▇▇-▇▇▇-▇▇	▇▇▇▇▇-▇▇▇▇▇ ▇▇▇▇▇▇/▇▇▇▇▇ ▇▇▇▇▇▇▇▇
▇▇▇▇▇▇▇	15-Sep-09	11/851738	07-Sep-07	SEMICONDUCTOR DEVICE TEST SYSTEM HAVING REDUCED CURRENT LEAKAGE
7595226	29-Sep-09	11/846671	29-Aug-07	METHOD OF PACKAGING AN INTEGRATED CIRCUIT DIE
7544595	09-Jun-09	11/619861	04-Jan-07	FORMING A SEMICONDUCTOR DEVICE HAVING A METAL ELECTRODE AND STRUCTURE THEREOF


Patent No.	Grant Date	Appl No.	Appl Date	Title
7416605	26-Aug-08	11/620987	08-Jan-07	ANNEAL OF EPITAXIAL LAYER IN A SEMICONDUCTOR DEVICE
7648884	19-Jan-10	11/680199	28-Feb-07	SEMICONDUCTOR DEVICE WITH INTEGRATED RESISTIVE ELEMENT AND METHOD OF MAKING
7566623	28-Jul-09	11/670833	02-Feb-07	ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN HAVING A PLURALITY OF GATE ELECTRODES AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
7405128	29-Jul-08	11/674888	14-Feb-07	DOTTED CHANNEL MOSFET AND METHOD
7410876	12-Aug-08	11/784561	05-Apr-07	METHODOLOGY TO REDUCE SOI FLOATING-BODY EFFECT
7473586	06-Jan-09	11/849301	03-Sep-07	METHOD OF FORMING FLIP-CHIP BUMP CARRIER TYPE PACKAGE
7579590	25-Aug-09	11/888576	01-Aug-07	A METHOD OF MEASURING THIN LAYERS USING ▇▇▇▇
7648858	19-Jan-10	11/765170	19-Jun-07	METHODS AND APPARATUS FOR EMI SHIELDING IN MULTI-CHIP MODULES
7611936	03-Nov-09	11/803097	11-May-07	METHOD TO CONTROL UNIFORMITY/COMPOSITION OF METAL ELECTRODES, SILICIDES ON TOPOGRAPHY AND DEVICES USING THIS METHOD
7574682	11-Aug-09	11/680012	28-Feb-07	YIELD ANALYSIS AND IMPROVEMENT USING ELECTRICAL SENSITIVITY EXTRACTION
7602168	13-Oct-09	11/849155	31-Aug-07	VOLTAGE REGULATOR FOR INTEGRATED CIRCUITS
7645651	12-Jan-10	11/951702	06-Dec-07	LDMOS WITH CHANNEL STRESS
7572706	11-Aug-09	11/680181	28-Feb-07	SOURCE/DRAIN STRESSOR AND METHOD THEREFOR
7521314	21-Apr-09	11/738192	20-Apr-07	METHOD FOR SELECTIVE REMOVAL OF A LAYER
7583554	01-Sep-09	11/681421	02-Mar-07	INTEGRATED CIRCUIT FUSE ARRAY
7446566	04-Nov-08	11/873099	16-Oct-07	LEVEL SHIFTER
7616509	10-Nov-09	11/777635	13-Jul-07	DYNAMIC VOLTAGE ADJUSTMENT FOR MEMORY
7534674	19-May-09	11/737492	19-Apr-07	METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH A STRESSOR
7439134	21-Oct-08	11/738003	20-Apr-07	METHOD FOR PROCESS INTEGRATION OF NON-VOLATILE MEMORY CELL TRANSISTORS WITH TRANSISTORS OF ANOTHER TYPE
7528047	05-May-09	11/759593	07-Jun-07	SELF-ALIGNED SPLIT GATE MEMORY CELL AND METHOD OF FORMING
7445981	04-Nov-08	11/771690	29-Jun-07	METHOD FOR FORMING A DUAL METAL GATE STRUCTURE
7560970	14-Jul-09	11/835552	08-Aug-07	LEVEL SHIFTER
7651889	26-Jan-10	11/961827	20-Dec-07	ELECTROMAGNETIC SHIELD FORMATION FOR INTEGRATED CIRCUIT DIE PACKAGE
7649782	19-Jan-10	11/831168	31-Jul-07	NON-VOLATILE MEMORY HAVING A DYNAMICALLY ADJUSTABLE SOFT PROGRAM VERIFY VOLTAGE LEVEL AND METHOD THEREFOR
7545679	09-Jun-09	11/966068	28-Dec-07	ELECTRICAL ERASABLE PROGRAMMABLE MEMORY TRANSCONDUCTANCE TESTING
7608908	27-Oct-09	12/125613	22-May-08	ROBUST DEEP TRENCH ISOLATION
7592673	22-Sep-09	11/692722	28-Mar-07	ESD PROTECTION CIRCUIT WITH ISOLATED DIODE ELEMENT AND METHOD THEREOF
7555075	30-Jun-09	11/400458	07-Apr-06	ADJUSTABLE NOISE SUPPRESSION SYSTEM
7365587	29-Apr-08	11/279018	07-Apr-06	CONTENTION-FREE KEEPER CIRCUIT AND A METHOD FOR CONTENTION ELIMINATION
7565514	21-Jul-09	11/413255	28-Apr-06	PARALLEL CONDITION CODE GENERATION FOR SIMD OPERATIONS
7525866	28-Apr-09	11/406585	19-Apr-06	MEMORY CIRCUIT
7430151	30-Sep-08	11/392402	29-Mar-06	MEMORY WITH CLOCKED SENSE AMPLIFIER
7495493	24-Feb-09	11/468521	30-Aug-06	CIRCUITRY FOR LATCHING
7545702	09-Jun-09	11/459170	21-Jul-06	MEMORY PIPELINING IN AN INTEGRATED CIRCUIT memory device using shared word lines
7657854	02-Feb-10	11/866965	03-Oct-07	METHOD AND SYSTEM FOR DESIGNING TEST CIRCUIT IN A SYSTEM ON CHIP
7584344	01-Sep-09	11/381284	02-May-06	INSTRUCTION FOR CONDITIONALLY YIELDING TO A READY THREAD BASED ON PRIORITY CRITERIA
7409502	05-Aug-08	11/382900	11-May-06	SELECTIVE CACHE LINE ALLOCATION INSTRUCTION EXECUTION AND CIRCUITRY
7542369	02-Jun-09	11/863961	28-Sep-07	INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION
7292495	06-Nov-07	11/427610	29-Jun-06	INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION
7525152	28-Apr-09	11/678330	23-Feb-07	RF POWER TRANSISTOR DEVICE WITH METAL ELECTROMIGRATION DESIGN AND METHOD THEREOF


Patent No.	Grant Date	Appl No.	Appl Date	Title
7574564	11-Aug-09	11/382903	11-May-06	REPLACEMENT POINTER CONTROL FOR SET ASSOCIATIVE CACHE AND METHOD
7627795	01-Dec-09	11/460086	26-Jul-06	PIPELINED DATA PROCESSOR WITH DETERMINISTIC SIGNATURE GENERATION
7443223	28-Oct-08	11/468815	31-Aug-06	LEVEL SHIFTING CIRCUIT
7523373	21-Apr-09	11/468458	30-Aug-06	MINIMUM MEMORY OPERATING VOLTAGE TECHNIQUE
7626842	01-Dec-09	11/560607	16-Nov-06	PHOTON-BASED MEMORY DEVICE AND METHOD THEREOF
7492627	17-Feb-09	11/561255	17-Nov-06	MEMORY WITH INCREASED WRITE MARGIN BITCELLS
7623404	24-Nov-09	11/561449	20-Nov-06	MEMORY DEVICE HAVING CONCURRENT WRITE AND READ CYCLES AND METHOD THEREOF
7400545	15-Jul-08	11/469074	31-Aug-06	STORAGE CIRCUIT WITH EFFICIENT SLEEP MODE AND METHOD
7457892	25-Nov-08	11/446891	05-Jun-06	DATA COMMUNICATION FLOW CONTROL DEVICE AND METHODS THEREOF
7499342	03-Mar-09	11/620080	05-Jan-07	DYNAMIC MODULE OUTPUT DEVICE AND METHOD THEREOF
7518933	14-Apr-09	11/672279	07-Feb-07	CIRCUIT FOR USE IN A MULTIPLE BLOCK MEMORY
7453756	18-Nov-08	11/469084	31-Aug-06	METHOD FOR POWERING AN ELECTRONIC DEVICE AND CIRCUIT
7508021	24-Mar-09	11/760775	10-Jun-07	RF POWER TRANSISTOR DEVICE WITH HIGH PERFORMANCE SHUNT CAPACITOR AND METHOD THEREOF
7589370	15-Sep-09	11/961408	20-Dec-07	RF POWER TRANSISTOR WITH LARGE PERIPHERY METAL-INSULATOR-SILICON SHUNT CAPACITOR
7548103	16-Jun-09	11/553022	26-Oct-06	STORAGE DEVICE having low power mode AND METHODS THEREOF
7555605	30-Jun-09	11/536085	28-Sep-06	DATA PROCESSING SYSTEM HAVING CACHE MEMORY DEBUGGING SUPPORT AND METHOD THEREFOR
7414449	19-Aug-08	11/538639	04-Oct-06	DYNAMIC SCANNABLE LATCH AND METHOD OF OPERATION
7443745	28-Oct-08	11/612626	19-Dec-06	BYTE WRITEABLE MEMORY WITH BIT-COLUMN VOLTAGE SELECTION AND COLUMN REDUNDANCY
7573762	11-Aug-09	11/759028	06-Jun-07	ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT
7630272	08-Dec-09	11/676341	19-Feb-07	MULTIPLE PORT MEMORY WITH PRIORITIZED WORD LINE DRIVER AND METHOD THEREOF
▇▇▇▇▇▇▇	10-Feb-09	11/▇▇▇▇▇▇	22-May-07	BITCELL WITH VARIABLE-CONDUCTANCE TRANSFER GATE AND METHOD THEREOF
7560965	14-Jul-09	11/741920	30-Apr-07	SCANNABLE FLIP-FLOP WITH NON-VOLATILE STORAGE ELEMENT AND METHOD
7638903	29-Dec-09	11/695974	03-Apr-07	POWER SUPPLY SELECTION FOR MULTIPLE CIRCUITS ON AN INTEGRATED CIRCUIT
7450454	11-Nov-08	11/746126	09-May-07	LOW VOLTAGE DATA PATH IN MEMORY ARRAY
7324558	29-Jan-08	11/412761	27-Apr-06	METHOD AND APPARATUS FOR CONTROLLING THE TIMING OF A COMMUNICATION DEVICE
7042909	09-May-06	09/892987	27-Jun-01	METHOD AND APPARATUS FOR CONTROLLING THE TIMING OF A COMMUNICATION DEVICE
6167081	26-Dec-00	09/389781	03-Sep-99	DUAL MODE RECEIVER
7065136	20-Jun-06	09/716501	20-Nov-00	RECEIVER HAVING AN EQUALIZING DEMODULATOR AND A NON-EQUALIZING DEMODULATOR AND METHOD FOR CONTROLLING THE SAME
6996158	07-Feb-06	09/791950	22-Feb-01	SIGNAL DETECTION USING A CDMA RECEIVER
6961011	01-Nov-05	09/941101	27-Aug-01	DATA COMPRESSION SYSTEM
7313166	25-Dec-07	11/336500	20-Jan-06	MULTICODE RECEIVER
7016398	21-Mar-06	09/882190	15-Jun-01	MULTICODE RECEIVER
6260157	10-Jul-01	09/250888	16-Feb-99	PATCHING OF A READ ONLY MEMORY
6738420	18-May-04	09/624684	24-Jul-00	DIGITAL FILTER HAVING AN UPSAMPLER OPERATIONAL AT A FRACTIONAL CLOCK RATE
6804501	12-Oct-04	09/669015	25-Sep-00	RECEIVER HAVING GAIN CONTROL AND NARROWBAND INTERFERENCE DETECTION
6483885	19-Nov-02	09/390007	03-Sep-99	FRAME SYNCHRONIZER
6330234	11-Dec-01	09/559675	27-Apr-00	METHOD AND APPARATUS FOR REDUCING CURRENT CONSUMPTION
6810078	26-Oct-04	09/733670	08-Dec-00	BLIND RATE DETERMINATION
6664826	16-Dec-03	09/620192	20-Jul-00	[VARIABLE GAIN] LOOP FILTER FOR IMPROVED PHASE MARGIN AND DECREASED PHASE NOISE WITH WIDEBAND VCOs[BOC’S]
6559723	06-May-03	09/946030	04-Sep-01	SINGLE ENDED INPUT, DIFFERENTIAL OUTPUT AMPLIFIER
6621348	16-Sep-03	10/001388	25-Oct-01	VARIABLE GAIN AMPLIFIER WITH AUTOBIASING SUPPLY


Patent No.	Grant Date	Appl No.	Appl Date	Title
				REGULATION
6441594	27-Aug-02	09/845059	27-Apr-01	LOW POWER VOLTAGE REGULATOR WITH IMPROVED ON-CHIP NOISE ISOLATION
6657502	02-Dec-03	09/968171	01-Oct-01	MULTIPHASE VOLTAGE CONTROLLED OSCILLATOR
6990164	24-Jan-06	09/968178	01-Oct-01	DUAL STEERED FREQUENCY SYNTHESIZER
6920316	19-Jul-05	09/946010	04-Sep-01	HIGH PERFORMANCE INTEGRATED CIRCUIT REGULATOR WITH SUBSTRATE TRANSIENT SUPPRESSION
5796787	18-Aug-98	08/859809	19-May-97	RECEIVER AND METHOD THEREOF
5729577	17-Mar-98	08/646804	21-May-96	SIGNAL PROCESSOR WITH IMPROVED EFFICIENCY
5872819	16-Feb-99	08/803049	19-Feb-97	METHOD AND APPARATUS FOR FACILITATING SYMBOL TIMING ACQUISITION IN A DATA COMMUNICATION RECEIVER
6091786	18-Jul-00	09/048040	25-Mar-98	METHOD AND APPARATUS IN A COMMUNICATION RECEIVER FOR ESTIMATING SYMBOL TIMING AND CARRIER FREQUENCY
6317474	13-Nov-01	09/130174	06-Aug-98	METHOD AND APPARATUS FOR ESTIMATING TIME-OF-ARRIVAL OF A SYNCHRONIZATION SIGNAL SENT SIMULTANEOUSLY FROM AT LEAST TWO NON-COLLOCATED TRANSMITTERS
6370211	09-Apr-02	09/245636	05-Feb-99	METHOD AND APPARATUS FOR FACILITATING RECEPTION OF A SIGNAL ON ONE OF A PLURALITY OF CONTIGUOUS CHANNELS
6594328	15-Jul-03	09/362267	28-Jul-99	METHOD AND APPARATUS FOR FACILITATING AN ESTIMATION OF A CARRIER FREQUENCY ERROR IN A RECEIVER OF A WIRELESS COMMUNICATION SYSTEM
6625233	23-Sep-03	09/408398	29-Sep-99	METHOD AND APPARATUS IN A WIRELESS RECEIVER FOR DEMODULATING A CONTINUOUS-PHASE FREQUENCY-SHIFT-KEYED SIGNAL
6289060	11-Sep-01	09/571872	12-May-00	METHOD AND APPARATUS FOR PERFORMING A GENERALIZED VITERBI SEARCH TO DEMODULATE A SEQUENCE OF SYMBOLS
6487240	26-Nov-02	09/709687	10-Nov-00	APPARATUS FOR RECEIVING AND RECOVERING FREQUENCY SHIFT KEYED SYMBOLS
7376207	20-May-08	09/794285	27-Feb-01	APPARATUS FOR RECEIVING AND RECOVERING FREQUENCY SHIFT KEYED SYMBOLS
7639762	29-Dec-09	12/107603	22-Apr-08	APPARATUS FOR RECEIVING AND RECOVERING FREQUENCY SHIFT KEYED SYMBOLS
5630222	13-May-97	08/566518	04-Dec-95	METHOD AND APPARATUS FOR GENERATING MULTIPLE SIGNALS AT MULTIPLE FREQUENCIES
5699309	16-Dec-97	08/645377	13-May-96	METHOD AND APPARATUS FOR PROVIDING USER SELECTABLE LOW POWER AND HIGH PERFORMANCE MEMORY ACCESS MODES
5802317	01-Sep-98	08/707675	04-Sep-96	ELECTRONIC CIRCUIT HAVING CASCADED LOGIC BUSSES for reducing electromagnetic interference
6275540	14-Aug-01	08/941913	01-Oct-97	SELECTIVE CALL RECEIVER HAVING AN APPARATUS FOR MODIFYING AN ANALOG SIGNAL TO A DIGITAL SIGNAL AND METHOD THEREFOR
5789973	04-Aug-98	08/707673	04-Sep-96	RESISTORLESS OPERATIONAL TRANS CONDUCTANCE AMPLIFIER CIRCUIT
5703405	30-Dec-97	08/591194	16-Jan-96	INTEGRATED CIRCUIT CHIP FORMED FROM PROCESSING TWO OPPOSING SURFACES OF A WAFER
5986598	16-Nov-99	08/994524	19-Dec-97	SIGMA DELTA DATA CONVERTER WITH FEED-FORWARD PATH TO STABILIZE INTEGRATOR SIGNAL SWING
6192089	20-Feb-01	09/130930	07-Aug-98	ELECTRONIC CIRCUIT AND METHOD FOR AUTOMATIC FREQUENCY CONTROL
6260086	10-Jul-01	09/218515	22-Dec-98	CONTROLLER CIRCUIT FOR TRANSFERRING A SET OF PERIPHERAL DATA WORDS
5463306	31-Oct-95	08/093488	19-Jul-93	APPARATUS FOR DETECTING COMPLETION OF ENERGY TRANSFER IN AN INDUCTIVE DC TO DC CONVERTER
5381307	10-Jan-95	08/129010	29-Sep-93	SELF ALIGNING ELECTRICAL CONTACT ARRAY
5323947	28-Jun-94	08/055589	03-May-93	METHOD AND APPARATUS FOR USE IN FORMING PRE-POSITIONED SOLDER BUMPS ON A PAD ARRANGEMENT
5439162	08-Aug-95	08/082568	28-Jun-93	DIRECT CHIP ATTACHMENT METHOD AND STRUCTURE
5345235	06-Sep-94	08/044683	12-Apr-93	SCALED REFERENCE ANALOG TO DIGITAL CONVERSION CIRCUITRY AND METHOD OF OPERATION
5564089	08-Oct-96	08/049938	20-Apr-93	CURRENT CONTROLLED VARIABLE FREQUENCY OSCILLATOR HAVING AN IMPROVED OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
5337007	09-Aug-94	08/147235	04-Nov-93	HIGH EFFICIENCY CLASS AB TRANS CONDUCTANCE AMPLIFIER
5647123	15-Jul-97	08/543543	16-Oct-95	Method for improving distribution of underfill between a flip chip die and a circuit board [IMPROVED METHOD FOR UNDERFILLING EUTECTIC


Patent No.	Grant Date	Appl No.	Appl Date	Title
				BUMPED FLIP CHIP DIE]
5625224	29-Apr-97	08/288513	10-Aug-94	METHOD AND APPARATUS FOR AN INTEGRATED CIRCUIT CHIP CARRIER HAVING IMPROVED MOUNTING PAD DENSITY
5759910	02-Jun-98	08/773248	23-Dec-96	PROCESS FOR FABRICATING A SOLD ER BUMP FOR A FLIP CHIP INTEGRATED CIRCUIT
6137690	24-Oct-00	08/916714	18-Aug-97	ELECTRONIC ASSEMBLY [UTILIZING A NICKEL-GOLD FINISH]
5623519	22-Apr-97	08/591191	28-Dec-95	APPARATUS FOR COMPARING THE WEIGHT OF A BINARY WORD TO A NUMBER
5640681	17-Jun-97	08/149886	10-Nov-93	BOOT-STRAPPED CASCODE CURRENT MIRROR
5175729	29-Dec-92	07/710637	05-Jun-91	RADIO AND FAST LOCK PHASE LOCKED LOOP
5481226	02-Jan-96	08/329103	25-Oct-94	LOW-VOLTAGE INTERMEDIATE FREQUENCY AMPLIFIER PROVIDING AUTOMATIC GAIN CONTROL OF A SOURCE AMPLIFIER
5678223	14-Oct-97	08/399785	07-Mar-95	METHOD AND APPARATUS FOR AN AUTOMATIC FREQUENCY CONTROL RECEIVER
5606731	25-Feb-97	08/399805	07-Mar-95	ZERO IF RECEIVER WITH TRACKING SECOND LOCAL OSCILLATOR AND DEMODULATOR PHASE LOCKED LOOP OSCILLATOR
5604926	18-Feb-97	08/399784	07-Mar-95	PHASE LOCKED LOOP CIRCUIT WITH CURRENT MODE FEEDBACK
5630228	13-May-97	08/427026	24-Apr-95	DOUBLE BALANCE MIXER CIRCUIT WITH ACTIVE FILTER LOAD FOR A PORTABLE COMMUNICATION RECEIVER
5564091	08-Oct-96	08/412660	24-Mar-95	METHOD AND APPARATUS FOR OPERATING AN AUTOMATIC FREQUENCY CONTROL IN A RADIO
5670951	23-Sep-97	08/503366	17-Jul-95	RADIO COMMUNICATION DEVICE AND METHOD FOR GENERATING THRESHOLD LEVELS IN A RADIO COMMUNICATION DEVICE FOR RECEIVING FOUR
5471665	28-Nov-95	08/324634	18-Oct-94	DIFFERENTIAL DC OFFSET COMPENSATION CIRCUIT
5633895	27-May-97	08/511081	03-Aug-95	COMMUNICATION DEVICE WITH SYNCHRONIZED ZERO CROSSING DEMODULATOR AND METHOD
5612861	18-Mar-97	08/504360	19-Jul-95	METHOD AND APPARATUS FOR LOW VOLTAGE CMOS START CIRCUIT
5701600	23-Dec-97	08/502997	17-Jul-95	RADIO RECEIVER AND METHOD OF CALIBRATING SAME
6473732	29-Oct-02	08/544908	18-Oct-95	SIGNAL ANALYZER AND METHOD THEREOF
5787125	28-Jul-98	08/643646	06-May-96	METHOD AND APPARATUS FOR DERIVING IN-PHASE AND QUADRATURE-PHASE BASEBAND SIGNALS FROM A COMMUNICATION SIGNAL
5734974	31-Mar-98	08/625435	27-Mar-96	SELECTIVE CALL RECEIVERS WITH STEPWISE VARIABLE GAIN CONTROL
6233287	15-May-01	08/825984	04-Apr-97	METHOD AND APPARATUS FOR MIXING SIGNALS
5943378	24-Aug-99	08/691081	01-Aug-96	DIGITAL SIGNAL CLOCK RECOVERY
5799043	25-Aug-98	08/867498	02-Jun-97	METHOD AND APPARATUS FOR DECODING A TWO-LEVEL RADIO SIGNAL
5960042	28-Sep-99	08/886356	01-Jul-97	METHOD IN A SELECTIVE CALL RECEIVER FOR SYNCHRONIZING TO A MULTI-LEVEL RADIO SIGNAL
6445790	03-Sep-02	09/650411	29-Aug-00	DIGITAL TONE GENERATOR
6400821	04-Jun-02	09/086628	29-May-98	DIGITAL TONE GENERATOR
6259904	10-Jul-01	08/944279	06-Oct-97	fast [EAST] SQUELCH CIRCUIT AND METHOD
6160490	12-Dec-00	09/017564	02-Feb-98	APPARATUS FOR IMPROVING THE BATTERY LIFE OF A SELECTIVE CALL RECEIVER
6130920	10-Oct-00	09/076992	13-May-98	METHOD AND APPARATUS FOR ACCURATE SYNCHRONIZATION USING SYMBOL DECISION FEEDBACK
6130921	10-Oct-00	08/996900	23-Dec-97	FREQUENCY SHIFT MODULATION AUTOMATIC FREQUENCY CORRECTION CIRCUIT AND METHOD
6073002	06-Jun-00	09/072056	04-May-98	MIXER CIRCUIT AND COMMUNICATION DEVICE USING THE SAME
6055436	25-Apr-00	09/010043	20-Jan-98	METHOD AND APPARATUS FOR DETECTING SIMULCAST CHANNEL CONDITIONS
6111761	29-Aug-00	09/378942	23-Aug-99	[AN] ELECTRONIC ASSEMBLY
6225144	01-May-01	09/487042	19-Jan-00	A METHOD AND MACHINE FOR UNDER FILLING AN ASSEMPLY TO FORM A SEMICONDUCTOR PACKAGE
6002273	14-Dec-99	09/166756	05-Oct-98	LINEAR LOW NOISE PHASE-FREQUENCY DETECTOR
6259902	10-Jul-01	09/181760	29-Oct-98	DUAL CHANNEL SUPERHETERODYNE RECEIVER
6487260	26-Nov-02	09/285977	05-Apr-99	METHOD AND APPARATUS FOR EFFICIENT CORRELATION DETECTION
6560447	06-May-03	09/798216	05-Mar-01	DC OFFSET CORRECTION SCHEME FOR WIRELESS RECEIVERS


Patent No.	Grant Date	Appl No.	Appl Date	Title
6356142	12-Mar-02	09/666037	20-Sep-00	DIGITAL FILTER TUNE LOOP
7142606	28-Nov-06	10/256906	27-Sep-02	METHOD AND APPARATUS FOR SHARED PROCESSING A PLURALITY OF SIGNALS
5904955	18-May-99	08/924862	05-Sep-97	ENCAPSULATION MEANS AND METHOD
7599976	06-Oct-09	10/295002	13-Nov-02	SYSTEM AND METHOD FOR CRYPTOGRAPHIC KEY GENERATION
6580719	17-Jun-03	09/297854	06-May-99	METHOD FOR DETERMINING THE NUMBER OF ACCESSES GRANTED DURING WCL AND APPARATUS
6087267	11-Jul-00	06/836048	04-Mar-86	PROCESS FOR FORMING AN INTEGRATED CIRCUIT
6426698	30-Jul-02	09/573949	19-May-00	LOT SIGNALLING DEVICE
6418527	09-Jul-02	09/170690	13-Oct-98	DATA PROCESSOR INSTRUCTION SYSTEM FOR GROUPING INSTRUCTION WITH OR WITHOUT A COMMON PREFIX AND DATA PROCESSING SYSTEM THAT USES TWO OR MORE INSTRUCTION GROUPING METHODS
6477692	05-Nov-02	09/355144	22-Jul-99	METHOD AND APPARATUS FOR CHANNEL-ROUTING OF AN ELECTRONIC DEVICE
6282623	28-Aug-01	09/497986	04-Feb-00	Method for digital signal processing, DSP, mobile communication and audio-device [DIGITAL SIGNAL PROCESSOR AND METHOD FOR PERFORMING A DIGITAL SIGNAL PROCESSING OPERATION]
5963076	05-Oct-99	08/837136	14-Apr-97	CIRCUIT WITH HOT-ELECTRON PROTECTION AND METHOD
6138204	24-Oct-00	08/992466	17-Dec-97	MULTI BUS ACCESS MEMORY
5966029	12-Oct-99	08/893043	15-Jul-97	MULTI-BIT EXCLUSIVE OR
5329621	12-Jul-94	07/425082	23-Oct-89	MICROPROCESSOR WHICH OPTIMIZES BUS UTILIZATION BASED UPON BUS SPEED
5973528	26-Oct-99	09/061299	16-Apr-98	CONTROL CIRCUIT AND METHOD FOR A TEMPERATURE SENSITIVE DEVICE
6167059	26-Dec-00	09/013048	26-Jan-98	APPARATUS AND METHOD FOR TRANSMITTING DATA
6217660	17-Apr-01	09/541645	03-Apr-00	METHOD OF CLEANING A THROTTLE VALVE AND APPARATUS
5138709	11-Aug-92	07/508214	11-Apr-90	SPURIOUS INTERRUPT MONITOR
5448744	05-Sep-95	07/432423	06-Nov-89	INTEGRATED CIRCUIT MICROPROCESSOR WITH PROGRAMMABLE CHIP SELECT LOGIC
5276824	04-Jan-94	08/079429	21-Jun-93	DATA PROCESSOR HAVING A MULTI-STAGE INSTRUCTION PIPE AND SELECTION LOGIC RESPONSIVE TO AN INSTRUCTION DECODER FOR SELECTING ONE STAGE OF THE INSTRUCTION PIPE
6257756	10-Jul-01	08/895067	16-Jul-97	APPARATUS AND METHOD FOR IMPLEMENTING VITERBI BUTTERFLIES
5185694	09-Feb-93	07/371343	26-Jun-89	DATA PROCESSING SYSTEM UTILIZES BLOCK MOVE INSTRUCTION FOR BURST TRANSFERRING BLOCKS OF DATA ENTRIES WHERE WIDTH OF DATA BLOCK VARIES
6529567	04-Mar-03	09/265221	10-Mar-99	ELECTRONIC APPARATUS AND METHOD FOR RECEIVING NOISE SIGNALS
6275835	14-Aug-01	09/251216	16-Feb-99	FINITE IMPULSE RESPONSE FILTER AND METHOD
5193177	09-Mar-93	07/921426	31-Jul-92	FAULT INDICATING MICROCOMPUTER INTERFACE UNITS
5920184	06-Jul-99	08/841874	05-May-97	LOW RIPPLE VOLTAGE REFERENCE CIRCUIT
5268590	07-Dec-93	07/958583	08-Oct-92	CMOS DEVICE AND PROCESS
5889482	30-Mar-99	08/944639	06-Oct-97	ANALOG-TO-DIGITAL CONVERTER USING DITHER AND METHOD FOR CONVERTING ANALOG SIGNALS TO DIGITAL SIGNALS
5058070	15-Oct-91	07/478907	12-Feb-90	HIGH SPEED MEMORY WITH ROW REDUNDANCY
5049831	17-Sep-91	07/501057	29-Mar-90	SINGLE-ENDED INPUT TO DIFFERENTIAL OUTPUT AMPLIFIER WITH INTEGRAL TWO-POLE FILTER
5166685	24-Nov-92	07/850256	12-Mar-92	AUTOMATIC SELECTION OF EXTERNAL MULTIPLEXER CHANNELS BY AN A/D CONVERTER INTEGRATED CIRCUIT
5089722	18-Feb-92	07/503012	02-Apr-90	HIGH SPEED OUTPUT BUFFER CIRCUIT WITH OVERLAP CURRENT CONTROL
5227340	13-Jul-93	07/807665	16-Dec-91	PROCESS FOR FABRICATING SEMICONDUCTOR DEVICES USING A SOLID REACTANT SOURCE
5003513	26-Mar-91	07/513126	23-Apr-90	LATCHING INPUT BUFFER FOR AN A TD MEMORY
5216283	01-Jun-93	07/519375	03-May-90	SEMICONDUCTOR DEVICE HAVING AN INSERTABLE HEAT SINK AND METHOD FOR MOUNTING THE SAME
5168276	01-Dec-92	07/852830	16-Mar-92	AUTOMATIC A/D CONVERTER OPERATION USING A PROGRAMMABLE CONTROL TABLE
5147815	15-Sep-92	07/663223	01-Mar-91	METHOD FOR FABRICATING A MULTICHIP SEMICONDUCTOR DEVICE HAVING TWO INTERDIGITATED LEAD FRAMES
5043943	27-Aug-91	07/539651	18-Jun-90	CACHE MEMORY WITH A PARITY WRITE CONTROL CIRCUIT


Patent No.	Grant Date	Appl No.	Appl Date	Title
5126283	30-Jun-92	07/526071	21-May-90	PROCESS FOR THE SELECTIVE ENCAPSULATION OF AN ELECTRICALLY CONDUCTIVE STRUCTURE IN A SEMICONDUCTOR DEVICE
5148047	15-Sep-92	07/▇▇▇▇▇▇	▇▇-▇▇▇-▇▇	▇▇▇▇ ▇▇▇ ▇▇▇▇▇▇ ▇▇▇▇▇▇▇ WITH IMPROVED SPEED
▇▇▇▇▇▇▇	24-Dec-91	07/633867	26-Dec-90	STANDBY SYSTEM FOR A FREQUENCY SYNTHESIZER
5037777	06-Aug-91	07/546801	02-Jul-90	METHOD FOR FORMING A MULTI-LAYER SEMICONDUCTOR DEVICE USING SELECTIVE PLANARIZATION
5057893	15-Oct-91	07/589247	28-Sep-90	STATIC RAM CELL WITH SOFT ERROR IMMUNITY
5130635	14-Jul-92	07/747072	19-Aug-91	VOLTAGE REGULATOR HAVING BIAS CURRENT CONTROL CIRCUIT
5892381	06-Apr-99	08/868335	03-Jun-97	FAST START-UP CIRCUIT
5939906	17-Aug-99	08/925161	08-Sep-97	CIRCUIT COMPENSATING NONLINEARITIES
5197032	23-Mar-93	07/874866	28-Apr-92	BICMOS BIT LINE LOAD FOR A MEMORY WITH IMPROVED RELIABILITY AND A METHOD THEREFOR
5279978	18-Jan-94	07/993282	18-Dec-92	PROCESS FOR MAKING BICMOS DEVICE HAVING AN SOI SUBSTRATE
5122799	16-Jun-92	07/632772	24-Dec-90	MULTI-MODULATOR DIGITAL-TO-ANALOG CONVERTER
5199032	30-Mar-93	07/576864	04-Sep-90	MICROCONTROLLER HAVING AN EPROM WITH A LOW VOLTAGE PROGRAM INHIBIT CIRCUIT
5910726	08-Jun-99	08/911239	15-Aug-97	REFERENCE CIRCUIT AND METHOD
5249280	28-Sep-93	07/548695	05-Jul-90	MICROCOMPUTER HAVING A MEMORY BANK SWITCHING APPARATUS FOR ACCESSING A SELECTED MEMORY BANK IN AN EXTERNAL MEMORY
5210759	11-May-93	07/615190	19-Nov-90	DATA PROCESSING SYSTEM HAVING SCAN TESTING USING SET LATCHES FOR SELECTIVELY OBSERVING TEST DATA
5233565	03-Aug-93	07/633889	26-Dec-90	LOW POWER BICMOS MEMORY USING ADDRESS TRANSITION DETECTION A ND A METHOD THEREFOR
5148436	15-Sep-92	07/597243	15-Oct-90	CIRCUIT FOR DETECTING FALSE READ DATA FROM EPROM
5978249	02-Nov-99	08/992465	17-Dec-97	HIGH IMPEDANCE SIGNAL CONVERSION CIRCUIT AND METHOD
5147821	15-Sep-92	07/786205	31-Oct-91	METHOD FOR MAKING A THERMALLY ENHANCED SEMICONDUCTOR DEVICE BY HOLDING A LEADFRAME AGAINST A HEATSINK THROUGH VACUUM SUCTION IN A MOLDING OPERATION
5834926	10-Nov-98	08/907971	11-Aug-97	BANDGAPE REFERENCE CIRCUIT
5155392	13-Oct-92	07/715952	17-Jun-91	LOW DI/DT BICMOS OUTPUT BUFFER WITH IMPROVED SPEED
5294845	15-Mar-94	07/931187	17-Aug-92	DATA PROCESSOR HAVING AN OUTPUT TERMINAL WITH SELECTABLE OUTPUT IMPEDANCES
5859541	12-Jan-99	08/122193	15-Sep-93	DATA PROCESSOR HAVING AN OUTPUT TERMINAL WITH SELECTABLE OUTPUT IMPEDANCES
5162672	10-Nov-92	07/632901	24-Dec-90	DATA PROCESSOR HAVING AN OUTPUT TERMINAL WITH SELECTABLE OUTPUT IMPEDANCES
5273938	28-Dec-93	07/876315	30-Apr-92	METHOD FOR ATTACHING CONDUCTIVE TRACES TO PLURAL, STACKED, ENCAPSULATED SEMICONDUCTOR DIE USING A REMOVABLE TRANSFER FILM
5200362	06-Apr-93	07/756952	09-Sep-91	METHOD OF ATTACHING CONDUCTIVE TRACES TO AN ENCAPSULATED SEMICONDUCTOR DIE USING A REMOVABLE TRANSFER FILM
5239198	24-Aug-93	07/907970	02-Jul-92	OVERMOLDED SEMICONDUCTOR DEVICE HAVING SOLDER BALL AND EDGE LEAD CONNECTIVE STRUCTURE
5130947	14-Jul-92	07/600787	22-Oct-90	MEMORY SYSTEM FOR RELIABLY WRITING ADDRESSES WITH REDUCED POWER CONSUMPTION
4997790	05-Mar-91	07/566185	13-Aug-90	PROCESS FOR FORMING A SELF-ALIGNED CONTACT STRUCTURE
5210842	11-May-93	07/650108	04-Feb-91	DATA PROCESSOR HAVING INSTRUCTION VARIED SET ASSOCIATIVE CACHE BOUNDARY ACCESSING
6411226	25-Jun-02	09/765192	16-Jan-01	▇▇▇▇▇▇▇ DECODER WITH REDUCED MEMORY SIZE
5081454	14-Jan-92	07/577222	04-Sep-90	AUTOMATIC A/D CONVERTER OPERATION USING PROGRAMMABLE SAMPLE TIME
5293167	08-Mar-94	08/101262	03-Aug-93	AUTOMATIC A/D CONVERTER OPERATION WITH SELECTABLE RESULT FOR MAT
6952572	04-Oct-05	09/885487	20-Jun-01	IMAGE REJECTION MIXER WITH SWITCHABLE HIGH OR LOW SIDE INJECTION
6509609	21-Jan-03	09/884345	18-Jun-01	GROOVED CHANNEL SCHOTTKY MOSFET
6563226	13-May-03	09/864098	23-May-01	BONDING PAD
5317185	31-May-94	07/836169	18-Feb-92	SEMICONDUCTOR DEVICE HAVING STRUCTURES TO REDUCE


Patent No.	Grant Date	Appl No.	Appl Date	Title
				STRESS NOTCHING EFFECTS IN CONDUCTIVE LINES AND METHOD FOR MAKING THE SAME
5124639	23-Jun-92	07/616272	20-Nov-90	PROBE CARD APPARATUS HAVING A HEATING ELEMENT AND PROCESS FOR USING THE SAME
6420098	16-Jul-02	09/614199	12-Jul-00	METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICES ON A WAFER
5043652	27-Aug-91	07/590853	01-Oct-90	DIFFERENTIAL VOLTAGE TO DIFFERENTIAL CURRENT CONVERSION CIRCUIT HAVING LINEAR OUTPUT
5241503	31-Aug-93	07/660066	25-Feb-91	DYNAMIC RANDOM ACCESS MEMORY WITH IMPROVED PAGE-MODE PERFORMANCE AND METHOD THEREFOR HAVING ISOLATOR BETWEEN MEMORY CELLS AND SENSE AMPLIFIERS
5265258	23-Nov-93	07/671236	19-Mar-91	PARTIAL-SIZED PRIORITY ENCODER CIRCUIT HAVING LOOK-AHEAD CAPABILITY
5251304	05-Oct-93	07/589246	28-Sep-90	INTEGRATED CIRCUIT MICROCONTROLLER WITH ON-CHIP MEMORY AND EXTERNAL BUS INTERFACE AND PROGRAMMABLE MECHANISM FOR SECURING THE CONTENTS OF ON-CHIP MEMORY
5432950	11-Jul-95	08/069326	01-Jun-93	SYSTEM FOR SECURING A DATA PROCESSING SYSTEM AND METHOD OF OPERATION
5220526	15-Jun-93	07/662610	01-Mar-91	METHOD AND APPARATUS FOR INDICATING A DUPLICATION OF ENTRIES IN A CONTENT ADDRESSABLE STORAGE DEVICE
5095287	10-Mar-92	07/645170	24-Jan-91	PHASE LOCKED LOOP HAVING A CHARGE PUMP WITH RESET
5175124	29-Dec-92	07/674000	25-Mar-91	PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE USING RE-IONIZED RINSE WATER
5216278	01-Jun-93	07/841765	02-Mar-92	SEMICONDUCTOR DEVICE HAVING A PAD ARRAY CARRIER PACKAGE
6313567	06-Nov-01	09/546203	10-Apr-00	LITHOGRAPHY ▇▇▇▇▇ HAVING PIEZOELECTRIC ELEMENTS AND METHOD
6477693	05-Nov-02	09/508006	17-Feb-98	METHOD FOR MANUFACTURING AND DESIGNING A WIRING OF A CHANNEL OF AN ELECTRONIC DEVICE AND ELECTRONIC APPARATUS
5172214	15-Dec-92	07/866282	10-Apr-92	LEADLESS SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
5036294	30-Jul-91	07/620686	03-Dec-90	PHASE LOCKED LOOP HAVING LOW-FREQUENCY JITTER COMPENSATION
5268995	07-Dec-93	07/616973	21-Nov-90	METHOD FOR EXECUTING GRAPHICS Z-COMPARE AND PIXEL MERGE INSTRUCTIONS IN A DATE PROCESSOR
5987486	16-Nov-99	08/944609	06-Oct-97	APPARATUS AND METHOD FOR DATA PROCESSING
5208168	04-May-93	07/617727	26-Nov-90	SEMICONDUCTOR DEVICE HAVING PUNCH-THROUGH PROTECTED BURIED CONTACTS AND METHOD FOR MAKING THE SAME
5361490	08-Nov-94	08/144464	01-Nov-93	METHOD FOR MAKING TAPE AUTOMATED BONDING (TAB) SEMICONDUCTOR DEVICE
5165058	17-Nov-92	07/548529	05-Jul-90	VOLTAGE COMPARATOR WITH SAMPLE HOLD CIRCUIT
5301345	05-Apr-94	07/695161	03-May-91	DATA PROCESSING SYSTEM FOR PERFORMING A SHIFTING OPERATION AND A CONSTANT GENERATION OPERATION AND METHOD THEREFOR
5257357	26-Oct-93	07/644142	22-Jan-91	METHOD AND APPARATUS FOR IMPLEMENTING A PRIORITY ADJUSTMENT OF AN INTERRUPT IN A DATA PROCESSOR
5538922	23-Jul-96	08/378990	25-Jan-95	METHOD FOR FORMING CONTACT TO A SEMICONDUCTOR DEVICE
5219793	15-Jun-93	07/709554	03-Jun-91	METHOD FOR FORMING PITCH INDEPENDENT CONTACTS AND A SEMICONDUCTOR DEVICE HAVING THE SAME
5130769	14-Jul-92	07/700837	16-May-91	NONVOLATILE MEMORY CELL
5168466	01-Dec-92	07/664147	04-Mar-91	BIAS CURRENT GENERATOR CIRCUIT FOR A SENSE AMPLIFIER
5099240	24-Mar-92	07/583632	17-Sep-90	SUBRANGING ADC WITH ERROR CORRECTION THROUGH INCREASED FINE STEP SPAN AND NOISE REDUCING LAYOUT
6817602	16-Nov-04	09/941284	28-Aug-01	Manufacturing system method for processing a lithography mask container [ELECTRONIC DEVICE FOR A LITHOGRAPHY MASK CONTAINER, SEMICONDICTOR MANUFACTURING SYSTEM, AND METHOD]
6125413	26-Sep-00	08/999274	29-Dec-97	COMPUTER SYSTEM WITH TRIGGER CONTROLLED INTERFACE AND METHOD
5208189	04-May-93	07/769049	30-Sep-91	PROCESS FOR PLUGGING DEFECTS IN A DIELECTRIC LAYER OF A SEMICONDUCTOR DEVICE
5263168	16-Nov-93	07/709552	03-Jun-91	CIRCUITRY FOR AUTOMATICALLY ENTERING AND TERMINATING AN INITIALIZATION MODE IN A DATA PROCESSING SYSTEM IN RESPONSE TO A CONTROL SIGNAL
5193217	09-Mar-93	07/513453	23-Apr-90	LOW VOLTAGE IC FOR VOICE OPERATED TRANSCEIVER


Patent No.	Grant Date	Appl No.	Appl Date	Title
6182181	30-Jan-01	08/999178	29-Dec-97	COMPUTER SYSTEM WITH INTERFACE AND METHOD
5159572	27-Oct-92	07/632695	24-Dec-90	DRAM ARCHITECTURE HAVING DISTRIBUTED ADDRESS DECODING AND TIMING CONTROL
5128890	07-Jul-92	07/696407	06-May-91	APPARATUS FOR PERFORMING MULTIPLICATIONS WITH REDUCED POWER AND A METHOD THEREFOR
5241492	31-Aug-93	07/908689	03-Jul-92	APPARATUS FOR PERFORMING MULTIPLY AND ACCUMULATE INSTRUCTIONS WITH REDUCED POWER AND A METHOD THEREFOR
5367494	22-Nov-94	08/113632	31-Aug-93	RANDOMLY ACCESSIBLE MEMORY HAVING TIME OVERLAPPING MEMORY ACCESSES
6157968	05-Dec-00	09/013177	26-Jan-98	INTERFACE WITH SELECTOR RECEIVING CONTROL WORDS COMPRISING DEVICE IDENTIFIERS FOR DETERMINING CORRESPONDING COMMUNICATIONS PARAMETER SET FOR INTERFACE PORT TRANSFER OF DATA WORDS TO PERIPHERAL DEVICES
5194831	16-Mar-93	07/835835	18-Feb-92	FULLY-DIFFERENTIAL RELAXATION- TYPE VOLTAGE CONTROLLED OSCILLATOR AND METHOD THEREFOR
5341500	23-Aug-94	07/679478	02-Apr-91	DATA PROCESSOR WITH COMBINED STATIC AND DYNAMIC MASKING OF OPERAND FOR BREAKPOINT OPERATION
5206181	27-Apr-93	07/709553	03-Jun-91	METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE WITH A SLOTTED METAL TEST PAD TO PREVENT LIFT-OFF DURING WAFER SCRIBING
5339079	16-Aug-94	07/860381	30-Mar-92	DIGITAL-TO-ANALOG CONVERTER WITH A FLEXIBLE DATA INTERFACE
5639989	17-Jun-97	08/229495	19-Apr-94	SHIELDED ELECTRONIC COMPONENT ASSEMBLY AND METHOD FOR MAKING THE SAME
5173764	22-Dec-92	07/681608	08-Apr-91	SEMICONDUCTOR DEVICE HAVING A PARTICULAR LID MEANS AND ENCAPSULANT TO REDUCE DIE STRESS
5319232	07-Jun-94	08/076488	14-Jun-93	TRANSISTOR HAVING A LIGHTLY DO PED REGION
5200352	06-Apr-93	07/797580	25-Nov-91	TRANSISTOR HAVING A LIGHTLY DO PED REGION AND METHOD OF FORMATION
5266512	30-Nov-93	07/781691	23-Oct-91	METHOD FOR FORMING A NESTED SURFACE CAPACITOR
5166084	24-Nov-92	07/753512	03-Sep-91	PROCESS FOR FABRICATING A SILICON ON INSULATOR FIELD EFFECT TRANSISTOR
5222014	22-Jun-93	07/844,075	02-Mar-92	THREE-DIMENSIONAL MULTI-CHIP PAD ARRAY CARRIER
6028544	22-Feb-00	09/002421	02-Jan-98	DIGITAL-TO-ANALOG CONVERTER WITH NOISESHAPING MODULATOR, COMMUTATOR AND PLURALITY OF UNIT CONVERTERS, AND METHOD
5303355	12-Apr-94	07/675834	27-Mar-91	PIPELINED DATA PROCESSOR WHICH CONDITIONALLY EXECUTES A PREDETERMINED LOOPING INSTRUCTION IN HARDWARE
5188979	23-Feb-93	07/749820	26-Aug-91	METHOD FOR FORMING A NITRIDE LAYER USING PREHEATED AMMONIA
5265256	23-Nov-93	07/724260	01-Jul-91	DATA PROCESSING SYSTEM HAVING A PROGRAMMABLE MODE FOR SELECTING OPERATION AT ONE OF A PLURALITY OF POWER SUPPLY POTENTIALS
6366786	02-Apr-02	09/263545	08-Mar-99	RADIO WITH SYNCHRONIZATION APPARATUS AND METHOD THEREFOR
5535398	09-Jul-96	07/842951	28-Feb-92	METHOD AND APPARATUS FOR PROVIDING BOTH POWER AND CONTROL BY WAY OF AN INTEGRATED CIRCUIT TERMINAL
5155398	13-Oct-92	07/631511	21-Dec-90	CONTROL CIRCUIT FOR HIGH POWER SWITCHING TRANSISTOR
6178332	23-Jan-01	09/263544	08-Mar-99	RADIO WITH HALTING APPARATUS AND METHOD
5332653	26-Jul-94	07/907076	01-Jul-92	PROCESS FOR FORMING A CONDUCTIVE REGION WITHOUT PHOTORESIST- RELATED REFLECTIVE NOTCHING DAMAGE
5258648	02-Nov-93	07/982404	27-Nov-92	COMPOSITE FLIP CHIP SEMICONDUCTOR DEVICE WITH AN INTERPOSER HAVING TEST CONTACTS FORMED ALONG ITS PERIPHERY
5124632	23-Jun-92	07/724281	01-Jul-91	LOW-VOLTAGE PRECISION CURRENT GENERATOR
5245273	14-Sep-93	07/785120	30-Oct-91	BANDGAP VOLTAGE REFERENCE CIRCUIT
5319763	07-Jun-94	07/679463	02-Apr-91	DATA PROCESSOR WITH CONCURRENT STATIC AND DYNAMIC MASKING OF OPERAND INFORMATION AND METHOD THEREFOR
5308788	03-May-94	08/049645	19-Apr-93	TEMPERATURE CONTROLLED PROCESS FOR THE EPITAXIAL GROWTH OF A FILM OF MATERIAL
5262353	16-Nov-93	07/829837	03-Feb-92	PROCESS FOR FORMING A STRUCTURE WHICH ELECTRICALLY ▇▇▇▇▇▇▇ CONDUCTORS
5345105	06-Sep-94	08/103362	02-Aug-93	STRUCTURE FOR SHIELDING CONDUCTORS


Patent No.	Grant Date	Appl No.	Appl Date	Title
5381036	10-Jan-95	08/107412	16-Aug-93	LEAD-ON CHIP SEMICONDUCTOR DEVICE HAVING PERIPHERAL BOND PADS
5455200	03-Oct-95	08/097505	27-Jul-93	METHOD FOR MAKING A LEAD-ON-CHIP SEMICONDUCTOR DEVICE HAVING PERIPHERAL BOND PADS
5220195	15-Jun-93	07/810599	19-Dec-91	SEMICONDUCTOR DEVICE HAVING A MULTILAYER LEADFRAME WITH FULL POWER AND GROUND PLANES
5286674	15-Feb-94	07/844044	02-Mar-92	METHOD FOR FORMING A VIA STRUCTURE AND SEMICONDUCTOR DEVICE HAVING THE SAME
5268863	07-Dec-93	07/909485	06-Jul-92	MEMORY HAVING A WRITE ENABLE CONTROLLED WORD LINE
6076096	13-Jun-00	09/006212	13-Jan-98	BINARY RATE MULTIPLIER
5235334	10-Aug-93	07/860662	30-Mar-92	DIGITAL-TO-ANALOG CONVERTER WITH A LINEAR INTERPOLATOR
5331205	19-Jul-94	07/838657	21-Feb-92	MOLDED PLASTIC PACKAGE WITH WIRE PROTECTION
5275964	04-Jan-94	08/064994	24-May-93	METHOD FOR COMPACTLY LAYING OUT A PAIR OF TRANSISTORS
5966038	12-Oct-99	08/990596	15-Dec-97	CIRCUIT WITH OVER VOLTAGE PROTECTION AND METHOD
5293628	08-Mar-94	07/787167	04-Nov-91	DATA PROCESSING SYSTEM WHICH GENERATES A WAVEFORM WITH IMPROVED PULSE WIDTH RESOLUTION
5219117	15-Jun-93	07/786629	01-Nov-91	METHOD OF TRANSFERRING SOLDER BALLS ONTO A SEMICONDUCTOR DEVICE
5254217	19-Oct-93	07/919328	27-Jul-92	METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A CONDUCTIVE METAL OXIDE
5113189	12-May-92	07/718891	21-Jun-91	FREQUENCY TRANSLATING COHERENT ANALOG TO DIGITAL CONVERSION SYSTEM FOR MODULATED SIGNALS
5952870	14-Sep-99	08/999082	29-Dec-97	CIRCUIT WITH HYSTERESIS AND METHOD USING SAME
5323360	21-Jun-94	08/055596	03-May-93	LOCALIZED ATD SUMMATION FOR A MEMORY
6564366	13-May-03	09/486982	13-Oct-98	METHOD FOR CHANNEL ROUTING AND APPARATUS
5245646	14-Sep-93	07/891082	01-Jun-92	TUNING CIRCUIT FOR USE WITH AN INTEGRATED CONTINUOUS TIME ANALOG FILTER
5204277	20-Apr-93	07/829669	03-Feb-92	METHOD OF FORMING BIPOLAR TRANSISTOR HAVING SUBSTRATE TO POLYSILICON EXTRINSIC BASE CONTACT
5124704	23-Jun-92	07/583130	17-Sep-90	Multi-comparator A/D converter with circuit for testing the operation thereof [A/D CONVERTER WITH TEST CIRCUIT]
5359626	25-Oct-94	07/939770	02-Sep-92	SERIAL INTERFACE BUS SYSTEM FOR TRANSMITTING AND RECEIVING DIGITAL AUDIO INFORMATION
5479445	26-Dec-95	08/409917	24-Mar-95	MODE DEPENDENT SERIAL TRANSMISSION OF DIGITAL AUDIO INFORMATION
5278874	11-Jan-94	07/939745	02-Sep-92	PHASE LOCK LOOP FREQUENCY CORRECTION CIRCUIT
5247423	21-Sep-93	07/887963	26-May-92	STACKING THREE DIMENSIONAL LEADLESS MULTI-CHIP MODULE AND METHOD FOR MAKING THE SAME
5185689	09-Feb-93	07/875463	29-Apr-92	CAPACITOR HAVING A RUTHENATE ELECTRODE AND METHOD OF FORMATION
6650135	18-Nov-03	09/606996	29-Jun-00	MEASUREMENT ▇▇▇▇▇ HAVING PIEZOELECTRIC ELEMENTS AND METHOD
5308778	03-May-94	08/003813	11-Jan-93	METHOD OF FORMATION OF TRANSISTOR AND LOGIC GATES
5198375	30-Mar-93	07/856314	23-Mar-92	METHOD FOR FORMING A BIPOLAR TRANSISTOR STRUCTURE
5187445	16-Feb-93	07/783608	28-Oct-91	TUNING CIRCUIT FOR CONTINUOUS-TIME FILTERS AND METHOD THEREFOR
5187448	16-Feb-93	07/829822	03-Feb-92	DIFFERENTIAL AMPLIFIER WITH COMMON-MODE STABILITY ENHANCEMENT
6034562	07-Mar-00	08/442742	17-May-95	MIXED SIGNAL PROCESSING SYSTEM AND METHOD FOR POWERING SAME
5268866	07-Dec-93	07/844022	02-Mar-92	MEMORY WITH COLUMN REDUNDANCY AND LOCALIZED COLUMN REDUNDANCY CONTROL SIGNALS
5284287	08-Feb-94	07/937267	31-Aug-92	METHOD FOR ATTACHING CONDUCTIVE BALLS TO A SUBSTRATE
6016017	18-Jan-00	08/989726	12-Dec-97	SYSTEM FOR PROVIDING UNINTERRUPTED SUPPLY VOLTAGE AND METHOD
5285352	08-Feb-94	07/913312	15-Jul-92	PAD ARRAY SEMICONDUCTOR DEVICE WITH THERMAL CONDUCTOR AND PROCESS FOR MAKING THE SAME
5334857	02-Aug-94	07/864246	06-Apr-92	SEMICONDUCTOR DEVICE WITH TEST-ONLY CONTACTS AND METHOD FOR MAKING THE SAME
5392348	21-Feb-95	07/797563	25-Nov-91	DTMF DETECTION HAVING SAMPLE RATE DECIMATION AND ADAPTIVE TONE DETECTION
5598550	28-Jan-97	08/346986	30-Nov-94	CACHE CONTROLLER FOR PROCESSING SIMULTANEOUS CACHE ACCESSES


Patent No.	Grant Date	Appl No.	Appl Date	Title
5375229	20-Dec-94	07/867568	13-Apr-92	SYSTEM AND METHOD FOR ADDING A CONTROL FUNCTION TO A SEMICONDUCTOR EQUIPMENT SYSTEM
6243802	05-Jun-01	09/263354	05-Mar-99	APPARATUS AND METHOD FOR ENCRYPTED INSTRUCTIONS
5155451	13-Oct-92	07/835834	18-Feb-92	CIRCUIT AND METHOD FOR DYNAMICALLY GENERATING A CLOCK SIGNAL
6178491	23-Jan-01	09/273371	22-Mar-99	METHOD FOR STORING DATA STRUCTURES IN MEMORY USING ADDRESS POINTERS, AND APPARATUS
5243348	07-Sep-93	07/873868	27-Apr-92	PARTITIONED DIGITAL ENCODER AND METHOD FOR ENCODING BIT GROUPS IN PARALLEL
5291076	01-Mar-94	07/937018	31-Aug-92	DECODER/COMPARATOR AND METHOD OF OPERATION
5357237	18-Oct-94	07/941011	04-Sep-92	IN A DATA PROCESSOR A METHOD AND APPARATUS FOR PERFORMING A FLOATING-POINT COMPARISON OPERATION
6205546	20-Mar-01	09/273386	22-Mar-99	COMPUTER SYSTEM HAVING A MULTI-POINTER BRANCH INSTRUCTION AND METHOD
5291053	01-Mar-94	07/909512	06-Jul-92	SEMICONDUCTOR DEVICE HAVING AN OVERLAPPING MEMORY CELL
5303191	12-Apr-94	07/824666	23-Jan-92	MEMORY WITH COMPENSATION FOR VOLTAGE, TEMPERATURE, AND PROCESSING VARIATIONS
5329282	12-Jul-94	07/844050	02-Mar-92	MULTI-BIT SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH REDUCED SENSITIVITY TO DAC NONLINEARITIES
5259001	02-Nov-93	07/810775	17-Dec-91	ADPCM DECODER WITH AN INTEGRAL DIGITAL RECEIVE GAIN AND METHOD THEREFOR
5319573	07-Jun-94	07/821111	15-Jan-92	METHOD AND APPARATUS FOR NOISE BURST DETECTION IN A SIGNAL PROCESSOR
5450283	12-Sep-95	08/179892	10-Jan-94	THERMALLY ENHANCED SEMICONDUCTOR DEVICE HAVING EXPOSED BACKSIDE AND METHOD FOR MAKING THE SAME
5546588	13-Aug-96	08/350396	05-Dec-94	METHOD AND APPARATUS FOR PREVENTING A DATA PROCESSING SYSTEM FROM ENTERING A NON-RECOVERABLE STATE
5910680	08-Jun-99	08/215170	21-Mar-94	GERMANIUM SILICATE SPIN ON GLASS SEMICONDUCTOR DEVICE AND METHODS OF SPIN ON GLASS SYNTHES IS AND USE
5726087	10-Mar-98	08/258360	09-Jun-94	METHOD OF FORMATION OF SEMICONDUCTOR GATE DIELECTRIC
5712208	27-Jan-98	08/449964	25-May-95	METHODS OF FORMATION OF SEMICONDUCTOR COMPOSITE GATE DIELECTRIC HAVING MULTIPLE INCORPORATED ATOMIC DOPANTS
5283484	01-Feb-94	07/959578	13-Oct-92	VOLTAGE LIMITER AND SINGLE-ENDED TO DIFFERENTIAL CONVERTER USING SAME
5280193	18-Jan-94	07/877930	04-May-92	REPAIRABLE SEMICONDUCTOR MULTI -PACKAGE MODULE HAVING INDIVIDUALIZED PACKAGE BODIES ON A PC BOARD SUBSTRATE
5311057	10-May-94	07/982549	27-Nov-92	LEAD-ON-CHIP SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
5499338	12-Mar-96	08/320590	11-Oct-94	A BUS SYSTEM HAVING A SYSTEM BUS, AN INTERNAL BUS WITH FUNCTIONAL UNITS COUPLED THERE BETWEEN AND A LOGIC UNIT FOR USE IN SUCH SYSTEM
5160894	03-Nov-92	07/822224	17-Jan-92	DIGITAL FREQUENCY SYNTHESIZER AND METHOD OF FREQUENCY SYNTHESIS
6156579	05-Dec-00	08/823741	25-Mar-97	CIRCUIT IDENTIFIER FOR USE WITH FOCUSED ION BEAM EQUIPMENT
6202144	13-Mar-01	09/273369	22-Mar-99	COMPUTER SYSTEM HAVING A SINGLE POINTER BRANCH INSTRUCTION AND METHOD
5394028	28-Feb-95	07/904430	26-Jun-92	APPARATUS FOR TRANSITIONING BETWEEN POWER SUPPLY LEVELS
5233222	03-Aug-93	07/919442	27-Jul-92	SEMICONDUCTOR DEVICE HAVING WINDOW-FRAME FLAG TAPERED EDGE IN OPENING
5233573	03-Aug-93	07/986195	07-Dec-92	DIGITAL DATA PROCESSOR INCLUDING APPARATUS FOR COLLECTING TIME-RELATED INFORMATION
5304855	19-Apr-94	07/941603	08-Sep-92	BI-LEVEL PULSE ACCUMULATOR
5313089	17-May-94	07/887942	26-May-92	CAPACITOR AND A MEMORY CELL FORMED THEREFROM
5405796	11-Apr-95	08/182470	18-Jan-94	CAPACITOR AND METHOD OF FORMATION AND A MEMORY CELL FORMED THEREFROM
5301335	05-Apr-94	07/907077	01-Jul-92	REGISTER WITH SELECTIVE WAIT FEATURE
5295229	15-Mar-94	07/899975	17-Jun-92	CIRCUIT AND METHOD FOR DETERMINING MEMBERSHIP IN A SET DURING A FUZZY LOGIC OPERATION
6127257	03-Oct-00	08/154366	18-Nov-93	IMPROVED CONTACT STRUCTURE AND PROCESS
5127002	30-Jun-92	07/731609	17-Jul-91	TIME SLOT ASSIGNER FOR USE IN A SERIAL COMMUNICATION


Patent No.	Grant Date	Appl No.	Appl Date	Title
				SYSTEM
6657977	02-Dec-03	09/276864	26-Mar-99	RADIO WITH BURST EVENT EXECUTION APPARATUS AND METHOD THEREFOR
5583377	10-Dec-96	08/537169	29-Sep-95	PAD ARRAY SEMICONDUCTOR DEVICE HAVING A HEAT SINK WITH DIE RECEIVING CAVITY AND METHOD FOR MAKING THE SAME
5302952	12-Apr-94	07/936492	28-Aug-92	AUTOMATIC A/D CONVERTER OPERATION WITH PAUSE CAPABILITY
5375216	20-Dec-94	07/844011	28-Feb-92	APPARATUS AND METHOD FOR OPTIMIZING PERFORMANCE OF A CACHE MEMORY IN A DATA PROCESSING SYSTEM
5594880	14-Jan-97	08/243731	17-May-94	System for executing a plurality of tasks within an instruction in different orders depending upon a conditional value [METHOD AND APPARATUS FOR DETERMINING INSTRUCTION EXECUTION ORDERING IN A DATA PROCESSING SYSTEM]
5263125	16-Nov-93	07/899968	17-Jun-92	CIRCUIT AND METHOD FOR EVALUATING FUZZY LOGIC RULES
5126594	30-Jun-92	07/731608	17-Jul-91	VOLTAGE SPIKE DETECTION CIRCUIT FOR USE IN DETECTING CLOCK EDGE TRANSITIONS WITHIN A SERIAL COMMUNICATION SYSTEM
5337207	09-Aug-94	07/993987	21-Dec-92	HIGH-PERMITTIVITY DIELECTRIC CAPACITOR FOR USE IN A SEMICONDUCTOR DEVICE AND PROCESS FOR MAKING THE SAME
5256588	26-Oct-93	07/856411	23-Mar-92	METHOD FOR FORMING A TRANSISTOR AND A CAPACITOR FOR USE IN A VERTICALLY STACKED DYNAMIC RANDOM ACCESS MEMORY CELL
5291438	01-Mar-94	08/088938	12-Jul-93	TRANSISTOR AND A CAPACITOR USED FOR FORMING A VERTICALLY STACKED DYNAMIC RANDOM ACCESS MEMORY CELL
5329486	12-Jul-94	08/096204	23-Jul-93	FERROMAGNETIC MEMORY DEVICE
5389566	14-Feb-95	08/218395	28-Mar-94	METHOD OF FORMING A FERROMAGNETIC MEMORY DEVICE
5377139	27-Dec-94	07/990341	11-Dec-92	PROCESS FORMING AN INTEGRATED CIRCUIT
5272117	21-Dec-93	07/986303	07-Dec-92	METHOD FOR PLANARIZING A LAYER OF MATERIAL
5294827	15-Mar-94	07/991548	14-Dec-92	SEMICONDUCTOR DEVICE HAVING THIN PACKAGE BODY AND METHOD FOR MAKING THE SAME
5476566	19-Dec-95	08/187363	26-Jan-94	METHOD FOR THINNING A SEMICONDUCTOR WAFER
5272453	21-Dec-93	07/923767	03-Aug-92	METHOD AND APPARATUS FOR SWITCHING BETWEEN GAIN CURVES OF A VOLTAGE CONTROLLED OSCILLATOR
5732405	24-Mar-98	08/336702	08-Nov-94	METHOD AND APPARATUS FOR PERFORMING A CACHE OPERATION IN A DATA PROCESSING SYSTEM
5220326	15-Jun-93	07/860663	30-Mar-92	DIGITAL-TO-ANALOG CONVERTER WITH IMPROVED PERFORMANCE AND METHOD THEREFOR
6097075	01-Aug-00	09/366308	02-Aug-99	SEMICONDUCTOR STRUCTURE FOR DRIVER CIRCUITS WITH LEVEL SHIFTING
▇▇▇▇▇▇▇	27-Jul-93	07/860540	30-Mar-92	SIGMA-DELTA DIGITAL-TO-ANALOG CONVERTER WITH REDUCED DISTORTION
5365121	15-Nov-94	08/028006	08-Mar-93	CHARGE PUMP WITH CONTROLLED RAMP RATE
5381051	10-Jan-95	08/028000	08-Mar-93	HIGH VOLTAGE CHARGE PUMP
5506971	09-Apr-96	08/386252	09-Feb-95	METHOD AND APPARATUS FOR PERFORMING A SNOOP-RETRY PROTOCOL IN A DATA PROCESSING SYSTEM
6744494	01-Jun-04	10/012989	07-Dec-01	CONTINUOUSLY ADJUSTABLE NEUTRAL DENSITY AREA FILTER
5221926	22-Jun-93	07/907075	01-Jul-92	CIRCUIT AND METHOD FOR CANCELING NONLINEARITY ERROR ASSOCIATED WITH COMPONENT VALUE MISMATCHES IN A DATA CONVERTER
5323157	21-Jun-94	08/004816	15-Jan-93	SIGMA-DELTA DIGITAL-TO-ANALOG CONVERTER WITH REDUCED NOISE
5352631	04-Oct-94	07/991801	16-Dec-92	METHOD FOR FORMING A TRANSISTOR HAVING SILICIDED REGIONS
5291455	01-Mar-94	07/880381	08-May-92	MEMORY HAVING DISTRIBUTED REFERENCE AND BIAS VOLTAGES
5281864	25-Jan-94	07/866602	10-Apr-92	IMPLEMENTATION OF THE IEEE 11491 BOUNDARY-SCAN ARCHITECTURE
5308741	03-May-94	07/922409	31-Jul-92	LITHOGRAPHIC METHOD USING DOUBLE EXPOSURE TECHNIQUES, MASK POSITION SHIFTING AND LIGHT PHASE SHIFTING
5592025	07-Jan-97	08/349272	05-Dec-94	PAD ARRAY SEMICONDUCTOR DEVICE
6226556	01-May-01	09/112533	09-Jul-98	APPARATUS WITH FAILURE RECOVERY AND METHOD THEREFORE
5432731	11-Jul-95	08/028915	08-Mar-93	FERROELECTRIC MEMORY CELL AND METHOD OF SENSING AND WRITING THE POLARIZATION STATE THEREOF
5341320	23-Aug-94	08/024011	01-Mar-93	METHOD FOR RAPIDLY PROCESSING FLOATING-POINT


Patent No.	Grant Date	Appl No.	Appl Date	Title
				OPERATIONS WHICH INVOLVE EXCEPTIONS
5300454	05-Apr-94	07/982164	24-Nov-92	METHOD FOR FORMING DOPED REGIONS WITHIN A SEMICONDUCTOR SUBSTRATE
5624854	29-Apr-97	08/446397	22-May-95	[SEMICONDUCTOR DEVICE AND] METHOD OF FORMATION of bipolar transistor having reduced parasitic capacitance
5590241	31-Dec-96	08/054494	30-Apr-93	SPEECH PROCESSING SYSTEM AND METHOD FOR ENHANCING SPEECH SIGNALS IN A NOISY ENVIRONMENT
5408130	18-Apr-95	08/286592	05-Aug-94	INTERCONNECTION STRUCTURE FOR CONDUCTIVE LAYERS
5262352	16-Nov-93	07/937025	31-Aug-92	METHOD FOR FORMING AN INTERCONNECTION STRUCTURE FOR CONDUCTIVE LAYERS
6491451	10-Dec-02	09/706201	03-Nov-00	WAFER PROCESSING EQUIPMENT AND METHOD FOR PROCESSING WAFERS
5275973	04-Jan-94	08/024150	01-Mar-93	METHOD FOR FORMING METALLIZATION IN AN INTEGRATED CIRCUIT
5521428	28-May-96	08/293402	22-Aug-94	FLAGLESS SEMICONDUCTOR DEVICE
5310626	10-May-94	08/024027	01-Mar-93	METHOD FOR FORMING A PATTERNED LAYER USING DIELECTRIC MATERIALS AS A LIGHT-SENSITIVE MATERIAL
5898619	27-Apr-99	08/242993	16-May-94	MEMORY CELL HAVING A PLURAL TRANSISTOR TRANSMISSION GATE AND METHOD OF FORMATION
5949706	07-Sep-99	09/236914	26-Jan-99	STATIC RANDOM ACCESS MEMORY CELL HAVING A THIN FILM TRANSISTOR (TFT) PASS GATE CONNECTION TO A BIT LINE
5311061	10-May-94	08/063474	19-May-93	ALIGNMENT KEY FOR A SEMICONDUCTOR DEVICE HAVING A SEAL AGAINST IONIC CONTAMINATION
5612576	18-Mar-97	07/960337	13-Oct-92	SELF-OPENING VENT HOLE IN AN OVERMOLDED SEMICONDUCTOR DEVICE
5386534	31-Jan-95	07/967295	27-Oct-92	DATA PROCESSING SYSTEM FOR GENERATING SYMMETRICAL RANGE OF ADDRESSES OF INSTRUCTING-ADDRESS-VALUE WITH THE USE OF INVERTING SIGN VALUE
5410595	25-Apr-95	07/975348	12-Nov-92	APPARATUS AND METHOD FOR NOISE REDUCTION FOR A FULL-DUPLEX SPEAKERPHONE OR THE LIKE
5309484	03-May-94	07/939286	01-Sep-92	METHOD AND APPARATUS FOR ASYNCHRONOUS TIMING RECOVERY USING INTERPOLATION FILTER
5327133	05-Jul-94	08/019379	16-Feb-93	DIGITAL INTEGRATOR WITH REDUCED CIRCUIT AREA AND ANALOG-TO-DIGITAL CONVERTER USING SAME
5283580	01-Feb-94	07/951958	28-Sep-92	CURRENT/RESISTOR DIGITAL-TO-ANALOG CONVERTER HAVING ENHANCED INTEGRAL LINEARITY AND METHOD OF OPERATION
5358890	25-Oct-94	08/047933	19-Apr-93	PROCESS FOR FABRICATING ISOLATION REGIONS IN A SEMICONDUCTOR DEVICE
5339278	16-Aug-94	08/044790	12-Apr-93	METHOD AND APPARATUS FOR STAND BY RECOVERY IN A PHASE LOCKED LOOP
5375081	20-Dec-94	08/206288	07-Mar-94	HIGH SPEED ADDER USING VARIED CARRY SCHEME AND RELATED METHOD
5640548	17-Jun-97	07/962560	19-Oct-92	METHOD AND APPARATUS FOR UNSTACKING REGISTERS IN A DATA PROCESSING SYSTEM
5327008	05-Jul-94	08/035422	22-Mar-93	SEMICONDUCTOR DEVICE HAVING UNIVERSAL LOW-STRESS DIE SUPPORT AND METHOD FOR MAKING THE SAME
5424576	13-Jun-95	08/133947	12-Oct-93	SEMICONDUCTOR DEVICE HAVING X-SHAPED DIE SUPPORT MEMBER AND METHOD FOR MAKING THE SAME
5474958	12-Dec-95	08/055863	04-May-93	METHOD FOR MAKING SEMICONDUCTOR DEVICE HAVING NO DIE SUPPORTING SURFACE
5357252	18-Oct-94	08/034967	22-Mar-93	SIGMA-DELTA MODULATOR WITH IMPROVED TONE REJECTION AND METHOD THEREFOR
5324690	28-Jun-94	08/011919	01-Feb-93	SEMICONDUCTOR DEVICE HAVING A TERNARY BORON NITRIDE FILM AND A METHOD FOR FORMING THE SAME
5291062	01-Mar-94	08/024124	01-Mar-93	AREA ARRAY SEMICONDUCTOR DEVICE HAVING A LID WITH FUNCTIONAL CONTACTS
5341113	23-Aug-94	08/084887	30-Jun-93	VOLTAGE CONTROLLED OSCILLATOR
6085275	04-Jul-00	08/389511	09-Feb-95	A DATA PROCESSING SYSTEM AND METHOD THEREOF
5706488	06-Jan-98	08/398222	01-Mar-95	A DATA PROCESSING SYSTEM AND METHOD THEREOF
5734879	31-Mar-98	08/409761	22-Mar-95	A SATURATION INSTRUCTION IN A DATA PROCESSOR
5752074	12-May-98	08/390191	10-Feb-95	DATA PROCESSING SYSTEM AND METHOD THEREOF
5537562	16-Jul-96	08/424990	19-Apr-95	DATA PROCESSING SYSTEM AND METHOD THEREOF
5717947	10-Feb-98	08/040779	31-Mar-93	DATA PROCESSING SYSTEM AND METHOD THEREOF
5805874	08-Sep-98	08/425961	18-Apr-95	METHOD AND APPARATUS FOR PERFORMING A VECTOR SKIP


Patent No.	Grant Date	Appl No.	Appl Date	Title
				INSTRUCTION IN A DATA PROCESSOR
5742786	21-Apr-98	08/389512	13-Feb-95	METHOD AND APPARATUS FOR STORING VECTOR DATA IN MULTIPLE NON-CONSECUTIVE LOCATIONS IN A DATA PROCESSOR USING A MASK VALUE
5327103	05-Jul-94	08/086263	29-Jun-93	A LOCK DETECTION CIRCUIT FOR A PHASE LOCK LOOP
5407855	18-Apr-95	08/072012	07-Jun-93	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE HAVING A REDUCING /OXIDIZING CONDUCTIVE MATERIAL
5510651	23-Apr-96	08/342293	18-Nov-94	SEMICONDUCTOR DEVICE HAVING A REDUCING/OXIDIZING CONDUCTIVE MATERIAL
5510645	23-Apr-96	08/383908	17-Jan-95	SEMICONDUCTOR STRUCTURE HAVING AN AIR REGION AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE
6686254	03-Feb-04	09/842453	27-Apr-01	SEMICONDUCTOR STRUCTURE AND METHOD FOR REDUCING CHARGE DAMAGE
5457660	10-Oct-95	08/131818	05-Oct-93	RESET SIGNAL GENERATOR CIRCUIT HAVING A FUNCTION FOR PROTECTION WRITE DATA
6571386	27-May-03	09/508558	13-Oct-98	APPARATUS AND METHOD FOR PROGRAM OPTIMIZING
5329734	19-Jul-94	08/054168	30-Apr-93	POLISHING PADS USED TO CHEMICAL-MECHANICAL POLISH A SEMICONDUCTOR SUBSTRATE
5302849	12-Apr-94	08/024060	01-Mar-93	PLASTIC AND GRID ARRAY SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
6014722	11-Jan-00	08/858439	19-May-97	DATA COMMUNICATION SYSTEM FOR CONTROLLING PRIORITIZATION AND TRANSFER OF DATA AND METHOD THEREFOR
6389706	21-May-02	09/641143	17-Aug-00	WAFER CONTAINER HAVING ELECTRICALLY CONDUCTIVE KINEMATIC COUPLING GROOVE, SUPPORT SURFACE WITH ELECTRICALLY CONDUCTIVE KINEMATIC COUPLING PIN, TRANSPORTATION SYSTEM, AND METHOD
5686352	11-Nov-97	08/509442	31-Jul-95	METHOD FOR MAKING A TAB SEMICONDUCTOR DEVICE WITH SELF-ALIGNING CAVITY AND INTRINSIC STAND OFF
5848289	08-Dec-98	07/982327	27-Nov-92	EXTENSIBLE CENTRAL PROCESSING UNIT
5317522	31-May-94	08/088944	12-Jul-93	METHOD AND APPARATUS FOR NOISE BURST DETECTION IN A SIGNAL PROCESSOR
5358901	25-Oct-94	08/024042	01-Mar-93	PROCESS FOR FORMING AN INTERMETALLIC LAYER
5584031	10-Dec-96	08/407792	20-Mar-95	SYSTEM AND METHOD FOR EXECUTING A LOW POWER DELAY INSTRUCTION
5416783	16-May-95	08/103614	09-Aug-93	METHOD AND APPARATUS FOR GENERATING PSEUDO RANDOM NUMBERS OR FOR PERFORMING DATA COMPRESSION IN A DATA PROCESSOR
5281867	25-Jan-94	08/021693	23-Feb-93	MULTIPLE CHANNEL SAMPLING CIRCUIT HAVING MINIMIZED CROSSTALK INTERFERENCE
6658440	02-Dec-03	09/512559	24-Feb-00	MULTICHANNEL FILTERING DEVICE AND METHOD
5407870	18-Apr-95	08/071885	07-Jun-93	PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A HIGH RELIABILITY DIELECTRIC MATERIAL
5476816	19-Dec-95	08/219123	28-Mar-94	PROCESS FOR ETCHING AN INSULATING LAYER AFTER A METAL ETCHING STEP
5539249	23-Jul-96	08/309231	20-Sep-94	METHOD AND STRUCTURE FOR FORMING AN INTEGRATED CIRCUIT PATTERN ON A SEMICONDUCTOR SUBSTRATE
5639687	17-Jun-97	08/606157	23-Feb-96	METHOD [AND STRUCTURE] FOR FORMING AN INTEGRATED CIRCUIT PATTERN ON A SEMICONDUCTOR SUBSTRATE using silicon-rich silicon nitride
5378659	03-Jan-95	08/086268	06-Jul-93	METHOD AND STRUCTURE FOR FORMING AN INTEGRATED CIRCUIT PATTERN ON A SEMICONDUCTOR SUBSTRATE
5668975	16-Sep-97	08/722694	30-Sep-96	METHOD OF REQUESTING DATA BY INTERLACING CRITICAL AND NON-CRITICAL DATA WORDS OF MULTIPLE DATA REQUESTS AND APPARATUS THEREFOR
5531861	02-Jul-96	08/373804	17-Jan-95	CHEMICAL-MECHANICAL-POLISHING PAD CLEANING PROCESS FOR USE DURING THE FABRICATION OF SEMICONDUCTOR DEVICES
5339279	16-Aug-94	08/057924	07-May-93	BLOCK ERASABLE FLASH EEPROM APPARATUS AND METHOD THEREOF
6468017	22-Oct-02	09/717623	21-Nov-00	VEHICLE, SYSTEM AND METHOD FOR LOADING AND UNLOADING
5812833	22-Sep-98	08/555454	13-Nov-95	TIMER BUS STRUCTURE FOR AN INTEGRATED CIRCUIT
5721889	24-Feb-98	08/555963	13-Nov-95	DATA TRANSFER BETWEEN INTEGRATED CIRCUIT TIMER CHANNELS
5732225	24-Mar-98	08/555964	13-Nov-95	INTEGRATED CIRCUIT TIMER SYSTEM HAVING A GLOBAL BUS FOR TRANSFERRING INFORMATION BETWEEN LOCAL BUSES


Patent No.	Grant Date	Appl No.	Appl Date	Title
5377072	27-Dec-94	08/179275	10-Jan-94	SINGLE METAL-PLATE BYPASS CAPACITOR
5457802	10-Oct-95	08/061474	17-May-93	INTEGRATED CIRCUIT PIN CONTROL APPARATUS AND METHOD THEREOF IN A DATA PROCESSING SYSTEM
5628862	13-May-97	08/444172	18-May-95	POLISHING PAD FOR CHEMICAL-MECHANICAL POLISHING OF A SEMICONDUCTOR SUBSTRATE
5396128	07-Mar-95	08/120506	13-Sep-93	OUTPUT CIRCUIT FOR INTERFACING INTEGRATED CIRCUITS HAVING DIFFERENT POWER SUPPLY POTENTIALS
5535376	09-Jul-96	08/062625	18-May-93	DATA PROCESSOR HAVING A TIMER CIRCUIT FOR PERFORMING A BUFFERED PULSE WIDTH MODULATION FUNCTION AND METHOD THEREFOR
5729721	17-Mar-98	08/555965	13-Nov-95	TIMEBASE SYNCHRONIZATION IN SEPARATE INTEGRATED CIRCUITS OR SEPARATE MODULES
5387913	07-Feb-95	08/149392	09-Nov-93	RECEIVER WITH DIGITAL TUNING A ND METHOD THEREFOR
5387540	07-Feb-95	08/130052	30-Sep-93	METHOD OF FORMING TRENCH ISOLATION STRUCTURE IN AN INTEGRATED CIRCUIT
5394444	28-Feb-95	08/088951	12-Jul-93	LOCK DETECT CIRCUIT FOR DETECT ING A LOCK CONDITION IN A PHASE LOCKED LOOP AND METHOD THERE FOR
5373463	13-Dec-94	08/086254	06-Jul-93	FERROELECTRIC NONVOLATILE RANDOM ACCESS MEMORY HAVING DRIVE LINE SEGMENTS
5714792	03-Feb-98	08/315545	30-Sep-94	SEMICONDUCTOR DEVICE HAVING A REDUCED DIE SUPPORT AREA AND METHOD FOR MAKING THE SAME
5654588	05-Aug-97	08/487671	07-Jun-95	APPARATUS FOR PERFORMING WAFER LEVEL TESTING OF INTEGRATED CIRCUITS WHERE THE WAFER USES A SEGMENTED CONDUCTIVE TOP-LAYER BUS STRUCTURE
5594273	14-Jan-97	08/482330	07-Jun-95	APPARATUS FOR PERFORMING WAFER LEVEL-TESTING OF INTEGRATED CIRCUITS WHERE TEST PADS LIE WITH IN INTEGRATED CIRCUIT DIE BUT OVERLY NO ACTIVE CIRCUITRY FOR IMPROVED YIELD
5504369	02-Apr-96	08/342960	21-Nov-94	[METHOD AND] APPARATUS FOR PERFORMING WAFER LEVEL TESTING OF INTEGRATED CIRCUIT
5399505	21-Mar-95	08/096094	23-Jul-93	METHOD AND APPARATUS FOR PERFORMING WAFER LEVEL TESTING OF INTEGRATED CIRCUIT DICE
5391999	21-Feb-95	08/160136	02-Dec-94	GLITCHLESS SWITCHED-CAPACITOR BIQUAD LOW PASS FILTER
5442353	15-Aug-95	08/140948	25-Oct-93	BAND PASS SIGMA-DELTA ANALOG-TO -DIGITAL CONVERTER (ADC), METHOD THEREFOR, AND RECEIVER USING SAME
6495802	17-Dec-02	09/871854	31-May-01	TEMPERATURE-CONTROLLED ▇▇▇▇▇ AND METHOD FOR CONTROLLING THE TEMPERATURE OF A SUBSTANTIALLY FLAT OBJECT
5362990	08-Nov-94	08/070186	02-Jun-93	CHARGE PUMP WITH A PROGRAMMABLE PUMP CURRENT AND SYSTEM
5467141	14-Nov-95	08/129037	12-Oct-93	[A] MODULATOR CIRCUIT for use with a plurality of operating standards
5404386	04-Apr-95	08/157245	26-Nov-93	PROGRAMMABLE CLOCK FOR AN ANALOG CONVERTER IN A DATA PROCESS OR AND METHOD THEREFOR
5367477	22-Nov-94	08/158326	29-Nov-93	METHOD AND APPARATUS FOR PERFORMING PARALLEL ZERO DETECTION IN A DATA PROCESSING SYSTEM
5592634	07-Jan-97	08/242766	16-May-94	A ZERO-CYCLE MULTI-STATE BRANCH CACHE PREDICTION DATA PROCESSING SYSTEM AND METHOD THEREOF
6737205	18-May-04	10/135463	30-Apr-02	ARRANGEMENT AND METHOD FOR TRANSFERRING A PATTERN FROM A MASK TO A WAFER
5451543	19-Sep-95	08/233108	25-Apr-94	STRAIGHT SIDEWALL PROFILE CONTACT OPENING TO UNDERLYING INTERCONNECT AND METHOD FOR MAKING THE SAME
5394027	28-Feb-95	08/144361	01-Nov-93	HIGH VOLTAGE CHARGE PUMP AND RELATED CIRCUITRY
5696394	09-Dec-97	08/664327	14-Jun-96	CAPACITOR HAVING A METAL-OXIDE DIELECTRIC
5583068	10-Dec-96	08/430680	28-Apr-95	PROCESS FOR FORMING A CAPACITOR HAVING A METAL-OXIDE DIELECTRIC
6620563	16-Sep-03	09/801522	08-Mar-01	LITHOGRAPHY METHOD FOR FORMING SEMICONDUCTOR DEVICES ON A WAFER UTILIZING ATOMIC FORCE MICROSCOPY
5734201	31-Mar-98	08/328978	21-Oct-94	LOW PROFILE SEMICONDUCTOR DEVICE with like-sized chip and mounting substrate [AND METHOD FOR MAKING THE SAME ]
5365199	15-Nov-94	08/100789	02-Aug-93	AMPLIFIER WITH FEEDBACK HAVING HIGH POWER SUPPLY REJECTION
5373255	13-Dec-94	08/098974	28-Jul-93	LOW-POWER, JITTER-COMPENSATED PHASE LOCKED LOOP AND METHOD THEREFOR
5483817	16-Jan-96	08/257263	08-Jun-94	SHORT CIRCUIT DETECTOR FOR SENSORS


Patent No.	Grant Date	Appl No.	Appl Date	Title
5687178	11-Nov-97	08/621370	25-Mar-96	METHOD AND APPARATUS FOR TESTING A STATIC RAM
RE36773	11-Jul-00	08/970272	14-Nov-97	METHOD FOR PLATING USING NESTED PLATING BUSES AND SEMICONDUCTOR DEVICE HAVING THE SAME
6786222	07-Sep-04	10/280629	25-Oct-02	METHOD FOR REMOVING PARTICLES FROM A SEMICONDUCTOR PROCESSING TOOL
5391517	21-Feb-95	08/120097	13-Sep-93	PROCESS FOR FORMING COPPER INTERCONNECT STRUCTURE
5561738	01-Oct-96	08/217786	25-Mar-94	[A] DATA PROCESSOR FOR EXECUTING A FUZZY LOGIC OPERATION AND METHOD THEREFOR
5631592	20-May-97	08/611612	08-Mar-96	PULSE GENERATION/SENSING ARRANGEMENT FOR USE IN A MICROPROCESSOR SYSTEM
5638528	10-Jun-97	08/143731	01-Nov-93	A DATA PROCESSING SYSTEM AND A METHOD FOR CYCLING LONGWORD ADDRESSES DURING A BURST BUS CYCLE
5524215	04-Jun-96	08/133413	05-Oct-93	BUS PROTOCAL AND METHOD FOR CONTROLLING A DATA PROCESSOR
5583370	10-Dec-96	08/514442	11-Aug-95	TAB SEMICONDUCTOR DEVICE HAVING DIE EDGE PROTECTION and method for making the same
5580815	03-Dec-96	08/200029	22-Feb-94	PROCESS FOR FORMING FIELD ISOLATION AND A STRUCTURE OVER A SEMICONDUCTOR SUBSTRATE
5579492	26-Nov-96	08/143667	01-Nov-93	DATA PROCESSING SYSTEM AND A METHOD FOR DYNAMICALLY IGNORING BUS TRANSFER TERMINATION CONTROL SIGNALS FOR A PREDETERMINED AMOUNT OF TIME
5467455	14-Nov-95	08/145117	03-Nov-93	DATA PROCESSING SYSTEM AND METHOD FOR PERFORMING DYNAMIC BUS TERMINATION
5627890	06-May-97	08/419300	10-Apr-95	TELEPHONE LINE INTERFACE CIRCUIT
6654871	25-Nov-03	09/436891	09-Nov-99	A DEVICE AND METHOD FOR PERFORMING STACK OPERATIONS IN A PROCESSING SYSTEM
5608795	04-Mar-97	08/419888	11-Apr-95	TELEPHONE LINE INTERFACE CIRCUIT
5500943	19-Mar-96	08/442913	17-May-95	DATA PROCESSOR WITH RENAME BUFFER AND FIFO BUFFER FOR IN - ORDER INSTRUCTION COMPLETION
5708839	13-Jan-98	08/560940	20-Nov-95	METHOD AND APPARATUS FOR PROVIDING BUS PROTOCOL SIMULATION
5631492	20-May-97	08/632690	15-Apr-96	[A] STANDARD CELL HAVING A GROUND CAPACITOR AND A POWER SUPPLY CAPACITOR FOR REDUCING NOISE AND METHOD OF FORMATION
5339266	16-Aug-94	08/158324	29-Nov-93	PARALLEL METHOD AND APPARATUS FOR DETECTING AND COMPLETING FLOATING POINT OPERATIONS INVOLVING SPECIAL OPERANDS
5376819	27-Dec-94	08/158323	29-Nov-93	INTEGRATED CIRCUIT HAVING AN ON CHIP THERMAL CIRCUIT REQUIRING ONLY ONE DEDICATED INTEGRATED CIRCUIT PIN AND METHOD OF OPERATION
5581775	03-Dec-96	08/317069	03-Oct-94	A HISTORY BUFFER SYSTEM
5530804	25-Jun-96	08/242767	16-May-94	SUPERSCALAR PROCESSOR WITH PLURAL PIPELINED EXECUTION UNITS EACH UNIT SELECTIVELY HAVING BOTH NORMAL AND DEBUG MODES
5666509	09-Sep-97	08/216998	24-Mar-94	A DATA PROCESSING SYSTEM FOR PERFORMING EITHER A PRECISE MEMORY ACCESS OR AN IMPRECISE MEMORY ACCESS BASED UPON A LOGICAL ADDRESS VALUE AND METHOD THEREOF
5485602	16-Jan-96	08/172985	27-Dec-93	INTEGRATED CIRCUIT HAVING A CONTROL SIGNAL FOR IDENTIFYING COINCIDING ACTIVE EDGES OF TWO CLOCK SIGNALS
5617531	01-Apr-97	08/500271	10-Jul-95	DATA PROCESSOR HAVING A BUILT- IN INTERNAL SELF TEST CONTROLLER FOR TESTING A PLURALITY OF MEMORIES INTERNAL TO THE DATA PROCESSOR
5592493	07-Jan-97	08/304968	13-Sep-94	SERIAL SCAN CHAIN ARCHITECTURE FOR A DATA PROCESSING SYSTEM AND METHOD OF OPERATION
5446455	29-Aug-95	08/160645	02-Dec-93	AUTO-CALIBRATED CURRENT-MODE DIGITAL-TO-ANALOG CONVERTER AND METHOD THEREFOR
5383354	24-Jan-95	08/172974	27-Dec-93	PROCESS FOR MEASURING SURFACE TOPOGRAPHY USING ATOMIC FORCE MICROSCOPY
5488688	30-Jan-96	08/220329	30-Mar-94	DATA PROCESSOR WITH REAL-TIME DIAGNOSTIC CAPABILITY
5809532	15-Sep-98	08/850368	02-May-97	DATA PROCESSOR WITH CACHE AND METHOD OF OPERATION
6027997	22-Feb-00	08/205423	04-Mar-94	METHOD FOR CHEMICAL MECHANICAL POLISHING A SEMICONDUCTOR DEVICE USING SLURRY
6574228	03-Jun-03	09/241195	01-Feb-99	COMMUNICATION SYSTEM WITH PHYSICAL INTERFACE AND


Patent No.	Grant Date	Appl No.	Appl Date	Title
				COMMUNICATION CONTROLLER, AND METHOD
5381116	10-Jan-95	08/165682	13-Dec-93	METHOD AND APPARATUS FOR PERFORMING FREQUENCY TRACKING IN AN ALL DIGITAL PHASE LOCK LOOP
5765216	09-Jun-98	08/665927	17-Jun-96	DATA PROCESSOR WITH AN EFFICIENT BIT MOVE CAPABILITY AND METHOD THEREFOR
5619687	08-Apr-97	08/200040	22-Feb-94	QUEUE SYSTEM HAVING A TIME-OUT FEATURE AND METHOD THEREFOR
6490283	03-Dec-02	09/348101	06-Jul-99	COMMUNICATION SYSTEM WITH COMMUNICATION CONTROLLER AND MULTIPLE PHYSICAL INTERFACES, AND METHOD
5492223	20-Feb-96	08/191899	04-Feb-94	INTERLOCKING AND INVERTIBLE SEMICONDUCTOR DEVICE TRAY AND TEST CONTACTOR MATING THERETO
5532509	02-Jul-96	08/357469	16-Dec-94	SEMICONDUCTOR INVERTER LAYOUT HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS IN THE OUTPUT MODE
5872385	16-Feb-99	08/666722	18-Jun-96	CONDUCTIVE INTERCONNECT STRUCTURE AND METHOD OF FORMATION
5441914	15-Aug-95	08/236076	02-May-94	METHOD OF FORMING CONDUCTIVE INTERCONNECT STRUCTURE
6133774	17-Oct-00	09/263355	05-Mar-99	CLOCK GENERATOR AND METHOD THEREFOR
6285073	04-Sep-01	08/453689	30-May-95	CONTACT STRUCTURE AND METHOD OF FORMATION
5574894	12-Nov-96	08/333658	03-Nov-94	INTEGRATED CIRCUIT DATA PROCESSOR WHICH PROVIDES EXTERNAL SENSIBILITY OF INTERNAL SIGNALS DURING RESET
5548794	20-Aug-96	08/349286	05-Dec-94	DATA PROCESSOR AND METHOD FOR PROVIDING SHOW CYCLES ON A FAST MULTIPLEXED BUS
5606715	25-Feb-97	08/639461	29-Apr-96	FLEXIBLE RESET CONFIGURATION OF A DATA PROCESSING SYSTEM AND METHOD THERFOR
5623687	22-Apr-97	08/494664	26-Jun-95	RESET CONFIGURATION IN A DATA PROCESSING SYSTEM AND METHOD THERFOR
5483660	09-Jan-96	08/158584	29-Nov-93	METHOD AND APPARATUS FOR PERFORMING MULTIPLEXED AND NON-MULTIPLEXED BUS CYCLES IN A DATA PROCESSING SYSTEM
5566322	15-Oct-96	08/154774	19-Nov-93	METHOD AND APPARATUS FOR PERFORMING READ ACCESSES FROM A COUNTER WHICH AVOID LARGE ROLLOVER ERROR WHEN MULTIPLE READ ACCESS CYCLES ARE USED
5664168	02-Sep-97	08/600144	12-Feb-96	METHOD AND APPARATUS IN A DATA PROCESSING SYSTEM FOR SELECTIVELY INSERTING BUS CYCLE IDLE TIME
5442628	15-Aug-95	08/151676	15-Nov-93	LOCAL AREA NETWORK DATA PROCESSING SYSTEM CONTAINING A QUAD ELASTIC BUFFER AND LAYER MANAGEMENT (ELM) INTEGRATED CIRCUIT AND METHOD OF SWITCHING
5539733	23-Jul-96	08/445893	22-May-95	METHOD FOR SWITCHING DATA FLOW IN A FIBER DISTRIBUTED DATA INTERFACE (FDDI) SYSTEM
5402389	28-Mar-95	08/207513	08-Mar-94	SYNCHRONOUS MEMORY HAVING PARALLEL OUTPUT DATA PATHS
5513358	30-Apr-96	08/191898	04-Feb-94	METHOD AND APPARATUS FOR POWER-UP STATE INITIALIZATION IN A DATA PROCESSING SYSTEM
5464711	07-Nov-95	08/283325	01-Aug-94	PROCESS FOR FABRICATING AN X-RAY ABSORBING MASK
5539892	23-Jul-96	08/284953	02-Aug-94	ADDRESS TRANSLATION LOOKASIDE BUFFER REPLACEMENT APPARATUS AND METHOD WITH USER OVERIDE
5737566	07-Apr-98	08/169103	20-Dec-93	DATA PROCESSING SYSTEM HAVING A MEMORY WITH BOTH A HIGH SPEED OPERATING MODE AND A LOW POWER OPERATING MODE AND METHOD THEREFOR
5384737	24-Jan-95	08/207509	08-Mar-94	PIPELINED MEMORY HAVING SYNCHRONOUS AND ASYNCHRONOUS OPERATING MODES
5440514	08-Aug-95	08/207510	08-Mar-94	WRITE CONTROL FOR A MEMORY USING A DELAY LOCKED LOOP
6189061	13-Feb-01	09/241161	01-Feb-99	MULTI-MASTER BUS SYSTEM PERFORMING ATOMIC TRANSACTIONS AND METHOD OF OPERATING SAME
5610543	11-Mar-97	08/417155	04-Apr-95	DELAY LOCKED LOOP FOR DETECTING THE PHASE DIFFERENCE OF TWO SIGNALS HAVING DIFFERENT FREQUENCIES
5699422	16-Dec-97	08/389380	16-Feb-95	TELECOMMUNICATIONS DEVICE
6473808	29-Oct-02	09/285519	02-Apr-99	HIGH PERFORMANCE COMMUNICATION CONTROLLER for processing high speed data streams wherein execution of a task can be skipped if it involves fetching information from external memory bank
▇▇▇▇▇▇▇	07-May-96	08/315727	30-Sep-94	ELECTROSTATIC DISCHARGE PROTECTION DEVICE
5534784	09-Jul-96	08/236847	02-May-94	METHOD FOR PROBING A SEMICONDUCTOR WAFER
6771630	03-Aug-04	09/498075	04-Feb-00	MULTI-CHANNEL CONTROLLER
5471422	28-Nov-95	08/225868	11-Apr-94	EEPROM CELL WITH ISOLATION TRANSISTOR AND METHODS FOR MAKING AND OPERATING THE SAME


Patent No.	Grant Date	Appl No.	Appl Date	Title
5646060	08-Jul-97	08/471619	30-May-95	METHOD FOR MAKING AN EEPROM CELL WITH ISOLATION TRANSISTOR
5483558	09-Jan-96	08/287562	08-Aug-94	METHOD AND APPARATUS FOR DETECTING PHASE OR FREQUENCY LOCK
5761690	02-Jun-98	08/910359	13-Aug-97	ADDRESS GENERATION APPARATUS AND METHOD USING A PERIPHERAL ADDRESS GENERATION UNIT AND FAST INTERRUPTS
5727005	10-Mar-98	08/298892	31-Aug-94	INTEGRATED CIRCUIT MICROPROCESSOR WITH PROGRAMMABLE MEMORY INTERFACE ACCESS TYPES
6079001	20-Jun-00	08/868622	04-Jun-97	METHOD FOR SYNCHRONOUSLY ACCESSING MEMORY USING OVERLAPPING ACCESSES AND EARLY SYNCHRONOUS DATA TRANSFER CONTROL
5559981	24-Sep-96	08/194900	14-Feb-94	PSEUDO STATIC MASK OPTION REGISTER AND METHOD THEREFOR
5461007	24-Oct-95	08/253013	02-Jun-94	PROCESS FOR POLISHING AND ANALYZING A LAYER OVER A PATTERNED SEMICONDUCTOR SUBSTRATE
5691253	25-Nov-97	08/462477	05-Jun-95	PROCESS FOR POLISHING AND ANALYZING AN EXPOSED SURFACE OF A PATTERNED SEMICONDUCTOR [SUBSTRATE]
5447887	05-Sep-95	08/222759	01-Apr-94	METHOD FOR CAPPING COPPER IN SEMICONDUCTOR DEVICES
5475255	12-Dec-95	08/268744	30-Jun-94	CIRCUIT DIE HAVING IMPROVED SUBSTRATE NOISE ISOLATION
5758107	26-May-98	08/194895	14-Feb-94	SYSTEM FOR OFFLOADING EXTERNAL BUS BY COUPLING PERIPHERAL DE VICE TO DATA PROCESSOR THROUGH INTERFACE LOGIC THAT EMULATE THE CHARACTERISTICS OF THE EXTERNAL BUS
5502717	26-Mar-96	08/283322	01-Aug-94	METHOD AND APPARATUS FOR ESTIMATING ECHO CANCELLATION TIME
5511182	23-Apr-96	08/298638	31-Aug-94	PROGRAMMABLE PIN CONFIGURATION LOGIC CIRCUIT FOR PROVIDING A CHIP SELECT SIGNAL AND RELATED METHOD
6801322	05-Oct-04	10/021756	13-Dec-01	METHOD AND APPARATUS FOR MEASURING A REQUIRED FEATURE OF A LAYER DURING A POLISHING PROCESS
5436203	25-Jul-95	08/270602	05-Jul-94	SHIELDED LIQUID ENCAPSULATED SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME
5554869	10-Sep-96	08/423068	17-Apr-95	ELECTRICALLY PROGRAMMABLE READ -ONLY MEMORY AND ARRAY
5555513	10-Sep-96	08/282404	28-Jul-94	DATA PROCESSING SYSTEM HAVING A COMPENSATION CIRCUIT FOR COMPENSATING FOR CAPACITIVE COUPLING ON A BUS
6687813	03-Feb-04	09/489738	21-Jan-00	DATA PROCESSING SYSTEM AND METHOD FOR IMPLEMENTING ZERO OVERHEAD LOOPS USING A FIRST OR SECOND PREFIX INSTRUCTION FOR INITIATING CONDITIONAL JUMP OPERATIONS
5530824	25-Jun-96	08/222779	04-Apr-94	ADDRESS TRANSLATION CIRCUIT
5530825	25-Jun-96	08/228469	15-Apr-94	DATA PROCESSOR WITH BRANCH TARGET ADDRESS CACHE AND METHOD OF OPERATION
5649159	15-Jul-97	08/445817	22-May-95	DATA PROCESSOR WITH A MULTI-LEVEL PROTECTION MECHANISM MULTI -LEVEL PROTECTION CIRCUIT, AND METHOD THEREFOR
5651138	22-Jul-97	08/363423	21-Dec-94	DATA PROCESSOR WITH CONTROLLED BURST MEMORY ACCESSES AND METHOD THEREFOR
5617559	01-Apr-97	08/298868	31-Aug-94	MODULAR CHIP SELECT CONTROL CIRCUIT AND METHOD FOR PERFORMING PIPELINED MEMORY ACCESSES
5761489	02-Jun-98	08/422467	17-Apr-95	METHOD AND APPARATUS FOR SCAN TESTING WITH EXTENDED TEST VECTOR STORAGE IN A MULTI-PURPOSE MEMORY SYSTEM
5623664	22-Apr-97	08/279605	25-Jul-94	AN INTERACTIVE MEMORY ORGANIZATION SYSTEM AND METHOD THEREFOR
5613119	18-Mar-97	08/279602	25-Jul-94	DATA PROCESSOR INITIALIZATION PROGRAM AND METHOD THEREFOR
5416744	16-May-95	08/207515	08-Mar-94	MEMORY HAVING BIT LINE LOAD WITH AUTOMATIC BIT LINE PRECHARGE AND EQUALIZATION
6166578	26-Dec-00	09/144223	31-Aug-98	CIRCUIT ARRANGEMENT TO COMPENSATE NON-LINEARITIES IN A RESISTOR, AND METHOD
5468999	21-Nov-95	08/249602	26-May-94	LIQUID ENCAPSULATED BALL GRID ARRAY SEMICONDUCTOR DEVICE WITH FINE PITCH WIRE BONDING
5880041	09-Mar-99	08/249608	27-May-94	METHOD FOR FORMING A DIELECTRIC LAYER USING HIGH PRESSURE
5671332	23-Sep-97	08/363196	22-Dec-94	DATA PROCESSING SYSTEM FOR PER FORMING EFFICIENT FUZZY LOGIC OPERATIONS AND METHOD THEREFOR
5400274	21-Mar-95	08/236845	02-May-94	MEMORY HAVING LOOPED GLOBAL DATA LINES FOR PROPAGATION DELAY MATCHING
5426381	20-Jun-95	08/247819	23-May-94	LATCHING ECL TO CMOS INPUT BUFFER CIRCUIT


Patent No.	Grant Date	Appl No.	Appl Date	Title
5477176	19-Dec-95	08/253076	02-Jun-94	POWER-ON RESET CIRCUIT FOR PREVENTING MULTIPLE WORD LINE SELECTIONS DURING POWER-UP OF AN INTEGRATED CIRCUIT MEMORY
5470787	28-Nov-95	08/236320	02-May-94	SEMICONDUCTOR DEVICE SOLDER BUMP HAVING INTRINSIC POTENTIAL FOR FORMING AN EXTENDED EUTECTIC REGION AND METHOD FOR MAKING AND USING THE SAME
5652844	29-Jul-97	08/494461	26-Jun-95	FLEXIBLE PIN CONFIGURATION FOR USE IN A DATA PROCESSING SYSTEM DURING A RESET OPERATION AND METHOD THEREFOR
5644756	01-Jul-97	08/418348	07-Apr-95	INTEGRATED CIRCUIT DATA PROCESSOR WITH SELECTABLE ROUTING OF DATA ACCESSES
6480874	12-Nov-02	09/436890	09-Nov-99	POWER SAVING METHOD FOR PERFORMING ADDITIONS AND SUBSTRACTIONS AND A DEVICE THEREOF
5675749	07-Oct-97	08/460484	02-Jun-95	METHOD AND APPARATUS FOR CONTROLLING SHOW CYCLES IN A DATA PROCESSING SYSTEM
5826058	20-Oct-98	08/458390	02-Jun-95	METHOD AND APPARATUS FOR PROVIDING AN EXTERNAL INDICATION OF INTERNAL CYCLES IN A DATA PROCESSING SYSTEM
5727172	10-Mar-98	08/431943	01-May-95	METHOD AND APPARATUS FOR PERFORMING ATOMIC ACCESSES IN A DATA PROCESSING SYSTEM
5399507	21-Mar-95	08/265860	27-Jun-94	FABRICATION OF MIXED THIN-FILM AND BULK SEMICONDUCTOR SUBSTRATE FOR INTEGRATED CIRCUIT APPLICATIONS
6017792	25-Jan-00	08/650581	22-May-96	PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE INCLUDING A NONVOLATILE MEMORY CELL
6634385	21-Oct-03	10/027545	21-Dec-01	APPARATUS FOR CONVEYING FLUIDS AND BASE PLATE
5985736	16-Nov-99	08/949825	14-Oct-97	PROCESS FOR FORMING FIELD ISOLATION
6411116	25-Jun-02	08/511425	04-Aug-95	A METHOD FOR TESTING A PRODUCT INTEGRATED CIRCUIT WAFER USING A STIMULUS INTEGRATED CIRCUIT WAFER
6577148	10-Jun-03	08/506292	24-Jul-95	APPARATUS, METHOD, AND WAFER USED FOR TESTING INTEGRATED CIRCUITS FORMED ON A PRODUCT WAFER
5554940	10-Sep-96	08/270880	05-Jul-94	BUMPED SEMICONDUCTOR DEVICE AND METHOD FOR PROBING THE SAME
5536962	16-Jul-96	08/547448	24-Oct-95	SEMICONDUCTOR DEVICE HAVING A BURIED CHANNEL TRANSISTOR
5814893	29-Sep-98	08/799925	13-Feb-97	SEMICONDUCTOR DEVICE HAVING A BOND PAD
5661082	26-Aug-97	08/376208	20-Jan-95	SEMICONDUCTOR DEVICE HAVING A BOND PAD AND A PROCESS FOR FORMING THE DEVICE
5557615	17-Sep-96	08/368284	03-Jan-95	METHOD AND APPARATUS FOR IDENTIFYING EMBEDDED FRAMING BITS
5530383	25-Jun-96	08/349586	05-Dec-94	METHOD AND APPARATUS FOR A FREQUENCY DETECTION CIRCUIT FOR USE IN A PHASE LOCKED LOOP
5589423	31-Dec-96	08/317045	03-Oct-94	PROCESS FOR FABRICATING A NON- SILICIDED REGION IN AN INTEGRATED CIRCUIT
5486824	23-Jan-96	08/318301	05-Oct-94	DATA PROCESSOR WITH A HARDWARE KEYSCAN CIRCUIT, HARDWARE KEYS CAN CIRCUIT, AND METHOD THEREFOR
5617348	01-Apr-97	08/506305	24-Jul-95	LOW POWER DATA TRANSLATION CIRCUIT AND METHOD OF OPERATION
5629643	13-May-97	08/632181	15-Apr-96	FEEDBACK LATCH AND METHOD THEREFOR
5504751	02-Apr-96	08/334975	07-Nov-94	METHOD AND APPARATUS FOR EXTRACTING DIGITAL INFORMATION FROM AN ASYNCHRONOUS DATA STREAM
5418786	23-May-95	08/261513	17-Jun-94	ASYNCHRONOUS TRANSFER MODE (ATM) METHOD AND APPARATUS FOR COMMUNICATING STATUS BYTES IN A MANNER COMPATIBLE WITH THE UTO PIA PROTOCOL
5463353	31-Oct-95	08/300238	06-Sep-94	RESISTORLESS VCO INCLUDING CURRENT SOURCE AND SINK CONTROLLING A CURRENT CONTROLLED OSCILLATOR
5571734	05-Nov-96	08/316175	03-Oct-94	METHOD FOR FORMING a fluorinated nitrogen containing dielectric [DIELECTRIC HAVING IMPROVED PERFORMANCE]
6178496	23-Jan-01	09/251161	17-Feb-99	SYSTEM FOR CONVERTING INSTRUCTIONS, AND METHOD THEREFOR
5749090	05-May-98	08/293625	22-Aug-94	CACHE TAG RAM HAVING SEPARATE VALID BIT ARRAY WITH MULTIPLE STEP INVALIDATION AND METHOD THEREFOR
5502406	26-Mar-96	08/399004	06-Mar-95	LOW POWER LEVEL SHIFT CIRCUIT AND METHOD THEREFOR
5532899	02-Jul-96	08/210865	21-Mar-94	VOLTAGE PROTECTION STRUCTURE FOR SEMICONDUCTOR DEVICES
5675822	07-Oct-97	08/418346	07-Apr-95	METHOD AND APPARATUS FOR A DIGITAL SIGNAL PROCESSOR HAVING A MULTIPLIERLESS COMPUTATION BLOCK


Patent No.	Grant Date	Appl No.	Appl Date	Title
5553236	03-Sep-96	08/399113	03-Mar-95	METHOD AND APPARATUS FOR TESTING A CLOCK STOPPING/STARTING FUNCTION OF A LOW POWER MODE IN A DATA PROCESSOR
5530659	25-Jun-96	08/297479	29-Aug-94	METHOD AND APPARATUS FOR DECODING INFORMATION WITHIN A PROCESSING DEVICE
5498767	12-Mar-96	08/321643	11-Oct-94	METHOD FOR POSITIONING BOND PADS IN A SEMICONDUCTOR DIE LAYOUT
5719878	17-Feb-98	08/566813	04-Dec-95	SCANNABLE STORAGE CELL AND METHOD OF OPERATION
6821082	23-Nov-04	10/016610	30-Oct-01	WAFER MANAGEMENT SYSTEM AND METHODS FOR MANAGING WAFERS
5598569	28-Jan-97	08/323558	17-Oct-94	DATA PROCESSOR HAVING OPERATING MODES SELECTED BY AT LEAST ONE MASK OPTION BIT AND METHOD THEREFOR
5666288	09-Sep-97	08/426211	21-Apr-95	METHOD AND APPARATUS FOR DESIGNING AN INTEGRATED CIRCUIT
5486792	23-Jan-96	08/399006	06-Mar-95	METHOD AND APPARATUS FOR CALCULATING A DIVIDER IN A DIGITAL PHASE LOCK LOOP
5646946	08-Jul-97	08/550036	30-Oct-95	APPARATUS AND METHOD FOR SELECTIVELY COMPANDING DATA ON A SLOT-BY-SLOT BASIS
5530676	25-Jun-96	08/379807	27-Jan-95	METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MEMORY CIRCUITS
5563779	08-Oct-96	08/349291	05-Dec-94	METHOD AND APPARATUS FOR A REGULATED SUPPLY ON AN INTEGRATED CIRCUIT
5478436	26-Dec-95	08/364142	27-Dec-94	SELECTIVE CLEANING PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE
5619418	08-Apr-97	08/390210	16-Feb-95	LOGIC GATE SIZE OPTIMIZATION PROCESS FOR AN INTEGRATED CIRCUIT WHEREBY CIRCUIT SPEED IS IMPROVED WHILE CIRCUIT AREA IS OPTIMIZED
6433382	13-Aug-02	08/417537	06-Apr-95	SPLIT-GATE VERTICALLY ORIENTATED EEPROM DEVICE AND PROCESS
5546333	13-Aug-96	08/546260	20-Oct-95	A DATA PROCESSOR HAVING A DATA TABLE FOR PERFORMING A DUAL FUNCTION OF ALPHANUMERIC NOTICE AND NUMERICAL CALCULATION
5570310	29-Oct-96	08/349571	05-Dec-94	METHOD AND DATA PROCESSOR FOR FINDING A LOGARITHM OF A NUMBER
6204783	20-Mar-01	09/273742	22-Mar-99	DIGITAL TO ANALOG CONVERTER HAVING A DC OFFSET CANCELLING DEVICE AND A METHOD THEREFOR
5910994	08-Jun-99	08/868318	03-Jun-97	METHOD AND APPARATUS FOR SUPPRESSING ACOUSTIC FEEDBACK IN AN AUDIO SYSTEM
5717772	10-Feb-98	08/511673	07-Aug-95	METHOD AND APPARATUS FOR SUPPRESSING ACOUSTIC FEEDBACK IN AN AUDIO SYSTEM
5559054	24-Sep-96	08/363112	23-Dec-94	METHOD FOR BALL BUMPING A SEMI CONDUCTOR DEVICE
5492863	20-Feb-96	08/324824	19-Oct-94	METHOD FOR FORMING CONDUCTIVE BUMPS ON A SEMICONDUCTOR DEVICE
5985045	16-Nov-99	08/805483	25-Feb-97	PROCESS FOR POLISHING A SEMICONDUCTOR SUBSTRATE
5606275	25-Feb-97	08/523165	05-Sep-95	BUFFER CIRCUIT HAVING VARIABLE OUTPUT IMPEDANCE
5733794	31-Mar-98	08/384177	06-Feb-95	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE WITH ESD PROTECTION
5744841	28-Apr-98	08/802459	18-Feb-97	SEMICONDUCTOR DEVICE WITH ESD PROTECTION
5659698	19-Aug-97	08/332666	01-Nov-94	METHOD AND APPARATUS FOR GENERATING A CIRCULAR BUFFER ADDRESS IN INTEGRATED CIRCUIT THAT PERFORMS MULTIPLE COMMUNICATION TASKS
5761700	02-Jun-98	08/363843	27-Dec-94	ROM MAPPING AND INVERSION APPARATUS AND METHOD
5519340	21-May-96	08/332668	01-Nov-94	LINE DRIVER HAVING MAXIMUM OUTPUT VOLTAGE CAPACITY
5652903	29-Jul-97	08/332971	01-Nov-94	A DSP CO-PROCESSOR FOR USE ON AN INTEGRATED CIRCUIT THAT PERFORMS MULTIPLE COMMUNICATIONS TASKS
5621800	15-Apr-97	08/333152	01-Nov-94	AN INTEGRATED CIRCUIT THAT PERFORMS MULTIPLE COMMUNICATION TASKS
5826100	20-Oct-98	08/743605	04-Nov-96	DIGITAL SIGNAL PROCESSOR FOR EXECUTING MULTIPLE INSTRUCTION WORDS
6567424	20-May-03	08/971257	17-Nov-97	APPARATUS AND METHOD FOR DETERMINING A SYNCHRONIZATION SIGNAL
6589099	08-Jul-03	09/901365	09-Jul-01	METHOD FOR CHEMICAL MECHANICAL POLISHING (CMP) WITH ALTERING THE CONCENTRATION OF OXIDIZING AGENT IN SLURRY
5546047	13-Aug-96	08/395126	27-Feb-95	METHOD AND APPARATUS OF AN OPERATIONAL AMPLIFIER WITH A WIDE DYNAMIC RANGE


Patent No.	Grant Date	Appl No.	Appl Date	Title
5805774	08-Sep-98	08/853660	09-May-97	CIRCUIT AND METHOD FOR DETERMINING MEMBERSHIP IN A SET DURING A FUZZY LOGIC OPERATION
5572066	05-Nov-96	08/368506	03-Jan-95	LEAD-ON-CHIP SEMICONDUCTOR DEVICE AND METHOD FOR ITS FABRICATION
5786263	28-Jul-98	08/416243	04-Apr-95	METHOD FOR FORMING A TRENCH ISOLATION STRUCTURE IN AN INTEGRATED CIRCUIT
6524931	25-Feb-03	09/357753	20-Jul-99	METHOD FOR FORMING A TRENCH ISOLATION STRUCTURE IN AN INTEGRATED CIRCUIT
5552332	03-Sep-96	08/460339	02-Jun-95	PROCESS FOR FABRICATING A MOSFET DEVICE HAVING REDUCED REVERSE SHORT CHANNEL EFFECTS
5527424	18-Jun-96	08/380770	30-Jan-95	PRECONDITIONER FOR A POLISHING PAD AND METHOD FOR USING THE SAME
5954813	21-Sep-99	08/789170	24-Jan-97	DATA PROCESSOR WITH TRANSPARENT OPERATION DURING A BACKGROUND MODE AND METHOD THEREFOR
5534462	09-Jul-96	08/393782	24-Feb-95	METHOD FOR FORMING A PLUG AND SEMICONDUCTOR DEVICE HAVING THE SAME
5812871	22-Sep-98	08/497571	30-Jun-95	DATA PROCESSING SYSTEM AND A METHOD OF OPTIMIZING AN OPERATION OF THE DATA PROCESSING SYSTEM
5717931	10-Feb-98	08/359969	20-Dec-94	METHOD AND APPARATUS FOR COMMUNICATING BETWEEN MASTER AND SLAVE ELECTRONIC DEVICES WHERE THE SLAVE DEVICE MAY BE HAZARDOUS
5606682	25-Feb-97	08/418049	07-Apr-95	DATA PROCESSOR WITH BRANCH TARGET ADDRESS CACHE AND SUBROUTINE RETURN ADDRESS CACHE AND METHOD OF OPERATION
5796985	18-Aug-98	08/639393	29-Apr-96	METHOD AND APPARATUS FOR INCORPORATING A MILLER COMPENSATION FOR MODELING ELECTRICAL CIRCUITS
5889973	30-Mar-99	08/414466	31-Mar-95	METHOD AND APPARATUS FOR SELECTIVELY CONTROLLING INTERRUPT LATENCY IN A DATA PROCESSING SYSTEM
5638520	10-Jun-97	08/414473	31-Mar-95	METHOD AND APPARATUS FOR DISTRIBUTING BUS LOADING IN A DATA PROCESSING SYSTEM
5605865	25-Feb-97	08/416124	03-Apr-95	METHOD FOR FORMING SELF-ALIGNED SILICIDE IN A SEMICONDUCTOR DEVICE USING VAPOR PHASE REACTION
5565813	15-Oct-96	08/440607	15-May-95	APPARATUS FOR A LOW VOLTAGE DIFFERENTIAL AMPLIFIER INCORPORATING SWITCHED CAPACITORS
5719856	17-Feb-98	08/418048	07-Apr-95	TRANSMITTER/RECEIVER INTERFACE APPARATUS AND METHOD FOR A BI -DIRECTIONAL TRANSMISSION PATH
5835536	10-Nov-98	08/383026	02-Feb-95	METHOD AND APPARATUS FOR REDUCING PEAK-TO-AVERAGE REQUIREMENTS IN MULTI-TONE COMMUNICATION CIRCUITS
5636224	03-Jun-97	08/430668	28-Apr-95	METHOD AND APPARATUS FOR INTERLEAVE/DE-INTERLEAVE ADDRESSING IN DATA COMMUNICATION CIRCUITS
5886998	23-Mar-99	08/797439	10-Feb-97	METHOD and apparatus FOR INTERLEAVE/DE-INTER LEAVE ADDRESSING IN DATA COMMUNICATIONS CIRCUITS
5496438	05-Mar-96	08/353472	09-Dec-94	METHOD OF REMOVING PHOTO RESIST
6023141	08-Feb-00	09/311074	13-May-99	METHOD AND APPARATUS FOR ELECTRONICALLY COMMUTATING AN ELECTRIC MOTOR
5726944	10-Mar-98	08/596809	05-Feb-96	VOLTAGE REGULATOR FOR REGULATING AN OUTPUT VOLTAGE FROM A CHARGE PUMP AND METHOD THEREFOR
5721509	24-Feb-98	08/596817	05-Feb-96	CHARGE PUMP HAVING REDUCED THRESHOLD VOLTAGE LOSSES
5614816	25-Mar-97	08/560876	20-Nov-95	LOW VOLTAGE REFERENCE CIRCUIT AND METHOD OF OPERATION
5689714	18-Nov-97	08/520121	28-Aug-95	METHOD AND APPARATUS FOR PROVIDING LOW POWER CONTROL OF PERIPHERAL DEVICES USING THE REGISTER FILE OF A MICROPROCESSOR
5539777	23-Jul-96	08/378431	26-Jan-95	METHOD AND APPARATUS FOR A DMT RECEIVER HAVING A DATA DE-FORM COUPLED DIRECTLY TO A CONSTELLATION DECODER
5606577	25-Feb-97	08/378847	26-Jan-95	METHOD AND APPARATUS FOR A DMT TRANSMITTER HAVING A DATA FORMATTER COUPLED DIRECTLY TO A CONSTELLATION ENCODER
5521906	28-May-96	08/378846	26-Jan-95	METHOD AND APPARATUS FOR UPDATING CARRIER CHANNEL ALLOCATIONS
5619505	08-Apr-97	08/378697	26-Jan-95	METHOD FOR PRODUCING AND RECOVERING A DATA STREAM FOR A DMT TRANSCEIVER
5644519	01-Jul-97	08/418355	07-Apr-95	METHOD AND APPARATUS FOR A MULTIPLY AND ACCUMULATE CIRCUIT HAVING A DYNAMIC SATURATION RANGE
5665633	09-Sep-97	08/417524	06-Apr-95	Process for forming a SEMICONDUCTOR DEVICE HAVING FIELD ISOLATION [AND A PROCESS FOR FORMING THE DEVICE]
5949125	07-Sep-99	08/831709	10-Apr-97	SEMICONDUCTOR DEVICE HAVING FIELD ISOLATION WITH A


Patent No.	Grant Date	Appl No.	Appl Date	Title
				MESA or mesas
6285066	04-Sep-01	09/350842	09-Jul-99	SEMICONDUCTOR DEVICE HAVING FIELD ISOLATION
5790416	04-Aug-98	08/529772	18-Sep-95	UPDATING HIERARCHICAL DAG REPRESENTATIONS THROUGH A BOTTOM UP METHOD
5901065	04-May-99	08/597768	07-Feb-96	APPARATUS AND METHOD FOR AUTOMATICALLY PLACING TIES AND CONNECTION ELEMENTS WITHIN AN INTEGRATED CIRCUIT
5572467	05-Nov-96	08/426995	24-Apr-95	ADDRESS COMPARISON IN AN INTEGRATED CIRCUIT MEMORY having shared read global data lines
5918147	29-Jun-99	08/413021	29-Mar-95	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE WITH AN ANTIREFLECTIVE LAYER
6570947	27-May-03	09/404933	24-Sep-99	A PHASE LOCK LOOP HAVING A ROBUST BANDWIDTH AND A CALIBRATION METHOD THEREOF
5506450	09-Apr-96	08/435107	04-May-95	SEMICONDUCTOR DEVICE WITH IMPROVED ELECTOMIGRATION RESISTANCE AND METHOD FOR MAKING THE SAME
5546355	13-Aug-96	08/393790	24-Feb-95	INTEGRATED CIRCUIT MEMORY HAVING A SELF-TIMED WRITE PULSE INDEPENDENT OF CLOCK FREQUENCY AND DUTY CYCLE
5751978	12-May-98	08/557401	13-Nov-95	MULTI-PURPOSE PERIPHERAL BUS DRIVER APPARATUS AND METHOD
5606319	25-Feb-97	08/512251	07-Aug-95	METHOD AND APPARATUS FOR INTERPOLATION AND NOISE SHAPING IN A SIGNAL CONVERTER
5731769	24-Mar-98	08/566639	04-Dec-95	MULTI-RATE DIGITAL FILTER APPARATUS AND METHOD FOR SIGMA-DELTA CONVERSION PROCESSES
5640460	17-Jun-97	08/415915	03-Apr-95	AMPLITUDE ADJUST CIRCUIT AND METHOD THEREOF
5907865	25-May-99	08/924913	08-Sep-97	METHOD AND DATA PROCESSING SYSTEM FOR DYNAMICALLY ACCESSING BOTH BIG-ENDIAN AND LITTLE-ENDIAN STORAGE SCHEMES
5491691	13-Feb-96	08/291225	16-Aug-94	METHOD AND APPARATUS FOR PACING ASYNCHRONOUS TRANSFER MODE (ATM) DATA CELL TRANSMISSION
5765208	09-Jun-98	08/537049	29-Sep-95	METHOD OF SPECULATIVELY EXECUTING STORE INSTRUCTIONS PRIOR TO PERFORMING SNOOP OPERATIONS
5457776	10-Oct-95	07/942895	10-Sep-92	COMPACT MEMORY FOR MIXED TEXT IN GRAPHICS
5635767	03-Jun-97	08/460338	02-Jun-95	SEMICONDUCTOR DEVICE HAVING BUILT-IN HIGH FREQUENCY BYPASS CAPACITOR [AND METHOD FOR ITS FABRICATION]
5633186	27-May-97	08/515077	14-Aug-95	PROCESS FOR FABRICATING A NON-VOLATILE MEMORY CELL IN A SEMICONDUCTOR DEVICE
5642480	24-Jun-97	08/535683	28-Sep-95	METHOD AND APPARATUS FOR ENHANCED SECURITY OF A DATA PROCESSOR
5682340	28-Oct-97	08/497827	03-Jul-95	LOW POWER CONSUMPTION CIRCUIT AND METHOD OF OPERATION FOR IMPLEMENTING SHIFTS AND BIT REVERSALS
5729223	17-Mar-98	08/619051	20-Mar-96	METHOD AND APPARATUS FOR DATA COMPRESSION AND RESTORATION
5550774	27-Aug-96	08/523663	05-Sep-95	MEMORY CACHE WITH LOW POWER CONSUMPTION AND METHOD OF OPERATION
5860129	12-Jan-99	08/534764	27-Sep-95	DATA PROCESSING SYSTEM FOR WRITING AN EXTERNAL DEVICE AND METHOD THEREFOR
5752267	12-May-98	08/534763	27-Sep-95	A DATA PROCESSING SYSTEM FOR ACCESSING AN EXTERNAL DEVICE DURING A BURST MODE OF OPERATION AND METHOD THEREFOR
5748645	05-May-98	08/654981	29-May-96	[SINGLE] CLOCK SCAN DESIGN from sizzle global clock [CIRCUIT] AND METHOD THEREFOR
5683944	04-Nov-97	08/522889	01-Sep-95	METHOD OF FABRICATING A THERMALLY ENHANCED LEAD FRAME
5694308	02-Dec-97	08/498274	03-Jul-95	METHOD AND APPARATUS FOR A REGULATED LOW VOLTAGE CHARGE PUMP
5830802	03-Nov-98	08/521720	31-Aug-95	PROCESS FOR REDUCING HALOGEN CONCENTRATION IN A MATERIAL LAYER DURING SEMICONDUCTOR DEVICE FABRICATION
5545574	13-Aug-96	08/444980	19-May-95	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE HAVING A METAL-SEMICONDUCTOR COMPOUND
5675469	07-Oct-97	08/501530	12-Jul-95	INTEGRATED CIRCUIT WITH ELECTROSTATIC DISCHARGE (ESD) PROTECTION AND ESD PROTECTION CIRCUIT
5724604	03-Mar-98	08/510510	02-Aug-95	DATA PROCESSING SYSTEM FOR ACCESSING AN EXTERNAL DEVICE AND METHOD THEREFOR
5680626	21-Oct-97	08/444347	18-May-95	METHOD AND APPARATUS FOR PROVIDING ONLY THAT NUMBER OF CLOCK PULSES NECESSARY TO COMPLETE A TASK
5890799	06-Apr-99	08/966831	10-Nov-97	METHOD FOR REDUCING POWER CONSUMPTION IN A PORTABLE


Patent No.	Grant Date	Appl No.	Appl Date	Title
				ELECTRONIC DEVICE WITH A LIQUID CRYSTA L DISPLAY SCREEN
5859649	12-Jan-99	08/440960	15-May-95	DATA PROCESSING HAVING DISPLAY CONTROLLER WITH BURSTING DIRECT MEMORY ACCESS
5752077	12-May-98	08/440948	15-May-95	DATA PROCESSING SYSTEM HAVING A MULTI-FUNCTION INPUT/OUTPUT PORT WITH INDIVIDUAL PULL-UP AND PULL-DOWN CONTROL
5828827	27-Oct-98	08/810273	03-Mar-97	DATA PROCESSING SYSTEM FOR PERFORMING A TEST FUNCTION AND METHOD THEREFOR
5485487	16-Jan-96	08/201736	25-Feb-94	RECONFIGURALE COUNTER AND PULSE WIDTH MODULATOR (PWM) USING SAME
5619156	08-Apr-97	08/520450	29-Aug-95	LOW VOLTAGE INHIBIT CIRCUIT AND INTEGRATED CIRCUIT USING SAME
5918247	29-Jun-99	08/958738	27-Oct-97	METHOD FOR CANCELING PARTIAL LINE FETCH FOR CACHE WHEN NEW DATA IS REQUESTED DURING CURRENT FETCH AND INVALIDATING PORTION OF PREVIOUSLY FETCHED DATA
5872992	16-Feb-99	08/519030	24-Aug-95	SYSTEM AND METHOD FOR AVOIDING BUS CONTENTION ON A MULTIPLEXED BUS BY PROVIDING A TIME PERIOD SUBSEQUENT TO A READ OPERATION
5689659	18-Nov-97	08/550043	30-Oct-95	METHOD AND APPARATUS FOR BURSTING OPERAND TRANSFERS DURING DYNAMIC BUS SIZING
5737760	07-Apr-98	08/539979	06-Oct-95	MICROCONTROLLER WITH SECURITY LOGIC CIRCUIT WHICH PREVENTS READING OF INTERNAL MEMORY BY EXTERNAL PROGRAM
5595602	21-Jan-97	08/514634	14-Aug-95	DIFFUSER FOR UNIFORM GAS DISTRIBUTION IN SEMICONDUCTOR PROCESSING AND METHOD FOR USING THE SAME
5428639	27-Jun-95	08/202060	25-Feb-94	TWO’S COMPLEMENT PULSE WIDTH MODULATOR AND METHOD FOR PULSE WIDTH MODULATING A TWO’S COMPLEMENT NUMBER
5683548	04-Nov-97	08/605697	22-Feb-96	INDUCTIVELY COUPLED PLASMA REACTOR AND PROCESS
5702981	30-Dec-97	08/536537	29-Sep-95	METHOD FOR FORMING A VIA IN A SEMICONDUCTOR DEVICE
5535349	09-Jul-96	08/257493	09-Jun-94	A DATA PROCESSING SYSTEM AND METHOD FOR PROVIDING CHIP SELECTS TO PERIPHERAL DEVICES
6137272	24-Oct-00	09/433496	03-Nov-99	Method of operating an AC-DC-CONVERTER [, AND METHOD]
5809530	15-Sep-98	08/558071	13-Nov-95	METHOD AND APPARATUS [FOR EFFICIENTLY PROCESSING MULTIPLE CACHE MISSES] for processing multiple cache misses using reload folding and store merging
5796993	18-Aug-98	08/740456	29-Oct-96	METHOD AND APPARATUS FOR SEMICONDUCTOR DEVICE OPTIMIZATION USING ON-CHIP VERIFICATION
6366865	02-Apr-02	09/433324	03-Nov-99	APPARATUS AND METHOD FOR ESTIMATING THE COIL RESISTANCE [AND] in an ELECTRIC MOTOR
5636228	03-Jun-97	08/586356	16-Jan-96	SCAN REGISTER WITH DECOUPLED SCAN ROUTING
5414701	09-May-95	08/279140	22-Jul-94	METHOD AND DATA STRUCTURE FOR PERFORMING ADDRESS COMPRESSION IN AN ASYNCHRONOUS TRANSFER MODE (ATM) SYSTEM
5665202	09-Sep-97	08/562440	24-Nov-95	MULTI-STEP PLANARIZATION PROCESS using polishing at two different pad pressures
5717858	10-Feb-98	08/324192	17-Oct-94	METHOD AND STRUCTURE FOR PRIORITIZING PERFORMANCE MONITORING CELLS IN AN ASYNCHRONOUS TRANSFER MODE (ATM) SYSTEM
5706228	06-Jan-98	08/603939	20-Feb-96	METHOD FOR OPERATING A MEMORY ARRAY
5756380	26-May-98	08/556782	02-Nov-95	METHOD FOR MAKING A MOISTURE RESISTANT SEMICONDUCTOR DEVICE HAVING AN ORGANIC SUBSTRATE
5754861	19-May-98	08/515730	16-Aug-95	DYNAMIC PROGRAM INPUT/OUTPUT DETERMINATION
5852633	22-Dec-98	08/660380	07-Jun-96	METHOD FOR ALLOCATING DATA IN A DATA COMMUNICATION SYSTEM
5737254	07-Apr-98	08/549503	27-Oct-95	SYMMETRICAL FILTERING APPARATUS AND METHOD THEREFOR
5956494	21-Sep-99	08/619787	21-Mar-96	METHOD, APPARATUS, AND COMPUTER INSTRUCTION FOR ENABLING GAIN CONTROL IN A DIGITAL SIGNAL PROCESSOR
5597737	28-Jan-97	08/552448	03-Nov-95	METHOD FOR TESTING AND BURNING-IN A SEMICONDUCTOR WAFER
5781765	14-Jul-98	08/552657	03-Nov-95	SYSTEM FOR DATA SYNCHRONIZATION BETWEEN TWO DEVICES USING FOUR TIME DOMAINS
5737516	07-Apr-98	08/520943	30-Aug-95	DATA PROCESSING SYSTEM FOR PERFORMING A DEBUG FUNCTION AND METHOD THEREFOR
5774703	30-Jun-98	08/583259	05-Jan-96	DATA PROCESSING SYSTEM HAVING A REGISTER CONTROLLABLE SPEED


Patent No.	Grant Date	Appl No.	Appl Date	Title
6671059	30-Dec-03	10/243460	13-Sep-02	METHOD AND SYSTEM FOR DETERMINING A THICKNESS OF A LAYER
6472237	29-Oct-02	10/033066	26-Oct-01	METHOD AND SYSTEM FOR DETERMINING A THICKNESS OF A LAYER
5825819	20-Oct-98	08/636359	23-Apr-96	ASYMMETRICAL DIGITAL SUBSCRIBER LINE (ADSL) LINE DRIVER CIRCUIT
5740417	14-Apr-98	08/567591	05-Dec-95	PIPELINED PROCESSOR OPERATING IN DIFFERENT POWER MODE BASED ON BRANCH PREDICTION STATE OF BRANCH HISTORY BIT ENCODED AS TAKEN WEAKLY NOT TAKEN AND STRONGLY NOT TAKEN STATES
5885856	23-Mar-99	08/704481	21-Aug-96	INTEGRATED CIRCUIT HAVING A DUMMY STRUCTURE AND METHOD OF MAKING THE SAME
5722086	24-Feb-98	08/603109	20-Feb-96	METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A COMMUNICATIONS SYSTEM
5687104	11-Nov-97	08/560064	17-Nov-95	METHOD AND APPARATUS FOR GENERATING DECOUPLED FILTER PARAMETERS AND IMPLEMENTING A BAND DECOUPLED FILTER
5805862	08-Sep-98	08/558518	16-Nov-95	METHOD OF FORMING AN INTEGRATED CIRCUIT
5684928	04-Nov-97	08/570454	11-Dec-95	CIRCUIT AND METHOD FOR EVALUATING FUZZY LOGIC RULES
5485456	16-Jan-96	08/326972	21-Oct-94	AN ASYNCHRONOUS TRANSFER MODE (ATM) SYSTEM HAVING AN ATM DEVICE COUPLED TO MULTIPLE PHYSICAL LAYER DEVICES
5964893	12-Oct-99	08/520945	30-Aug-95	DATA PROCESSING SYSTEM FOR PERFORMING A TRACE FUNCTION AND METHOD THEREFOR
6035422	07-Mar-00	08/857006	15-May-97	DATA PROCESSING SYSTEM FOR CONTROLLING EXECUTION OF A DEBUG FUNCTION AND METHOD THEREFOR
6026501	15-Feb-00	08/944655	06-Oct-97	DATA PROCESSING SYSTEM FOR CONTROLLING EXECUTION OF A DEBUG FUNCTION AND METHOD THEREFOR
5704034	30-Dec-97	08/520949	30-Aug-95	METHOD AND CIRCUIT FOR INITIALIZING A DATA PROCESSING SYSTEM
5892826	06-Apr-99	08/593987	30-Jan-96	DATA PROCESSOR WITH FLEXIBLE DATA ENCRYPTION
5885870	23-Mar-99	08/886927	02-Jul-97	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A NITRIDED OXIDE DIELECTRIC LAYER
6663340	16-Dec-03	10/232158	30-Aug-02	WAFER CARRIER TRANSPORT SYSTEM FOR TOOL BAYS
6181170	30-Jan-01	09/350164	09-Jul-99	DRIVER HAVING SUBSTANTIALLY CONSTANT AND LINEAR OUTPUT RESISTANCE, and method therefor
5824579	20-Oct-98	08/632207	15-Apr-96	METHOD OF FORMING SHARED CONTACT STRUCTURE
6121784	19-Sep-00	09/111001	06-Jul-98	PROBE TIP[, A PROBE CARD,] AND A PROCESS FOR TESTING A SEMICONDUCTOR DEVICE
5867032	02-Feb-99	08/565141	30-Nov-95	PROCESS FOR TESTING A SEMICONDUCTOR DEVICE
6433571	13-Aug-02	09/488145	20-Jan-00	PROCESS FOR TESTING A SEMICONDUCTOR DEVICE
5656943	12-Aug-97	08/550477	30-Oct-95	APPARATUS FOR FORMING A TEST STACK FOR SEMICONDUCTOR WAFER PROBING AND METHOD FOR USING THE SAME
5773987	30-Jun-98	08/606630	26-Feb-96	METHOD FOR PROBING A SEMICONDUCTOR WAFER USING A MOTOR CONTROLLED SCRUB PROCESS
5729166	17-Mar-98	08/660779	10-Jun-96	DIGITALLY IMPLEMENTED FREQUENCY MULTIPLICATION CIRCUIT HAVING ADJUSTABLE MULTIPLICATION RATIO AND METHOD OF OPERATION
6130548	10-Oct-00	09/350642	09-Jul-99	SIGNAL CONVERTING RECEIVER HAVING CONSTANT HYSTERESIS, AND METHOD THEREFOR
5691554	25-Nov-97	08/573094	15-Dec-95	PROTECTION CIRCUIT
5710071	20-Jan-98	08/566754	04-Dec-95	PROCESS FOR UNDERFILLING A FLIP-CHIP SEMICONDUCTOR DEVICE AND A DEVICE MADE THEREBY
5731709	24-Mar-98	08/592256	26-Jan-96	METHOD FOR TESTING A BALL GRID ARRAY SEMICONDUCTOR DEVICE AND A DEVICE FOR SUCH TESTING
6429030	06-Aug-02	09/246633	08-Feb-99	METHOD [AND APPARATUS] FOR TESTING A SEMICONDUCTOR DIE using wells
5656549	12-Aug-97	08/699288	19-Aug-96	METHOD OF PACKAGING A SEMICONDUCTOR DEVICE
6709312	23-Mar-04	10/180740	26-Jun-02	METHOD AND APPARATUS FOR MONITORING A POLISHING CONDITION OF A SURFACE OF A WAFER IN A POLISHING PROCESS
6711661	23-Mar-04	09/606995	29-Jun-00	METHOD AND APPARATUS FOR PERFORMING HIERARCHICAL ADDRESS TRANSLATION
5737584	07-Apr-98	08/589699	22-Jan-96	DATA PROCESSING SYSTEM HAVING PROGRAMMABLE EXTERNAL TERMINALS SUCH THAT THE EXTERNAL TERMINALS ARE SELECTIVELY SUBJECTED TO BUS ARBITRATION
6313774	06-Nov-01	09/574022	19-May-00	DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER, AND METHOD


Patent No.	Grant Date	Appl No.	Appl Date	Title
5774358	30-Jun-98	08/625153	01-Apr-96	METHOD AND APPARATUS FOR GENERATING INSTRUCTION/DATA STREAMS EMPLOYED TO VERIFY HARDWARE IMPLEMENTATIONS OF INTEGRATED CIRCUIT DESIGNS
5649125	15-Jul-97	08/550311	30-Oct-95	METHOD AND APPARATUS FOR [PROVIDING VALID ADDRESSES] address extension ACROSS A MULTIPLEXED COMMUNICATIONS BUS
5951688	14-Sep-99	09/024607	17-Feb-98	A LOW POWER DATA PROCESSING SYSTEM FOR INTERFACING WITH AN EXTERNAL DEVICE AND METHOD THEREFOR
6119240	12-Sep-00	09/321389	27-May-99	A LOW POWER DATA PROCESSING SYSTEM FOR INTERFACING WITH AN EXTERNAL DEVICE AND METHOD THEREFOR
5812798	22-Sep-98	08/592271	26-Jan-96	DATA PROCESSING SYSTEM FOR ACCESSING AN EXTERNAL DEVICE AND METHOD THEREFOR
5822764	13-Oct-98	08/610013	04-Mar-96	METHOD AND CIRCUIT FOR EFFICIENTLY REPLACING INVALID LOCKED PORTIONS OF A CACHE WITH VALID DATA
5863838	26-Jan-99	08/684782	22-Jul-96	[SLURRY] Method FOR CHEMICALLY-MECHANICALLY POLISHING A metal LAYER [AND METHOD OF USE]
6629270	30-Sep-03	09/626679	27-Jul-00	A SYSTEM FOR INITIALIZING A DISTRIBUTED COMPUTER SYSTEM AND A METHOD THEREOF
5778432	07-Jul-98	08/674050	01-Jul-96	METHOD AND APPARATUS FOR PERFORMING DIFFERENT CACHE REPLACEMENT ALGORITHMS FOR FLUSH AND NON-FLUSH OPERATIONS IN RESPONSE TO A CACHE FLUSH CONTROL BIT REGISTER
5892682	06-Apr-99	08/669123	17-Jun-96	METHOD AND APPARATUS FOR GENERATING A HIERARCHICAL INTERCONNECTION DESCRIPTION OF AN INTEGRATED CIRCUIT DESIGN AND USING THE DESCRIPTION TO EDIT THE INTEGRATED CIRCUIT DESIGN
6208211	27-Mar-01	09/406014	24-Sep-99	LOW JITTER PHASE LOCKED LOOP HAVING A SIGMA DELTA MODULATOR AND A METHOD THEREOF
5960306	28-Sep-99	08/573171	15-Dec-95	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5773326	30-Jun-98	08/710702	19-Sep-96	METHOD OF MAKING AN SOI INTEGRATED CIRCUIT WITH ESD PROTECTION
5765190	09-Jun-98	08/629927	12-Apr-96	[IMPROVED] CACHE MEMORY IN A DATA PROCESSING SYSTEM
6192449	20-Feb-01	08/629930	12-Apr-96	APPARATUS AND METHOD FOR OPTIMIZING PERFORMANCE OF A CACHE MEMORY IN A DATA PROCESSING SYSTEM
6181168	30-Jan-01	09/405191	24-Sep-99	HIGH SPEED PHASE DETECTOR AND A METHOD FOR DETECTING PHASE DIFFERENCE
5646550	08-Jul-97	08/605422	22-Feb-96	HIGH RELIABILITY OUTPUT BUFFER FOR MULTIPLE VOLTAGE SYSTEM
6484228	19-Nov-02	10/008074	05-Nov-01	METHOD AND APPARATUS FOR COMPRESSION, and DECOMPRESSION for a data processor system [AND EXECUTION OF PROGRAM CODE]
5754879	19-May-98	08/717516	23-Sep-96	INTEGRATED CIRCUIT FOR EXTERNAL BUS INTERFACE HAVING PROGRAMMABLE MODE SELECT BY SELECTIVELY BONDING ONE OF THE BOND PADS TO A RESET TERMINAL VIA A CONDUCTIVE WIRE
6275178	14-Aug-01	09/492372	27-Jan-00	VARIABLE CAPACITANCE VOLTAGE SHIFTER AND AMPLIFIER AND A METHOD FOR AMPLIFYING AND SHIFTING VOLTAGE
6166552	26-Dec-00	08/662739	10-Jun-96	METHOD AND APPARATUS FOR TESTING A SEMICONDUCTOR WAFER
5717700	10-Feb-98	08/566812	04-Dec-95	[METHOD OF CONSTRUCTION OF A SCANNABLE INTEGRATED CIRCUIT] Method for creating a high speed scan-interconnected set of flip-flop elements in an integrated circuit to enable faster scan-based testing
6292034	18-Sep-01	09/512172	24-Feb-00	LOW NOISE TRANSCONDUCTANCE DEVICE
5691242	25-Nov-97	08/606981	26-Feb-96	METHOD FOR MAKING AN ELECTRONIC COMPONENT HAVING AN ORGANIC SUBSTRATE
6108181	22-Aug-00	08/636007	23-Apr-96	ELECTROSTATIC DISCHARGE (ESD) CIRCUIT
6671336	30-Dec-03	09/572558	16-May-00	GAIN CONTROLLER FOR CIRCUIT HAVING IN-PHASE AND QUADRATURE CHANNELS, AND METHOD
6379744	30-Apr-02	08/590042	05-Feb-96	METHOD FOR COATING AN INTEGRATED CIRCUIT SUBSTRATE
5668021	16-Sep-97	08/658972	04-Jun-96	PROCESS FOR FABRICATING A SEMI CONDUCTOR DEVICE HAVING A SEGMENTED CHANNEL REGION
6146948	14-Nov-00	08/868331	03-Jun-97	METHOD FOR MANUFACTURING A THIN OXIDE FOR USE IN SEMICONDUCTOR INTEGRATED CIRCUITS
5761491	02-Jun-98	08/632187	15-Apr-96	DATA PROCESSING SYSTEM AND METHOD FOR STORING AND RESTORING A STACK POINTER
6647462	11-Nov-03	09/607564	29-Jun-00	AN APPARATUS AND A METHOD FOR PROVIDING DECODED INFORMATION


Patent No.	Grant Date	Appl No.	Appl Date	Title
5729151	17-Mar-98	08/610783	11-Mar-96	SYSTEM AND METHOD FOR TESTING A PHASE LOCKED LOOP IN AN INTEGRATED CIRCUIT
5867405	02-Feb-99	08/609696	01-Mar-96	FERROELECTRIC SIMULATOR, FERROELECTRIC METHOD OF MANUFACTURE, AND METHOD OF SIMULATION
5657324	12-Aug-97	08/500727	11-Jul-95	BIDIRECTIONAL COMMUNICATION SYSTEM
5812831	22-Sep-98	08/635991	22-Apr-96	METHOD AND APPARATUS FOR PULSE WIDTH MODULATION
5872940	16-Feb-99	08/627669	01-Apr-96	PROGRAMMABLE READ/WRITE ACCESS SIGNAL AND METHOD THEREFOR
5911151	08-Jun-99	08/630152	10-Apr-96	OPTIMIZING BLOCK-SIZED OPERAND MOVEMENT UTILIZING STANDARD INSTRUCTIONS
5890196	30-Mar-99	08/623499	28-Mar-96	METHOD AND APPARATUS FOR PERFORMING PAGE MODE ACCESSES
6285214	04-Sep-01	09/494447	31-Jan-00	OUTPUT BUFFER STAGE FOR USE WITH A CURRENT CONTROLLED OSCILLATOR
5799172	25-Aug-98	08/711638	10-Sep-96	METHOD OF SIMULATING AN INTEGRATED CIRCUIT
5802541	01-Sep-98	08/608388	28-Feb-96	METHOD AND APPARATUS IN A DATA PROCESSING SYSTEM FOR USING CHIP SELECTS TO PERFORM A MEMORY MANAGEMENT FUNCTION
5814733	29-Sep-98	08/713271	12-Sep-96	METHOD OF CHARACTERIZING DYNAMICS OF A WORKPIECE HANDLING SYSTEM
6553487	22-Apr-03	09/479200	07-Jan-00	DEVICE AND METHOD FOR PERFORMING HIGH-SPEED LOW OVERHEAD CONTEXT SWITCH
5617054	01-Apr-97	08/572318	14-Dec-95	SWITCHED CAPACITOR VOLTAGE ERROR COMPENSATING CIRCUIT
5905397	18-May-99	08/654454	28-May-96	[A MOS] SWITCHING CIRCUIT and switched capacitor circuit including the switching circuit
6757336	29-Jun-04	09/564530	04-May-00	A DEVICE AND METHOD FOR PERFORMING A CARRIER RECOVERY
5828264	27-Oct-98	08/569038	07-Dec-95	TWO-STAGE OPERATIONAL AMPLIFIER CIRCUIT with wide output voltage swings
6678765	13-Jan-04	09/498862	07-Feb-00	EMBEDDED MODEM
5638020	10-Jun-97	08/614418	08-Mar-96	SWITCHED CAPACITOR DIFFERENTIAL CIRCUITS
6603766	05-Aug-03	09/495412	31-Jan-00	APPARATUS AND METHOD FOR IMPLEMENTING AN ATM AAL2 COMBINED USE TIMER
6463549	08-Oct-02	09/677695	28-Sep-00	A DEVICE AND METHOD FOR PATCHING CODE RESIDING ON A READ ONLY MEMORY MODULE UTILIZING A RANDOM ACCESS MEMORY FOR STORING A SET OF FIELDS, EACH FIELD INDICATING VALIDITY OF CONTENT OF A GROUP, AND FOR RECEIVING AN ADDRESS OF A MEMORY PORTION OF THE READ ONLY MEMORY
5710944	20-Jan-98	08/599016	09-Feb-96	MEMORY SYSTEM AND DATA COMMUNICATIONS SYSTEM
6153141	28-Nov-00	08/155881	23-Nov-93	SEMICONDUCTOR PACKAGING METHOD [AND APPARATUS]
6665298	16-Dec-03	09/494601	31-Jan-00	A REASSEMBLY UNIT AND A METHOD THEREOF
6594801	15-Jul-03	09/706189	03-Nov-00	METHOD FOR COMPRESSING A DATA STRUCTURE REPRESENTING A LAYOUT OF A VLSI DEVICE
6950476	27-Sep-05	09/789242	20-Feb-01	APPARATUS AND METHOD FOR PERFORMING SISO DECODING
6683926	27-Jan-04	09/740336	18-Dec-00	GAIN CONTROLLER WITH COMPARATOR OFFSET COMPENSATION FOR CIRCUIT HAVING IN-PHASE AND QUADRATURE CHANNELS
6678884	13-Jan-04	09/608385	30-Jun-00	A METHOD FOR DETERMINING THE STATUS OF VARIABLES DURING THE EXECUTION OF OPTIMIZED CODE
6728954	27-Apr-04	09/608804	30-Jun-00	A METHOD FOR ALLOWING EXECUTION MANAGEMENT OF OPTIMIZED CODE
6944755	13-Sep-05	09/910554	20-Jul-01	METHOD AND APPARATUS FOR EXTRACTING A PORTION OF DATA IN A SOURCE REGISTER AND ARRANGING IT ON ONE SIDE OF A DESTINATION REGISTER
6580301	17-Jun-03	09/884376	18-Jun-01	METHOD AND APPARATUS FOR A CLOCK CIRCUIT
6448736	10-Sep-02	09/834866	16-Apr-01	METHOD FOR CONTROLLING SWITCHED RELUCTANCE MOTOR, AND CONTROLLER
6380811	30-Apr-02	09/784279	16-Feb-01	SIGNAL GENERATOR AND METHOD
7086027	01-Aug-06	10/332111	03-Jul-00	METHOD AND APPARATUS FOR CONSTRAINT GRAPH BASED LAYOUT COMPACTION FOR INTEGRATED CIRCUITS
5875143	23-Feb-99	08/976835	25-Nov-97	DYNAMIC MEMORY DEVICE WITH REFRESH CIRCUIT AND REFRESH METHOD
6757701	29-Jun-04	09/923007	03-Aug-01	APPARATUS AND METHOD FOR IMPLEMENTING A LINEARLY APPROXIMATED LOG MAP ALGORITHM
5928293	27-Jul-99	08/827991	29-Apr-97	METHOD FOR GENERATING A CLOCK SIGNAL FOR USE IN A DATA RECEIVER, CLOCK GENERATORS, DATA RECEIVER AND REMOTE


Patent No.	Grant Date	Appl No.	Appl Date	Title
				CONTROLLED ACCESS SYSTEM FOR VEHICLES
6891846	10-May-05	09/884377	18-Jun-01	METHOD AND APPARATUS FOR A TRAFFIC SHAPER
5923222	13-Jul-99	08/825859	02-Apr-97	LOW POWER AMPLIFIER AND AN OSCILLATING CIRCUIT INCORPORATING THE AMPLIFIER
5712589	27-Jan-98	08/453111	30-May-95	APPARATUS AND METHOD FOR PERFORMING ADAPTIVE POWER REGULATION FOR AN INTEGRATED CIRCUIT
5628026	06-May-97	08/349218	05-Dec-94	MULTI-DIMENSIONAL DATA TRANSFER IN A DATA PROCESSING SYSTEM AND METHOD THEREFOR
6848030	25-Jan-05	09/909562	20-Jul-01	METHOD AND APPARATUS FOR FILLING LINES IN A CACHE
5598362	28-Jan-97	08/361406	22-Dec-94	APPARATUS AND METHOD FOR PERFORMING BOTH 24 BIT AND 16 BIT ARITHMETIC
5673396	30-Sep-97	08/357909	16-Dec-94	ADJUSTABLE DEPTH/WIDTH FIFO BUFFER FOR VARIABLE WIDTH DATA TRANSFERS
5889948	30-Mar-99	08/906608	06-Aug-97	APPARATUS AND METHOD FOR INSERTING AN ADDRESS IN A DATA STREAM THROUGH A FIFO BUFFER
7415493	19-Aug-08	10/508619	01-Nov-02	ASYNCHRONOUS SAMPLING RATE CONVERSION
5515232	07-May-96	08/310515	22-Sep-94	STATIC PROTECTION CIRCUIT FOR A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
6035372	07-Mar-00	08/817875	20-Dec-96	[MICROPROCESSOR AND SYSTEM] Dynamic RAM in a microprocessor system
5845098	01-Dec-98	08/669680	24-Jun-96	ADDRESS LINES LOAD REDUCTION
5721871	24-Feb-98	08/598934	09-Feb-96	MEMORY SYSTEM [AND A DATA COMMUNICATIONS SYSTEM] ensuring coherency for memory buffers in a data communication system
5469476	21-Nov-95	08/210850	21-Mar-94	[SPIKE FILTER CIRCUIT AND METHOD THEREFOR] Circuit and method for filtering voltage spikes
5559500	24-Sep-96	08/401751	09-Mar-95	OVERCURRENT SENSE CIRCUIT
5502410	26-Mar-96	08/212750	14-Mar-94	CIRCUIT FOR PROVIDING A VOLTAGE RAMP SIGNAL
5628922	13-May-97	08/502794	14-Jul-95	ELECTRICAL FLAME-OFF WAND
5534947	09-Jul-96	08/243360	16-May-94	ADVANCED COMB FILTER
5574515	12-Nov-96	08/573095	15-Dec-95	VOLTAGE CONTROLLED OSCILLATOR CIRCUIT AND AUTOMATIC FINE TUNING CIRCUIT FOR TV
5581215	03-Dec-96	08/492559	20-Jun-95	VOLTAGE CONTROLLED OSCILLATOR HAVING FREQUENCY AND AMPLITUDE CONTROLLING LOOPS
5228039	13-Jul-93	07/521261	09-May-90	SOURCE-LEVEL IN-CIRCUIT SOFTWARE CODE DEBUGGING INSTRUMENT
5900776	04-May-99	08/889610	08-Jul-97	CURRENT SENSE CIRCUIT
5623234	22-Apr-97	08/610503	04-Mar-96	CLOCK SYSTEM
5907765	25-May-99	08/669013	24-Jun-96	SEMICONDUCTOR SENSOR DEVICE AN D METHOD FOR FORMING A SEMICONDUCTOR SENSOR DEVICE
6161200	12-Dec-00	09/035308	02-Mar-98	METHOD AND APPARATUS FOR ANALYZING SOFTWARE EXECUTED IN EMBEDDED SYSTEMS
6658651	02-Dec-03	09/942508	29-Aug-01	METHOD AND APPARATUS FOR ANALYZING SOFTWARE IN A LANGUAGE-INDEPENDENT MANNER
6311327	30-Oct-01	09/250126	12-Feb-99	METHOD AND APPARATUS FOR ANALYZING SOFTWARE IN A LANGUAGE-INDEPENDENT MANNER
5798937	25-Aug-98	08/535427	28-Sep-95	METHOD AND APPARATUS FOR FORMING REDUNDANT VIAS BETWEEN CONDUCTIVE LAYERS OF AN INTEGRATED CIRCUIT
6505331	07-Jan-03	08/730046	15-Oct-96	A METHOD FOR ROUTING OF NETS IN AN ELECTRONIC DEVICE [USING GRAPH REPRESENTATION]
6005634	21-Dec-99	08/889805	08-Jul-97	METHOD AND APPARATUS FOR CONTROLLING THE DISPLAY OF A VIDEO IMAGE
6106571	22-Aug-00	09/015256	29-Jan-98	RELOCATABLE INSTRUMENTATION TAGS FOR TESTING AND DEBUGGING A COMPUTER PROGRAM
7089170	08-Aug-06	09/916148	25-Jul-01	SYSTEM AND METHOD FOR TESTING AN EMBEDDED MICROPROCESSOR SYSTEM CONTAINING PHYSICAL AND/OR SIMULATED HARDWARE
6381656	30-Apr-02	09/265199	10-Mar-99	METHOD AND APPARATUS FOR MONITORING INPUT/OUTPUT (“I/O”) PERFORMANCE IN I/O PROCESSORS
5668807	16-Sep-97	08/566418	30-Nov-95	SYNCHRONIZATION OF TRANSPARENT TDM SUPERCHANNELS
6948164	20-Sep-05	10/369225	18-Feb-03	METHOD AND SYSTEM FOR MODIFYING EXECUTABLE CODE TO ADD ADDITIONAL FUNCTIONALITY
5671223	23-Sep-97	08/566444	30-Nov-95	MULTICHANNEL HDLC FRAMING/DEFRAMING MACHINE

6973417	06-Dec-05	09/435003	05-Nov-99	METHOD AND SYSTEM FOR SIMULATING EXECUTION OF A TARGET PROGRAM IN A SIMULATED TARGET SYSTEM


Patent No.	Grant Date	Appl No.	Appl Date	Title
5686860	11-Nov-97	08/533034	25-Sep-95	AMPLIFIER AND CONTROLLING APPARATUS OPERATING FROM A UNIPOLAR POWER SUPPLY
7100152	29-Aug-06	09/494765	31-Jan-00	SOFTWARE ANALYSIS SYSTEM HAVING AN APPARATUS FOR SELECTIVELY COLLECTING ANALYSIS DATA FROM A TARGET SYSTEM EXECUTING SOFTWARE INSTRUMENTED WITH TAG STATEMENTS AND METHOD FOR USE THEREOF
5706036	06-Jan-98	08/326894	21-Oct-94	METHOD AND APPARATUS FOR PROVIDING A VIDEO SYNCHRONISING SIGNAL OF A PREDETERMINED POLARITY
5644528	01-Jul-97	08/563885	21-Nov-95	NON-VOLATILE MEMORY HAVING A CELL APPLYING TO MULTI-BIT DATA BY MULTI-LAYERED FLOATING GATE ARCHITECTURE AND PROGRAMMING METHOD FOR THE SAME
5892755	06-Apr-99	08/768013	13-Dec-96	TRANSFER LAYER OF THE ATM TYPE AND METHOD FOR OPERATING A TRANSFER SWITCH
5745411	28-Apr-98	08/570169	07-Dec-95	SEMICONDUCTOR MEMORY DEVICE
5923658	13-Jul-99	08/856835	15-May-97	AN ATM LINE CARD AND METHOD FOR TRANSFERRING CONNECTION MEMORY DATA
5693966	02-Dec-97	08/585992	16-Jan-96	POWER MOS TRANSISTOR
5879630	09-Mar-99	08/799729	13-Feb-97	SEMICONDUCTOR CHEMICAL SENSOR DEVICE AND METHOD OF FORMING A THERMOCOUPLE FOR A SEMICONDUCTOR CHEMICAL SENSOR DEVICE
5874860	23-Feb-99	08/758832	04-Dec-96	[BUILT-IN GAAS FET NEGATIVE BIA S AND CONTROL CIRCUIT] High frequency amplifier and control
5777516	07-Jul-98	08/696080	13-Aug-96	HIGH FREQUENCY AMPLIFIER IN CMOS
5790063	04-Aug-98	08/767052	16-Dec-96	ANALOG-TO-DIGITAL CONVERTER IN CMOS WITH MOS CAPACITOR
5675243	07-Oct-97	08/630151	10-Apr-96	VOLTAGE SOURCE DEVICE FOR LOW-VOLTAGE OPERATION
5812027	22-Sep-98	08/696076	13-Aug-96	SPIKE INSENSITIVE INTERMEDIATE FREQUENCY AMPLIFIER
5907589	25-May-99	08/838592	10-Apr-97	GHZ RANGE FREQUENCY DIVIDER IN CMOS
5757303	26-May-98	08/649063	16-May-96	MULTI-BIT A/D CONVERTER HAVING REDUCED CIRCUITRY
5977892	02-Nov-99	08/648645	16-May-96	OFFSET CANCELLATION CIRCUIT
6023256	08-Feb-00	08/856617	13-May-97	LIQUID CRYSTAL DISPLAY DRIVER SYSTEM AND METHOD THEREFOR
6034735	07-Mar-00	08/827727	08-Apr-97	CLOCK GENERATOR FOR DIGITAL VI DEO SIGNAL PROCESSING APPARATUS
5751938	12-May-98	08/768765	17-Dec-96	PERIPHERAL MODULE AND MICROPROCESSOR SYSTEM
5960171	28-Sep-99	08/761416	06-Dec-96	DYNAMIC SIGNAL LOOP RESOLUTION IN A COMPILED CYCLE BASED CIRCUIT SIMULATOR
5887179	23-Mar-99	08/807129	11-Jun-96	SYSTEM POWER SAVING MEANS AND METHOD
6826691	30-Nov-04	09/308604	15-Nov-99	ARRANGEMENT FOR ENCRYPTION/DECRYPTION OF DATA AND DATA CARRIER INCORPORATING SAME
5786608	28-Jul-98	08/806816	26-Feb-97	A SEMICONDUCTOR CHEMICAL SENSOR WITH SPECIFIC HEATER STRUCTURE
6279083	21-Aug-01	09/275617	24-Mar-99	CIRCUIT AND METHOD OF CONTROLLING CACHE MEMORY
5958029	28-Sep-99	08/954265	20-Oct-97	METHOD AND SYSTEM FOR EFFICIENT MESSAGE VALIDATION
6366157	02-Apr-02	09/602160	22-Jun-00	METHODS AND CIRCUITS FOR DYNAMICALLY ADJUSTING A SUPPLY VOLT AGE AND/OR A FREQUENCY OF A CLOCK SIGNAL IN A DIGITAL CIRCUIT
5801552	01-Sep-98	08/841705	30-Apr-97	VOLTAGE DETECTOR CIRCUIT
5883305	16-Mar-99	08/920658	29-Aug-97	TIRE PRESSURE MONITORING SYSTEM
5920113	06-Jul-99	08/900658	25-Jul-97	LEADFRAME STRUCTURE having moveable sub-frame
6034736	07-Mar-00	08/986483	08-Dec-97	DIGITAL HORIZONTAL FLYBACK CONTROL CIRCUIT
6003753	21-Dec-99	08/891963	14-Jul-97	AIR-BLOW SOLDER BALL LOADING SYSTEM FOR MICRO BALL GRID ARRAYS
6076149	13-Jun-00	09/009346	20-Jan-98	[DATA PROCESSING CIRCUIT] Programmable logic device using a two bit security scheme to prevent unauthorized access
6359458	19-Mar-02	09/103882	24-Jun-98	APPARATUS FOR DETECTING A DIAPHRAGM FAILURE
6316968	13-Nov-01	09/355596	19-Oct-99	SENSE AMPLIFIER CIRCUIT
5980106	09-Nov-99	09/064075	22-Apr-98	TEMPERATURE DETECTION CIRCUIT
5804958	08-Sep-98	08/875000	13-Jun-97	SELF-REFERENCED CONTROL CIRCUIT
5929494	27-Jul-99	08/954386	20-Oct-97	A READ ONLY MEMORY ARRAY AND A METHOD OF MANUFACTURING THE ARRAY
6133100	17-Oct-00	09/304322	03-May-99	METHOD FOR MANUFACTURING A READ ONLY MEMORY ARRAY


Patent No.	Grant Date	Appl No.	Appl Date	Title
6461898	08-Oct-02	09/630467	01-Aug-00	TWO STEP WIRE BOND PROCESS
6165888	26-Dec-00	08/943018	02-Oct-97	TWO STEP WIRE BOND PROCESS
5886926	23-Mar-99	09/010042	20-Jan-98	CIRCUIT AND METHOD OF MEASURING THE NEGATIVE THRESHOLD VOLTAGE OF A NON-VOLITILE MEMORY CELL
5978262	02-Nov-99	09/009290	20-Jan-98	CIRCUIT AND METHOD OF LATCHING A BIT LINE IN A NON-VOLATILE MEMORY
6051997	18-Apr-00	09/076412	12-May-98	CIRCUIT FOR TRACKING RAPID CHANGES IN MID-POINT VOLTAGE OF A DATA SIGNAL
6054901	25-Apr-00	08/942892	02-Oct-97	LOW-NOISE PREAMPLIFIER
6408023	18-Jun-02	09/335081	17-Jun-99	METHOD AND APPARATUS FOR PERFORMING EQUALISATION IN A RADIO RECEIVER
6022754	08-Feb-00	09/120755	22-Jul-98	ELECTRONIC DEVICE AND METHOD FOR FORMING A MEMBRANE FOR AN ELECTRONIC DEVICE
6096575	01-Aug-00	09/384934	26-Aug-99	OPTIMUM CONDITION DETECTING METHOD FOR FLIP-CHIP
6242892	05-Jun-01	09/297485	30-Apr-99	PORTABLE ELECTRONIC DEVICE AND METHOD
6150240	21-Nov-00	09/122921	27-Jul-98	METHOD AND APPARATUS FOR SINGULATING SEMICONDUCTOR DEVICES
6307904	23-Oct-01	09/231009	14-Jan-99	CLOCK RECOVERY CIRCUIT
6019508	01-Feb-00	09/069348	29-Apr-98	INTEGRATED TEMPERATURE SENSOR
5139728	18-Aug-92	07/674015	25-Mar-91	METHOD OF USING MOLDING POT HAVING CONFIGURED BOTTOM
5123826	23-Jun-92	07/479501	13-Feb-90	MOLDING POT HAVING CONFIGURED BOTTOM
6246973	12-Jun-01	09/372860	12-Aug-99	MODELING METHOD OF MOSFET
6101125	08-Aug-00	09/082213	20-May-98	ELECTRICALLY PROGRAMMABLE MEMOR AND METHOD OF PROGRAMMING
6647116	11-Nov-03	09/306521	06-May-99	CURRENT SENSING CIRCUIT AND ADSL INTERFACE CIRCUIT
6477608	05-Nov-02	09/557864	26-Apr-00	INTERFACE CIRCUIT for transferring data on bus between modules of integrated circuit with reduced delay
6393071	21-May-02	09/232004	15-Jan-99	CIRCUIT AND METHOD OF IDENTIFYING A BURST FREQUENCY
6395053	28-May-02	09/322496	28-May-99	METHOD OF FORMING METAL COLLOIDS, METAL COLLOIDS AND METHOD OF FORMING A METAL OXIDE SENSITIVE LAYER FOR A CHEMICAL SENSOR DEVICE
7123677	17-Oct-06	10/236377	05-Sep-02	VARIABLE SAMPLING DATA OUTPUT CIRCUIT
7098877	29-Aug-06	10/211795	02-Aug-02	DRIVER CIRCUIT
5137362	11-Aug-92	07/498776	26-Mar-90	AUTOMATIC PACKAGE INSPECTION METHOD
6686859	03-Feb-04	10/351724	27-Jan-03	DIGITAL-TO-ANALOG CONVERTER
6788234	07-Sep-04	10/359503	05-Feb-03	METHOD OF SELECTING CELLS FOR AN INPUT CODE IN DIGITAL-TO-ANALOG CONVERTER
5994961	30-Nov-99	08/986481	08-Dec-97	TEMPERATURE COMPENSATED DECIBEL LINEAR VARIABLE GAIN AMPLIFIER
5321605	14-Jun-94	07/532310	01-Jun-90	PROCESS FLOW INFORMATION MANAGEMENT SYSTEM
5006486	09-Apr-91	07/471763	29-Jan-90	DIRECT CONTACT TAB METHOD AND PACKAGE
6606025	12-Aug-03	09/319230	01-Oct-99	SYNCHRONOUS DEMODULATOR
5134448	28-Jul-92	07/643636	22-Jan-91	MOSFET WITH SUBSTRATE SOURCE CONTACT
5020910	04-Jun-91	07/488158	05-Mar-90	A MONOLITHIC DIFFRACTION SPECTROMETER
4989069	29-Jan-91	07/471470	29-Jan-90	SEMICONDUCTOR PACKAGE HAVING LEADS THAT BREAK-AWAY FROM SUPPORTS
6982689	03-Jan-06	10/443376	22-May-03	LIGHT-EMITTING ELEMENT DRIVE APPARATUS
4983531	08-Jan-91	07/478390	12-Feb-90	METHOD OF FABRICATING A SINGLE POLYSILICON BIPOLAR TRANSISTOR WHICH IS COMPATIBLE WITH A METHOD OF FABRICATING CMOS TRANSISTORS
6965357	15-Nov-05	10/420634	22-Apr-03	LIGHT EMITTING ELEMENT DRIVING CIRCUIT
4983974	08-Jan-91	07/475497	06-Feb-90	ANALOG-TO-DIGITAL CONVERSION BY VARYING BOTH INPUTS OF A COMPARATOR UTILIZING SUCCESSIVE APPROXIMATION
6281889	28-Aug-01	09/032990	02-Mar-98	MOIRE CANCELLATION CIRCUIT
5310689	10-May-94	07/502885	02-Apr-90	METHOD OF FORMING A SIMOX STRUCTURE
5143858	01-Sep-92	07/502906	02-Apr-90	METHOD OF FABRICATING BURIED INSULATING LAYERS
5129009	07-Jul-92	07/533207	04-Jun-90	METHOD FOR AUTOMATIC SEMICONDUCTOR WAFER INSPECTION
5115475	19-May-92	07/532779	04-Jun-90	AUTOMATIC SEMICONDUCTOR PACKAGE INSPECTION METHOD
5164328	17-Nov-92	07/884314	11-May-92	METHOD OF BUMP BONDING AND SEALING AN ACCELEROMETER CHIP ONTO AN INTERGRATED CIRCUIT CHIP


Patent No.	Grant Date	Appl No.	Appl Date	Title
5028741	02-Jul-91	07/528310	24-May-90	A HIGH FREQUENCY POWER SEMICONDUCTOR DEVICE
5043993	27-Aug-91	07/516651	30-Apr-90	OPTICAL SIGNAL FREQUENCY CONVERTER AND MIXER
5015892	5015892	07/494293	16-Mar-90	AN ASYNCHRONUS DELAY CIRCUIT
6075409	13-Jun-00	09/285116	01-Apr-99	DEMODULATION METHOD AND ARRANGMENT
5084665	28-Jan-92	07/533199	04-Jun-90	VOLTAGE REFERENCE CIRCUIT WITH POWER SUPPLY COMPENSATION
6298464	02-Oct-01	09/203770	02-Dec-98	METHOD AND APPARATUS FOR MAXIMUM LIKELIHOOD SEQUENCE DETECTION
5067218	26-Nov-91	07/526255	21-May-90	VACUUM WAFER TRANSPORT AND PROCESSING SYSTEM AND METHOD USING A PLURALITY OF WAFER TRANSPORT ARMS
5107190	21-Apr-92	07/542456	22-Jun-90	MEANS AND METHOD FOR OPTIMIZING THE SWITCHING PERFORMANCE OF POWER AMPLIFIERS
4996170	26-Feb-91	07/559922	30-Jul-90	MOLDING PROCESS FOR ENCAPSULATING SEMICONDUCTOR DEVICES USING A THIXOTROPIC COMPOUND
5201056	06-Apr-93	07/517865	02-May-90	RISC MICROPROCESSOR ARCHITECTURE WITH MULTI-BIT TAG EXTENDED INSTRUCTIONS FOR SELECTIVELY ATTACHING TAG FROM EITHER INSTRUCTION ON INPUT DATA TO A RITHMETIC OPERATION OUTPUT
6304843	16-Oct-01	09/226914	05-Jan-99	METHOD AND APPARATUS FOR RECONSTRUCTING A LINEAR PREDICTION filter excitation signal
RE36890	03-Oct-00	08/535680	28-Sep-95	GRADIENT CHUCK METHOD FOR WAFER BONDING EMPLOYING A CONVEX PRESSURE
5199035	30-Mar-93	07/591189	01-Oct-90	LOGIC CIRCUIT FOR RELIABILITY AND YIELD ENHANCEMENT
5080933	14-Jan-92	07/577248	04-Sep-90	SELECTIVE DEPOSITION OF POLYCRYSTALLINE SILICON
5493248	20-Feb-96	07/933968	24-Aug-92	INTEGRATED CIRCUIT FOR SENSING AN ENVIRONMENTAL CONDITION AND PRODUCING A HIGH POWER CIRCUIT
5291607	01-Mar-94	07/965549	23-Oct-92	MICROPROCESSOR HAVING ENVIRONMENTAL SENSING CAPABILITY
5172409	15-Dec-92	07/547738	02-Jul-90	PRECISION FET CONTROL LOOP
5103123	07-Apr-92	07/583756	17-Sep-90	PHASE DETECTOR HAVING ALL NPN TRANSISTORS
5072193	10-Dec-91	07/591183	01-Oct-90	WIRE SHIELDING FOR RF CIRCUIT BOARDS AND AMPLIFIERS
5064781	12-Nov-91	07/576543	31-Aug-90	A METHOD OF FABRICATING INTEGRATED SILICON AND NON-SILICON SEMICONDUCTOR DEVICES
5105250	14-Apr-92	07/594576	09-Oct-90	HETEROJUNCTION BIPOLAR TRANSISTOR WITH A THIN SILICON EMITTER
6274515	14-Aug-01	08/037849	29-Mar-93	SPIN-ON DIELECTRIC FOR USE IN MANUFACTURING SEMICONDUCTORS
5232143	03-Aug-93	07/732883	19-Jul-91	MUTLI CHIP DIE BONDER
5973388	26-Oct-99	09/224823	04-Jan-99	LEADFRAME, METHOD OF MANUFACTURING A LEADFRAME AND METHOD OF PACKAGING AN ELECTRONIC COMPONENT UTILIZING THE LEADFRAME
5050114	17-Sep-91	07/583759	17-Sep-90	SIMULATION OF TWO-PHASE LIQUID COOLING FOR THERMAL PREDICTION OF DIRECT LIQUID COOLING SCHEMES
RE35294	09-Jul-96	08/245131	17-May-94	[HIGH-PRESSURE] POLYSILICON ENCAPSULATED LOCALIZED OXIDATION OF SILICON
5175129	29-Dec-92	07/662657	01-Mar-91	METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE HAVING AN IMPROVED POLYSILICON LAYER
5180935	19-Jan-93	07/821290	10-Jan-92	DIGITAL TIMING DISCRIMINATOR
5074152	24-Dec-91	07/633828	24-Dec-90	PIEZORESISTIVE TRANSDUCER WITH LOW DRIFT OUTPUT VOLTAGE
6084566	04-Jul-00	08/998696	29-Dec-97	PATTERN DISPLAY CIRCUIT
5249465	05-Oct-93	07/626133	11-Dec-90	ACCELEROMETER UTILIZING AN ANNULAR MASS
5154946	13-Oct-92	07/649189	04-Feb-91	CMOS STRUCTURE FABRICATION
6841869	11-Jan-05	10/031296	21-Jun-99	ELECTRONIC ASSEMBLY PACKAGE
6091391	18-Jul-00	09/044776	20-Mar-98	CIRCUIT FOR PRODUCING A CONTRAST VOLTAGE SIGNAL FOR A LIQUID CRYSTAL DISPLAY which uses a differential comparator, capacitors, transmission gates and feedback to reduce quiescent current
5187347	16-Feb-93	07/646128	28-Jan-91	SUSCEPTOR ELECTRODE AND METHOD FOR MAKING SAME
5079519	07-Jan-92	07/655489	14-Feb-91	DIGITAL PHASE LOCK LOOP FOR A GATE ARRAY
5121010	09-Jun-92	07/655483	14-Feb-91	PHASE DETECTOR WITH DEADZONE WINDOW
5151879	29-Sep-92	07/634630	27-Dec-90	SENSE AMPLIFIER WITH LATCH


Patent No.	Grant Date	Appl No.	Appl Date	Title
6078277	20-Jun-00	09/109719	02-Jul-98	ARRANGEMENT AND METHOD FOR PRODUCING A PLURALITY OF PULSE WIDTH MODULATED SIGNALS
5309322	03-May-94	07/959573	13-Oct-92	LEADFRAME STRIP FOR SEMICONDUCTOR PACKAGES AND METHOD
5079517	07-Jan-92	07/650150	04-Feb-91	CIRCUIT FOR DC CONTROL OF A COMPRESSOR
6023133	08-Feb-00	09/044772	20-Mar-98	PARABOLIC SIGNAL GENERATOR
5222066	22-Jun-93	07/633862	26-Dec-90	MODULAR SELF-TEST FOR EMBEDDED SRAMS
5070031	03-Dec-91	07/627477	14-Dec-90	COMPLEMENTARY SEMICONDUCTOR REGION FABRICATION
5207866	04-May-93	07/642592	17-Jan-91	ANISOTROPIC SINGLE CRYSTAL SILICON ETCHING SOLUTION AND METHOD
5260596	09-Nov-93	07/681258	08-Apr-91	MONOLITHIC CIRCUIT WITH INTEGRATED BULK STRUCTURE RESONATOR
5116460	26-May-92	07/684130	12-Apr-91	METHOD FOR SELECTIVELY ETCHING A FEATURE
5195655	23-Mar-93	07/705197	24-May-91	INTEGRATED FLUID DISPENSE APPARATUS TO REDUCE CONTAMINATION
5230184	27-Jul-93	07/726420	05-Jul-91	DISTRIBUTED POLISHING HEAD
5608345	04-Mar-97	08/194528	10-Feb-94	PROGRAMMABLE SWITCHED CAPACITOR CIRCUIT
5074139	24-Dec-91	07/664234	04-Mar-91	ROLL FORMING OF SEMICONDUCTOR COMPONENTS LEADFRAMES
5903165	11-May-99	08/253041	02-Jun-94	[CONFIGURABLE LOGIC ARRAY] Programmable logic array with a hierarchical routing resource
5254491	19-Oct-93	07/763773	23-Sep-91	SEMICONDUCTOR DEVICE HAVING IMPROVED FREQUENCY RESPONSE
5155563	13-Oct-92	07/670654	18-Mar-91	SEMICONDUCTOR DEVICE HAVING LOW SOURCE INDUCTANCE
5172050	15-Dec-92	07/655705	15-Feb-91	MICROMACHINED SEMICONDUCTOR PROBE CARD
5126596	30-Jun-92	07/670629	18-Mar-91	TRANSMISSION GATE HAVING A PASS TRANSISTOR WITH FEEDBACK
5650356	22-Jul-97	08/613327	11-Mar-96	METHOD FOR REDUCING CORROSION IN OPENINGS ON A SEMICONDUCTOR WAFER
5142450	25-Aug-92	07/684108	12-Apr-91	NON-CONTACT LEAD DESIGN AND PACKAGE
5174942	29-Dec-92	07/706716	29-May-91	METHOD AND APPARATUS FOR PRODUCING FLASHLESS AXIAL LEADED DEVICES
5139571	18-Aug-92	07/690237	24-Apr-91	NON-CONTAMINATING WAFER POLISHING SLURRY
5166741	24-Nov-92	07/692876	29-Apr-91	OPTOELECTRONIC SPEED/DIRECTION DETECTOR
5084407	28-Jan-92	07/709928	03-Jun-91	METHOD FOR PLANARIZING ISOLATED REGIONS
5105175	14-Apr-92	07/667936	12-Mar-91	RESONANT CIRCUIT ELEMENT HAVING INSIGNIFICANT MICROPHONIC EFFECTS
5130276	14-Jul-92	07/700838	16-May-91	METHOD OF FABRICATING SURFACE MICROMACHINED STRUCTURES
5175007	29-Dec-92	07/705860	28-May-91	MOLD ASSEMBLY WITH SEPARATE ENCAPSULATING CAVITIES
6574284	03-Jun-03	09/496325	02-Feb-00	BIT ENCODING SYSTEM AND METHOD
6070263	30-May-00	09/062685	20-Apr-98	CIRCUIT FOR USE IN A VITERBI DECODER
5142239	25-Aug-92	07/702490	20-May-91	HIGH FREQUENCY LINEAR AMPLIFIER ASSEMBLY
5177439	05-Jan-93	07/752799	30-Aug-91	PROBE-CARD FOR TESTING UNENCAPSULATED SEMICONDUCTOR DEVICES
5164659	17-Nov-92	07/751853	29-Aug-91	SWITCHING CIRCUIT
5287002	15-Feb-94	07/889807	29-May-92	A PLANAR MULTI-LAYER METAL BONDING PAD
5149674	22-Sep-92	07/716454	17-Jun-91	METHOD FOR MAKING A PLANAR MULTI-LAYER METAL BONDING PAD
5146389	08-Sep-92	07/733920	22-Jul-91	DIFFERENTIAL CAPACITOR STRUCTURE AND METHOD
5128630	07-Jul-92	07/695482	03-May-91	HIGH SPEED FULLY DIFFERENTIAL OPERATIONAL AMPLIFIER
5113156	12-May-92	07/688729	22-Apr-91	LOW POWER CRYSTAL OSCILLATOR WITH AUTOMATIC GAIN CONTROL
5233510	03-Aug-93	07/766303	27-Sep-91	CONTINUOUSLY SELF CONFIGURING DISTRIBUTED CONTROL SYSTEM
5177438	05-Jan-93	07/739576	02-Aug-91	LOW RESISTANCE PROBE FOR SEMICONDUCTORS
5112772	12-May-92	07/766316	27-Sep-91	METHOD OF FABRICATING A TRENCH STRUCTURE
5126691	30-Jun-92	07/715960	17-Jun-91	VARIABLE CLOCK DELAY CIRCUIT
5155386	13-Oct-92	07/709472	03-Jun-91	PROGRAMMABLE HYSTERESIS COMPARATOR
5184028	02-Feb-93	07/898998	15-Jun-92	CURRENT COMPENSATING CHARGE PUMP CIRCUIT
6356594	12-Mar-02	09/431482	02-Nov-99	DATA CONVERTER


Patent No.	Grant Date	Appl No.	Appl Date	Title
5155390	13-Oct-92	07/735744	25-Jul-91	PROGRAMMABLE BLOCK ARCHITECTED HETEROGENEOUS INTEGRATED CIRCUIT
6782038	24-Aug-04	09/364289	30-Jul-99	METHOD AND APPARATUS FOR RADIO COMMUNICATION.
5546040	13-Aug-96	08/007230	22-Jan-93	POWER EFFICIENT TRANSISTOR AND METHOD THEREFOR
5202626	13-Apr-93	07/782955	25-Oct-91	ON CHIP SELF TEST CIRCUIT
5323051	21-Jun-94	07/807338	16-Dec-91	SEMICONDUCTOR WAFER LEVEL PACKAGE
5198963	30-Mar-93	07/795440	21-Nov-91	MULTIPLE INTEGRATED CIRCUIT MODULE WHICH SIMPLIFIES HANDLING AND TESTING
5175117	29-Dec-92	07/812499	23-Dec-91	METHOD FOR MAKING BURIED ISOLATION
5358883	25-Oct-94	08/105490	12-Aug-93	LATERAL BIPOLAR TRANSISTOR
5164885	17-Nov-92	07/795441	21-Nov-91	ELECTRONIC PACKAGE HAVING A NON-OXIDE CERAMIC BONDED TO METAL AND METHOD FOR MAKING
5273850	28-Dec-93	07/787476	04-Nov-91	CHROMELESS PHASE-SHIFT MASK AND METHOD FOR MAKING
5134089	28-Jul-92	07/767586	30-Sep-91	MOS TRANSISTOR ISOLATION METHOD
5130674	14-Jul-92	07/767951	30-Sep-91	VOLTAGE CONTROLLED OSCILLATOR HAVING CONTROLLED BIAS VOLTAGE, AGC AND OUTPUT AMPLIFIER
5389569	14-Feb-95	07/845409	03-Mar-92	VERTICAL AND LATERAL ISOLATION FOR A SEMICONDUCTOR DEVICE
5258985	02-Nov-93	07/790844	12-Nov-91	COMBINATIONAL DATA GENERATOR AND ANALYZER FOR BUILT-IN SELF TEST
5187394	16-Feb-93	07/819731	13-Jan-92	CONFIGURABLE ROW DECODER DRIVER CIRCUIT
5221639	22-Jun-93	07/811272	20-Dec-91	METHOD OF FABRICATING RESISTIVE CONDUCTIVE PATTERNS ON ALUMINUM NITRIDE SUBSTRATES
5336921	09-Aug-94	07/826553	27-Jan-92	VERTICAL TRENCH INDUCTOR
5214389	25-May-93	07/817209	06-Jan-92	MULTI-DIMENSIONAL HIGH-RESOLUTION PROBE FOR SEMICONDUCTOR MEAUREMENTS INCLUDING PIEZOELECTRIC TRANSDUCER ARRANGEMENT FOR CONTROLLING PROBE position
5635893	03-Jun-97	08/552278	02-Nov-95	RESISTOR STRUCTURE AND INTEGRATED CIRCUIT
5466484	14-Nov-95	08/128282	29-Sep-93	RESISTOR STRUCTURE AND METHOD OF SETTING A RESISTANCE VALUE
5235215	10-Aug-93	07/806198	13-Dec-91	MEMORY DEVICE FOR USE IN POWER CONTROL CIRCUITS
5258703	02-Nov-93	07/923638	03-Aug-92	TEMPERATURE COMPENSATED VOLTAGE REGULATOR HAVING BETA COMPENSATION
5258948	02-Nov-93	07/829659	03-Feb-92	MEMORY CELL SENSE TECHNIQUE
5165002	17-Nov-92	07/799575	27-Nov-91	METHOD OF COUPLING AN ELECTRICAL SIGNAL TO AN OPTICAL FIBER
5690877	25-Nov-97	08/405563	16-Mar-95	METHOD OF PROCESSING A SEMICONDUCTOR CHIP PACKAGE
5384269	24-Jan-95	08/221546	31-Mar-94	METHODS FOR MAKING AND USING A SHALLOW SEMICONDUCTOR JUNCTION
5511419	30-Apr-96	08/283342	01-Aug-94	ROTATIONAL VIBRATION GYROSCOPE
5377544	03-Jan-95	07/810043	19-Dec-91	ROTATIONAL VIBRATION GYROSCOPE
5329815	19-Jul-94	07/810064	19-Dec-91	VIBRATION MONOLITHIC GYROSCOPE
5359893	01-Nov-94	07/810062	19-Dec-91	MULTI-AXES GYROSCOPE
5927993	27-Jul-99	07/829660	03-Feb-92	BACKSIDE PROCESSING METHOD
5225365	06-Jul-93	07/860374	30-Mar-92	METHOD OF MAKING A SUBSTANTIALLY PLANAR SEMICONDUCTOR SURFACE
5487305	30-Jan-96	08/274128	12-Jul-94	THREE AXES ACCELEROMETERS
5179429	12-Jan-93	07/860395	30-Mar-92	MAGNETIC FIELD SENSOR WITH SPLIT COLLECTOR CONTACTS FOR HIGH SENSITIVITY
5172078	15-Dec-92	07/832187	06-Feb-92	DIFFERENTIAL OSCILLATOR WITH COMMON MODE CONTROL
5212390	18-May-93	07/878371	04-May-92	LEAD INSPECTION METHOD USING A PLANE OF LIGHT FOR PRODUCING REFLECTED LEAD IMAGES
6259279	10-Jul-01	09/493585	28-Jan-00	HIGH FREQUENCY DETECTION CIRCUIT AND METHOD
5299460	05-Apr-94	07/840472	24-Feb-92	PRESSURE SENSOR
5155065	13-Oct-92	07/852117	16-Mar-92	UNIVERSAL PAD PITCH LAYOUT
6540309	01-Apr-03	09/744410	15-Jul-99	FAULT-TOLERANT ELECTRONIC BRAKING SYSTEM
5164683	17-Nov-92	07/779780	21-Oct-91	RF AMPLIFIER ASSEMBLY
5177376	05-Jan-93	07/819256	10-Jan-92	ZERO TEMPERATURE COEFFICIENT COMPARATOR CIRCUIT WITH HYSTERESIS
5252848	12-Oct-93	07/829190	03-Feb-92	LOW ON RESISTANCE FIELD EFFECT TRANSISTOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
5319242	07-Jun-94	07/853217	18-Mar-92	SEMICONDUCTOR PACKAGE HAVING AN EXPOSED DIE SURFACE
5442228	15-Aug-95	08/214997	21-Mar-94	MONOLITHIC SHIELDED INTEGRATED CIRCUIT
5700721	23-Dec-97	08/658041	04-Jun-96	STRUCTURE AND METHOD FOR METALLIZATION OF SEMICONDUCTOR DEVICES
5554889	10-Sep-96	08/430105	27-Apr-95	STRUCTURE AND METHOD FOR METALLIZATION OF SEMICONDUCTOR DEVICES
5313835	24-May-94	07/810045	19-Dec-91	INTEGRATED MONOLITHIC GYROSCOPES/ACCELEROMETERS WITH LOGIC CIRCUITS
5289415	22-Feb-94	07/870074	17-Apr-92	SENSE AMPLIFIER AND LATCHING CIRCUIT FOR AN SRAM
5223728	29-Jun-93	07/862130	02-Apr-92	OPTICAL SWITCH INTEGRATED CIRCUIT
5243498	07-Sep-93	07/887949	26-May-92	A MULTI-CHIP SEMICONDUCTOR MODULE AND METHOD FOR MAKING AND TESTING
5181156	19-Jan-93	07/883324	14-May-92	MICROMACHINED CAPACITOR STRUCTURE AND METHOD FOR MAKING
5325065	28-Jun-94	07/884978	18-May-92	DETECTION CIRCUIT [UTILIZING A DUMMY INTEGRATOR] to compensate for switch charge insection and amplifier offset voltage
5340993	23-Aug-94	08/054482	30-Apr-93	OPTOCOUPLER PACKAGE WITH INTEGRAL VOLTAGE ISOLATION BARRIER
5304860	19-Apr-94	08/135637	12-Oct-93	A METHOD FOR POWERING DOWN A MICROPROCESSOR EMBEDDED WITHIN A GATE ARRAY
5347181	13-Sep-94	07/875508	29-Apr-92	INTERFACE CONTROL LOGIC FOR EMBEDDING A MICROPROCESSOR IN A GATE ARRAY
5240165	31-Aug-93	07/909287	06-Jul-92	METHOD AND APPARATUS FOR CONTROLLED DEFORMATION BONDING
5309014	03-May-94	07/862106	02-Apr-92	A TRANSISTOR PACKAGE
5528202	18-Jun-96	08/363200	23-Dec-94	DISTRIBUTED CAPACITANCE TRANSMISSION LINE
5387548	07-Feb-95	08/131920	04-Oct-93	METHOD OF FORMING AN ETCHED OHMIC CONTACT
5273940	28-Dec-93	07/898646	15-Jun-92	MULTIPLE CHIP PACKAGE WITH THINNED SEMICONDUCTOR CHIPS
5168180	01-Dec-92	07/871784	20-Apr-92	LOW FREQUENCY FILTER IN A MONOLITHIC INTEGRATED CIRCUIT
5389564	14-Feb-95	07/902245	22-Jun-92	METHOD OF FORMING A GAAS FET etched ohmic contacts
6636402	21-Oct-03	09/610786	06-Jul-00	HIGH VOLTAGE PROTECTION CIRCUIT
5206609	27-Apr-93	07/883437	15-May-92	CURRENT CONTROLLED OSCILLATOR WITH LINEAR OUTPUT FREQUENCY
5394007	28-Feb-95	08/119636	13-Sep-93	ISOLATED WELL AND METHOD OF MAKING
5268312	07-Dec-93	07/964700	22-Oct-92	METHOD OF FORMING ISOLATED WELLS IN THE FABRICATION OF BICMOS DEVICES
6108263	22-Aug-00	09/373305	12-Aug-99	MEMORY SYSTEM, METHOD FOR VERIFYING DATA STORED IN A MEMORY SYSTEM AFTER A WRITE CYCLE AND METHOD FOR WRITING TO A MEMORY SYSTEM
5273930	28-Dec-93	07/940402	03-Sep-92	METHOD OF FORMING A NON-SELECTIVE SILICON-GERMANIUM EPITAXIAL FILM
5828893	27-Oct-98	08/517563	21-Aug-95	SYSTEM AND METHOD OF COMMUNICATING BETWEEN TRUSTED AND UNTRUSTED COMPUTER SYSTEMS
5346857	13-Sep-94	07/952005	28-Sep-92	METHOD FOR FORMING A FLIP-CHIP BOND FROM A GOLD-TIN EUTECTIC
5365120	15-Nov-94	07/947625	21-Sep-92	DATA SLICER WITH HOLD
6216251	10-Apr-01	09/302505	30-Apr-99	ON-CHIP ERROR DETECTION AND CORRECTION SYSTEM FOR AN EMBEDDED NON-VOLATILE MEMORY ARRAY AND METHOD OF OPERATION
5646055	08-Jul-97	08/641393	01-May-96	METHOD FOR MAKING BIPOLAR TRANSISTOR
5273922	28-Dec-93	07/943651	11-Sep-92	HIGH SPEED LOW GATE/DRAIN CAPACITANCE DMOS DEVICE
5283454	01-Feb-94	07/943642	11-Sep-92	A SEMICONDUCTOR DEVICE INCLUDING VERY LOW SHEET RESISTIVITY BURIED LAYER [AND METHOD OF FORMATION]
6434698	13-Aug-02	09/469405	22-Dec-99	[MICROPROCESSOR MODULE] Distributed processor system having status voting mechanism of each processor by all other processors AND METHOD THEREFOR
5508559	16-Apr-96	08/233100	25-Apr-94	[METHOD FOR FORMING A] POWER CIRCUIT PACKAGE
5371043	06-Dec-94	08/255533	25-May-94	METHOD FOR FORMING A POWER CIRCUIT PACKAGE
5273915	28-Dec-93	07/956224	05-Oct-92	METHOD FOR FABRICATING BIPOLAR JUNCTION AND MOS TRANSISTORS ON SOI
5390193	14-Feb-95	07/967313	28-Oct-92	TEST PATTERN GENERATION


Patent No.	Grant Date	Appl No.	Appl Date	Title
5410548	25-Apr-95	07/967311	28-Oct-92	TEST PATTERN FAULT EQUIVALENCE
5276366	04-Jan-94	07/955567	02-Oct-92	DIGITAL VOLTAGE LEVEL TRANSLATOR CIRCUIT
7124162	17-Oct-06	10/282523	29-Oct-02	ADDER TREE STRUCTURE digital signal processor (DSP) SYSTEM AND METHOD
5389576	14-Feb-95	07/997425	28-Dec-92	METHOD OF PROCESSING A POLYCIDE STRUCTURE
5338932	16-Aug-94	08/000168	04-Jan-93	METHOD AND APPARATUS FOR MEASURING THE TOPOLOGY OF A SEMICONDUCTOR DEVICE
5397917	14-Mar-95	08/051954	26-Apr-93	SEMICONDUCTOR PACKAGE CAPABLE OF SPREADING HEAT [AND METHOD OF FORMING]
6931241	16-Aug-05	09/746692	21-Dec-00	DUAL DIGITAL LOW IF COMPLEX RECEIVER
5352926	04-Oct-94	08/000080	04-Jan-93	FLIP CHIP PACKAGE AND METHOD OF MAKING
5272531	21-Dec-93	07/986391	07-Dec-92	AN AUTOMATIC GAIN CONTROL SYSTEM FOR USE IN POSITIVE MODULATION WHICH DETECTS THE PEAK WHITE VOLTAGE LEVEL SLOWLY WHILE SIMULTANEOUSLY ADJUSTING BLACK VOLTAGE LEVEL FLUCTUATIONS QUICKLY
5341684	30-Aug-94	07/986411	07-Dec-92	PRESSURE SENSOR BUILT INTO A CABLE CONNECTOR
5337606	16-Aug-94	07/926616	10-Aug-92	LATERALLY SENSITIVE ACCELEROMETER AND METHOD FOR MAKING
6759914	06-Jul-04	10/258725	11-May-01	OSCILLATOR CIRCUIT
5381105	10-Jan-95	08/017159	12-Feb-93	METHOD OF TESTING A SEMICONDUCTOR DEVICE having a first circuit electrically isolated from a second circuit
5587883	24-Dec-96	08/557667	13-Nov-95	LEAD FRAME ASSEMBLY FOR SURFACE MOUNT INTEGRATED CIRCUIT POWER PACKAGE
5465626	14-Nov-95	08/223062	04-Apr-94	PRESSURE SENSOR WITH STRESS ISOLATION PLATFORM HERMETICALLY SEALED TO PROTECT SENSOR DIE
5268065	07-Dec-93	07/993984	21-Dec-92	METHOD FOR THINNING A SEMICONDUCTOR WAFER
5596172	21-Jan-97	08/560505	17-Nov-95	PLANAR ENCAPSULATION PROCESS
5480835	02-Jan-96	08/350395	05-Dec-94	AN ELECTRICAL INTERCONNECT AND METHOD FOR FORMING THE SAME
5389579	14-Feb-95	08/043117	05-Apr-93	METHOD FOR SINGLE SIDED POLISHING OF A SEMICONDUCTOR WAFER
6678340	13-Jan-04	09/535396	24-Mar-00	APPARATUS FOR RECEIVING AND PROCESSING A RADIO FREQUENCY SIGNAL
5438877	08-Aug-95	08/258889	13-Jun-94	PRESSURE SENSOR PACKAGE FOR REDUCING STRESS-INDUCED MEASUREMENT ERROR
5312764	17-May-94	08/068339	28-May-93	METHOD OF DOPING A SEMICONDUCTOR SUBSTRATE
6603388	05-Aug-03	09/489257	21-Jan-00	SECURITY SYSTEM AND METHOD
5373457	13-Dec-94	08/038365	29-Mar-93	METHOD FOR DERIVING A PIECEWISE LINEAR MODEL
5372612	13-Dec-94	08/082641	28-Jun-93	SEMICONDUCTOR MATERIAL CONTACTING MEMBER
6993693	31-Jan-06	10/363773	10-Sep-01	ANALOGUE/DIGITAL INTERFACE CIRCUIT
5304953	19-Apr-94	08/080012	01-Jun-93	LOCK RECOVERY CIRCUIT FOR A PHASE LOCKED LOOP
5354717	11-Oct-94	08/099682	29-Jul-93	METHOD FOR MAKING A SUBSTRATE STRUCTURE WITH IMPROVED HEAT DISSIPATION
5508230	16-Apr-96	08/416236	04-Apr-95	METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH DIAMOND HEAT DISSIPATION layer
5381085	10-Jan-95	08/089912	06-Jul-93	PHASE LOCK LOOP WITH SELF TEST CIRCUITRY AND METHOD FOR USING THE SAME
6057219	02-May-00	08/270082	01-Jul-94	METHOD OF FORMING AN OHMIC CONTACT TO A III-A SEMICONDUCTOR MATERIAL
5385869	31-Jan-95	08/094735	22-Jul-93	SEMICONDUCTOR CHIP BONDED TO A SUBSTRATE AND METHOD OF MAKING
6882582	19-Apr-05	10/362467	29-Mar-02	EEPROM CIRCUIT VOLTAGE REFERENCE CIRCUIT AND METHOD FOR PROVIDING A LOW TEMPERATURE-COEFFICIENT VOLTAGE REFERENCE
5416356	16-May-95	08/115833	03-Sep-93	INTEGRATED CIRCUIT [AND METHOD OF FORMING] having passive circuit elements
5481131	02-Jan-96	08/287336	29-Sep-94	INTEGRATED CIRCUIT HAVING PASSIVE CIRCUIT ELEMENTS
5446247	29-Aug-95	08/154576	19-Nov-93	AN ELECTRICAL CONTACT AND METHOD FOR MAKING AN ELECTRICAL CONTACT
5814727	29-Sep-98	08/148307	08-Nov-93	SEMICONDUCTOR ACCELEROMETER HAVING REDUCED SENSOR PLATE FLEXURE
5479092	26-Dec-95	08/388116	13-Feb-95	CURVATURE CORRECTION CIRCUIT FOR A VOLTAGE REFERENCE


Patent No.	Grant Date	Appl No.	Appl Date	Title
5551076	27-Aug-96	08/300768	06-Sep-94	CIRCUIT AND METHOD OF SERIES BIASING A SINGLE-ENDED MIXER
5309019	03-May-94	08/023407	26-Feb-93	LOW INDUCTANCE LEAD FRAME FOR A SEMICONDUCTOR PACKAGE
5678040	14-Oct-97	08/759339	02-Dec-96	Method for managing a HIERARCHICAL DESIGN TRANSACTION [METHOD]
5475778	12-Dec-95	08/139181	21-Oct-93	SMART OPTICAL COUPLER AND SMAR OPTICAL COUPLER SYSTEM
5396296	07-Mar-95	08/148455	08/148455	VIDEO FEEDBACK MATCHING CIRCUIT AND METHOD THEREFOR
5936454	10-Aug-99	08/069803	01-Jun-93	LATERAL BIPOLAR TRANSISTOR OPERATING WITH INDEPENDENT BASE AND GATE BIASING
5477084	19-Dec-95	08/367628	03-Jan-95	MICROELECTRONIC DEVICE PACKAGE CONTAINING A LIQUID AND METHOD
5413965	09-May-95	08/119555	13-Sep-93	Method of making MICROELECTRONIC DEVICE PACKAGE CONTAINING A LIQUID [AND METHOD]
5617035	01-Apr-97	08/552518	02-Nov-95	METHOD FOR TESTING INTEGRATED DEVICES
5587605	24-Dec-96	08/473833	07-Jun-95	PACKAGE FOR MATING WITH A SEMICONDUCTOR DIE
5589402	31-Dec-96	08/550416	30-Oct-95	PROCESS FOR MANUFACTURING A PACKAGE FOR MATING WITH A BARE SEMICONDUCTOR DIE
5441901	15-Aug-95	08/257972	10-Jun-94	Method for forming a CARBON DOPED SILICON SEMICONDUCTOR DEVICE HAVING A NARROWED BANDGAP CHARACTERISTIC [AND METHOD]
5360986	01-Nov-94	08/131541	05-Oct-93	CARBON DOPED SILICON SEMICONDUCTOR DEVICE HAVING A NARROWED BANDGAP CHARACTERISTIC AND METHOD
5900763	04-May-99	08/317673	11-Oct-94	CIRCUIT AND METHOD OF REDUCING CROSS-TALK IN AN INTEGRATED CIRCUIT substrate
5434739	18-Jul-95	08/075839	14-Jun-93	REVERSE BATTERY PROTECTION CIRCUIT
5452245	19-Sep-95	08/124651	07-Sep-93	MEMORY EFFICIENT GATE ARRAY CELL
5381055	10-Jan-95	08/098993	29-Jul-93	CMOS DRIVER USING OUTPUT FEEDBACK PRE-DRIVE
5345190	06-Sep-94	08/100830	02-Aug-93	MODULAR LOW VOLTAGE FILTER WITH COMMON MODE FEEDBACK
5436180	25-Jul-95	08/203094	28-Feb-94	METHOD [FOR MAKING A SEMICONDUCTOR STRUCTURE] reducing base resistance in epitaxial-based bipolar transistor
7212587	01-May-07	10/343540	16-Jul-01	APPARATUS FOR REDUCING DC OFFSET IN A RECEIVER
5519848	21-May-96	08/154054	18-Nov-93	A METHOD OF CELL CHARACTERIZATION IN A DISTRIBUTED SIMULATION SYSTEM
5504694	02-Apr-96	08/141368	28-Oct-93	A METHOD OF CELL CHARACTERIZATION ENERGY DISSIPATION
5424245	13-Jun-95	08/177350	04-Jan-94	[CIRCUIT AND] METHOD OF FORMING VIAS THROUGH TWO-SIDED SUBSTRATE
6353296	05-Mar-02	09/418750	15-Oct-99	ELECTRONIC DRIVER CIRCUIT WITH MULTIPLEXER FOR ALTERNATIVELY DRIVING A LOAD FOR A BUSLINE, AND METHOD
5451274	19-Sep-95	08/188989	31-Jan-94	REFLOW OF MULTI-LAYER METAL BUMPS
6906381	14-Jun-05	10/297693	08-Jun-01	LATERAL SEMICONDUCTOR DEVICE WITH LOW ON-RESISTANCE AND METHOD OF MAKING THE SAME
5457605	10-Oct-95	08/155879	23-Nov-93	ELECTRONIC DEVICE HAVING COPLANAR HEATSINK AND ELECTRICAL CONTACTS
6350954	26-Feb-02	09/489726	24-Jan-00	ELECTRONIC DEVICE PACKAGE, AND METHOD
5886362	23-Mar-99	08/161015	03-Dec-93	METHOD OF REFLOWING SOLDER BUMPS AFTER PROBE TEST
5338397	16-Aug-94	08/130482	01-Oct-93	METHOD OF FORMING A SEMICONDUCTOR DEVICE
6750664	15-Jun-04	09/934159	21-Aug-01	APPARATUS [AND METHOD] FOR MANAGING AN INTEGRATED CIRCUIT
6254685	03-Jul-01	08/181936	18-Jan-94	CHEMICAL VAPOR DEPOSITION TRAP WITH TAPERED INLET
5386201	31-Jan-95	08/157545	26-Nov-93	TEMPERATURE STABLE SQUARE WAVE OSCILLATOR
6933766	23-Aug-05	10/362031	16-Jul-01	APPARATUS AND METHOD FOR IMPROVED CHOPPING MIXER
5488320	30-Jan-96	08/223400	04-Apr-94	COMPARATOR HAVING LATCHED OUTPUT WHEN DISABLED FROM THE POWER SUPPLY
5478773	26-Dec-95	08/451866	26-May-95	METHOD OF MAKING AN ELECTRONIC DEVICE HAVING AN INTEGRATED INDUCTOR

5442240	15-Aug-95	08/332155	31-Oct-94	METHOD OF ADHESION TO A POLYMIDE SURFACE BY FORMATION OF COVALENT BONDS
5391397	21-Feb-95	08/223184	05-Apr-94	METHOD OF ADHESION TO A POLYMIDE SURFACE BY FORMATION OF COVALENT BONDS
5565705	15-Oct-96	08/235992	02-May-94	ELECTRONIC MODULE FOR REMOVING HEAT FROM A


Patent No.	Grant Date	Appl No.	Appl Date	Title
				SEMICONDUCTOR DIE
5391285	21-Feb-95	08/202210	25-Feb-94	ADJUSTABLE PLATING CELL FOR UNIFORM BUMP PLATING OF SEMICONDUCTOR WAFERS
5517141	14-May-96	08/400686	18-Mar-95	DIFFERENTIAL HIGH SPEED TRACK AND HOLD AMPLIFIER
6577195	10-Jun-03	10/197145	16-Jul-02	BIPOLAR DIFFERENTIAL AMPLIFIER
5329246	12-Jul-94	08/140950	25-Oct-93	CIRCUIT AND METHOD OF SETTING A BIAS POINT FOR A SINGLE-ENDED AMPLIFIER DURING POWER-UP
5359297	25-Oct-94	08/141361	28-Oct-93	VCO POWER-UP CIRCUIT FOR PLL AND METHOD THEREOF
5371394	06-Dec-94	08/153503	15-Nov-93	DOUBLE IMPLANTED LATERALLY DIFFUSED MOS DEVICE AND METHOD THEREOF
5512518	30-Apr-96	08/254209	06-Jun-94	METHOD OF MANUFACTURE OF MULTI LAYER DIELECTRIC ON A III-V SUBSTRATE
5583747	10-Dec-96	08/436055	05-May-95	THERMOPLASTIC INTERCONNECT FOR ELECTRONIC DEVICE AND METHOD FOR MAKING
6469536	22-Oct-02	09/690666	17-Oct-00	A METHOD AND DEVICE for providing symetrical monitoring of ESD FOR TESTING AN INTEGRATED CIRCUIT
5619064	08-Apr-97	08/587045	16-Jan-96	III-V SEMICONDUCTOR GATE STRUCTURE AND METHOD OF MANUFACTURE
5484740	16-Jan-96	08/254206	06-Jun-94	Method of manufacturing a III-V SEMICONDUCTOR GATE STRUCTURE [AND METHOD OF MANUFACTURE]
5394036	28-Feb-95	08/176971	04-Jan-94	CIRCUIT AND METHOD OF ZERO GENERATION IN A REAL-TIME FILTER
5461260	24-Oct-95	08/283338	01-Aug-94	SEMICONDUCTOR DEVICE INTERCONNECT LAYOUT [METHOD AND] STRUCTURE FOR REDUCING PREMATURE ELECTROMIGRATION FAILURE DUE TO HIGH LOCALIZED CURRENT DENSITY
5482878	09-Jan-96	08/223393	04-Apr-94	Method for fabricating INSULATED GATE FIELD EFFECT TRANSISTOR HAVING SUBTHRESHOLD SWING [AND METHOD FOR FABRICATING]
5409567	25-Apr-95	08/234205	28-Apr-94	METHOD OF ETCHING COPPER LAYERS
5510739	23-Apr-96	08/218283	28-Mar-94	CIRCUIT AND METHOD FOR ENHANCING LOGIC TRANSITIONS APPEARING ON A LINE
5437189	01-Aug-95	08/237527	03-May-94	DUAL ABSOLUTE PRESSURE SENSOR AND METHOD THEREOF
5454270	03-Oct-95	08/254849	06-Jun-94	HERMETICALLY SEALED PRESSURE SENSOR AND METHOD THEREOF
6148673	21-Nov-00	08/319913	07-Oct-94	DIFFERENTIAL PRESSURE SENSOR AND METHOD THEREOF
6254815	03-Jul-01	08/282443	29-Jul-94	MOLDED PACKAGING METHOD FOR A SENSING DIE HAVING A PRESSURE SENSING DIAPHRAGM
5559359	24-Sep-96	08/367664	03-Jan-95	MICROWAVE INTEGRATED CIRCUIT PASSIVE ELEMENT STRUCTURE AND METHOD FOR REDUCING SIGNAL PROPAGATION LOSSES
5639683	17-Jun-97	08/347931	01-Dec-94	STRUCTURE AND METHOD FOR INTERGRATING MICROWAVE COMPONENTS ON A SUBSTRATE
5467253	14-Nov-95	08/269241	30-Jun-94	SEMICONDUCTOR DEVICE AND METHOD OF FORMING
5495437	27-Feb-96	08/270274	05-Jul-94	NON-VOLATILE RAM TRANSFERRING DATA BETWEEN FERRO-ELECTRIC CAPACITORS AND A MEMORY CELL
5677245	14-Oct-97	08/454471	30-May-95	[DUAL CHANNEL] SMALL OUTLINE OPTOCOUPLER PACKAGE [AND] METHOD [THEREOF]
5447874	05-Sep-95	08/282360	29-Jul-94	A METHOD FOR MAKING A SEMICONDUCTOR DEVICE [GATE] comprising a dual metal gate using a chemical mechanical polish
5528692	18-Jun-96	08/237528	03-May-94	FREQUENCY INVERSION SCRAMBLER WITH INTEGRATED HIGH-PASS FILTER having autozero to remove internal DC offset
5568492	22-Oct-96	08/254846	06-Jun-94	CIRCUIT AND METHOD OF JTAG TESTING MULTICHIP MODULES
5545912	13-Aug-96	08/329927	27-Oct-94	ELECTRONIC DEVICE ENCLOSURE INCLUDING A CONDUCTIVE CAP AND SUBSTRATE
5686698	11-Nov-97	08/269254	30-Jun-94	PACKAGE FOR ELECTRICAL COMPONENTS [AND METHOD FOR MAKING] having a molded structure with a port extending into the molded structure
6999014	14-Feb-06	10/494316	23-Oct-02	INCREMENTAL-DELTA ANALOGUE-TO-DIGITAL CONVERSION
5623159	22-Apr-97	08/625685	04-Apr-96	INTEGRATED CIRCUIT ISOLATION STRUCTURE FOR SUPPRESSING HIGH-FREQUENCY CROSS-TALK
5683934	04-Nov-97	08/642820	03-May-96	ENHANCED MOBILITY MOSFET DEVICE AND METHOD
5561302	01-Oct-96	08/311979	26-Sep-94	ENHANCED [PERFORMANCE MOSFET] mobility MOSFET device and


Patent No.	Grant Date	Appl No.	Appl Date	Title
				method
5427964	27-Jun-95	08/223394	04-Apr-94	INSULATED GATE FIELD EFFECT TRANSISTOR AND METHOD FOR FABRICATING
6023189	08-Feb-00	08/650023	17-May-96	CMOS CIRCUIT FOR PROVIDING A BANDGAP REFERENCE VOLTAGE
6873218	29-Mar-05	10/343531	16-Jul-01	FREQUENCY MODULATOR USING A WAVEFORM GENERATOR
5473569	05-Dec-95	08/283431	01-Aug-94	A METHOD FOR OPERATING A FLASH MEMORY
5567648	22-Oct-96	08/552430	03-Nov-95	[INTERCONNECT BUMP APPARATUS AND METHOD FOR FORMING SAME] Process for providing interconnect bumps on a bonding pad by application of a sheet of conductive discs
7286042	23-Oct-07	10/481111	03-Jun-02	PASSIVE COMMUNICATION DEVICE AND PASSIVE ACCESS CONTROL SYSTEM
5541450	30-Jul-96	08/333188	02-Nov-94	LOW-PROFILE BALL-GRID ARRAY SEMICONDUCTOR PACKAGE
5639695	17-Jun-97	08/552710	03-Nov-95	LOW-PROFILE BALL-GRID ARRAY SEMICONDUCTOR PACKAGE AND METHOD
5544412	13-Aug-96	08/247944	24-May-94	METHOD FOR COUPLING A POWER LEAD TO A BOND PAD IN AN ELECTRONIC MODULE
6781474	24-Aug-04	10/351824	27-Jan-03	APPARATUS AND METHOD FOR TUNING A FILTER
5539351	23-Jul-96	08/334176	03-Nov-94	CIRCUIT AND METHOD FOR REDUCING A GATE VOLTAGE OF A TRANSMISSION GATE WITHIN A CHARGE PUMP CIRCUIT
5795493	18-Aug-98	08/432556	01-May-95	LASER ASSISTED PLASMA CHEMICAL ETCHING [APPARATUS AND] METHOD
5605615	5605615	08/349590	05-Dec-94	METHOD AND APPARATUS FOR PLATING METALS
7042377	09-May-06	10/381075	18-Mar-03	ANALOGUE-TO-DIGITAL SIGMA-DELTA MODULATOR WITH FIR FILTERS
5590232	31-Dec-96	08/390209	16-Feb-95	OPTIC PACKAGE AND METHOD OF MAKING
5497123	05-Mar-96	08/363089	23-Dec-94	AMPLIFIER CIRCUIT HAVING HIGH LINEARITY FOR CANCELLING THIRD ORDER HARMONIC DISTORTION
6018998	01-Feb-00	09/114193	13-Jul-98	ACCELERATION SENSING DEVICE AND METHOD OF OPERATION and forming
5806365	15-Sep-98	08/640267	30-Apr-96	ACCELERATION SENSING DEVICE ON A SUPPORT SUBSTRATE AND METHOD OF OPERATION
6113721	05-Sep-00	08/368078	03-Jan-95	METHOD OF BONDING A SEMICONDUCTOR WAFER
5504039	02-Apr-96	08/282351	29-Jul-94	A METHOD FOR MAKING A SELF-ALIGNED OXIDE GATE CAP
5631178	20-May-97	08/381387	31-Jan-95	[METHOD FOR MANUFACTURING A STABLE ARSENIC DOPED SEMICONDUCTOR DEVICE] Method for forming a stable semiconductor device having an arsenic doped ROM portion
5649008	15-Jul-97	08/284950	02-Aug-94	CIRCUIT AND METHOD OF REDUCING SIDETONE IN A RECEIVE SIGNAL PATH
7432778	07-Oct-08	11/465843	21-Aug-06	ARRANGEMENT AND METHOD FOR IMPEDANCE MATCHING
7113054	26-Sep-06	10/468178	28-Jan-02	ARRANGEMENT AND METHOD IMPEDANCE MATCHING
5578167	26-Nov-96	08/594537	31-Jan-96	SUBSTRATE HOLDER AND METHOD OF USE
5602491	11-Feb-97	08/405317	16-Mar-95	INTEGRATED CIRCUIT TESTING BOARD HAVING CONSTRAINED THERMAL EXPANSION CHARACTERISTICS
5545893	13-Aug-96	08/363483	23-Dec-94	OPTOCOUPLER PACKAGE AND METHOD FOR MAKING
6150917	21-Nov-00	08/395228	27-Feb-95	PIEZORESISTIVE SENSOR bridge having overlapping diffused regions to accommodate mask misalignment AND METHOD
6710265	23-Mar-04	10/255257	26-Sep-02	MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
7199306	03-Apr-07	10/741065	19-Dec-03	MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
7397001	08-Jul-08	11/676810	20-Feb-07	MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
6465743	15-Oct-02	08/349281	05-Dec-94	MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
5565690	15-Oct-96	08/382699	02-Feb-95	METHOD FOR DOPING STRAINED HETEROJUNCTION SEMICONDUCTOR DEVICES AND STRUCTURE
7039438	02-May-06	10/433369	18-Sep-01	MULTI-MODE RADIO COMMUNICATIONS DEVICE USING A COMMON REFERENCE OSCILLATOR
7117234	03-Oct-06	10/433750	22-Oct-01	WAVEFORM GENERATOR FOR USE IN IQ MODULATION
5742100	21-Apr-98	08/411355	27-Mar-95	STRUCTURE HAVING FLIP-CHIP CONNECTED substrates
5694344	02-Dec-97	08/491195	15-Jun-95	A METHOD FOR ELECTRICALLY MODELING A SEMICONDUCTOR PACKAGE
5715184	03-Feb-98	08/376253	23-Jan-95	METHOD OF PARALLEL SIMULATION OF STANDARD CELLS ON A


Patent No.	Grant Date	Appl No.	Appl Date	Title
				DISTRIBUTED COMPUTER system
5655042	05-Aug-97	08/734618	28-Oct-96	MOLDED SLOTTED OPTICAL SWITCH STRUCTURE AND METHOD
5659950	26-Aug-97	08/409130	23-Mar-95	[ELECTRONIC DIE PACKAGE ASSEMBLY HAVING A SUPPORT AND METHOD] Method of forming a package assembly
5661042	26-Aug-97	08/520118	28-Aug-95	PROCESS FOR ELECTRICALLY CONNECTING ELECTRICAL DEVICES USING A CONDUCTIVE ANISDTROPIC MATERIAL
5506544	09-Apr-96	08/419500	10-Apr-95	BIAS CIRCUIT FOR DEPLETION MODE FIELD EFFECT TRANSISTORS
5534819	09-Jul-96	08/421721	13-Apr-95	CIRCUIT AND METHOD FOR REDUCING VOLTAGE ERROR WHEN CHARGING AND DISCHARGING A VARIABLE CAPACITOR THROUGH A SWITCH
5587342	24-Dec-96	08/415972	03-Apr-95	METHOD OF FORMING AN ELECTRICAL INTERCONNECT
5670829	23-Sep-97	08/407121	20-Mar-95	PRECISION CURRENT LIMIT CIRCUIT
5550503	27-Aug-96	08/430999	28-Apr-95	CIRCUIT AND METHOD FOR REDUCING VOLTAGE ERROR WHEN CHARGING AND DISCHARGING A CAPACITOR THROUGH A TRANSMISSION GATE
5889211	30-Mar-99	08/415900	03-Apr-95	MEDIA COMPATIBLE MICROSENSOR STRUCTURE AND METHODS OF MANUFACTURING AND USING THE SAME
5724557	03-Mar-98	08/499838	10-Jul-95	METHOD FOR DESIGNING A SIGNAL DISTRIBUTION NETWORK
5629630	13-May-97	08/395127	27-Feb-95	SEMICONDUCTOR WAFER CONTACT SYSTEM AND METHOD FOR CONTACTING A SEMICONDUCTOR WAFER
5541135	30-Jul-96	08/452784	30-May-95	METHOD OF FABRICATING A FLIP CHIP SEMICONDUCTOR DEVICE HAVING AN INDUCTOR
5532175	02-Jul-96	08/423614	17-Apr-95	METHOD OF ADJUSTING A THRESHOLD VOLTAGE FOR A SEMICONDUCTOR DEVICE FABRICATED ON A SEMICONDUCTOR ON INSULATOR SUBSTRATE
5786230	28-Jul-98	08/431865	01-May-95	METHOD OF FABRICATING MULTI-CHIP PACKAGES
5744396	28-Apr-98	08/658908	31-May-96	A SEMICONDUCTOR DEVICE FORMED ON A HIGHLY DOPED N+ SUBSTRATE
5553566	10-Sep-96	08/493607	22-Jun-95	Method of eliminating dislocations and lowering lattice strain for HIGHLY DOPED N+ SUBSTRATES [AND METHOD FOR MAKING]
5748475	05-May-98	08/452899	30-May-95	APPARATUS AND METHOD OF ORIENTING ASYMMETRICAL SEMICONDUCTOR DEVICES IN A CIRCUIT
5614131	25-Mar-97	08/431994	01-May-95	METHOD OF MAKING AN OPTO-ELECTRONIC DEVICE
6856266	15-Feb-05	10/490875	09-Sep-02	MULTI-RATE ANALOG-TO-DIGITAL CONVERTER
5578860	26-Nov-96	08/431948	01-May-95	MONOLITHIC HIGH FREQUENCY INTEGRATED CIRCUIT STRUCTURE HAVING A GROUNDED SOURCE CONFIGURATION
7190293	13-Mar-07	10/515561	19-May-03	Sigma-delta ANALOG-TO-DIGITAL CONVERTER ARRANGEMENT AND METHOD for reducing harmonics
5679275	21-Oct-97	08/497760	03-Jul-95	CIRCUIT AND METHOD OF MODIFYING CHARACTERISTICS OF A UTILIZATION CIRCUIT
5724283	03-Mar-98	08/689578	13-Aug-96	DATA STORAGE ELEMENT AND METHOD FOR RESTORING DATA
5886396	23-Mar-99	08/463112	05-Jun-95	LEADFRAME ASSEMBLY FOR CONDUCTING THERMAL ENERGY FROM A SEMI CONDUCTOR DIE DISPOSED IN A PACKAGE
6017798	25-Jan-00	08/865846	02-Jun-97	FET WITH STABLE THRESHOLD VOLTAGE AND METHOD OF MANUFACTURING THE SAME
5675166	07-Oct-97	08/499624	07-Jul-95	FET WITH STABLE THRESHOLD VOLTAGE AND METHOD OF MANUFACTURING THE SAME
5550090	27-Aug-96	08/523581	05-Sep-95	METHOD FOR FABRICATING A MONOLITHIC SEMICONDUCTOR DEVICE WITH INTEGRATED SURFACE MICROMACHINED STRUCTURES
7235959	26-Jun-07	10/519306	16-Jun-03	LOW DROP-OUT VOLTAGE REGULATOR AND METHOD
5816478	06-Oct-98	08/465488	05-Jun-95	FLUXLESS FLIP-CHIP BOND AND A METHOD FOR MAKING
7154314	26-Dec-06	10/519656	10-Jun-03	COMMUNICATION APPARATUS INCLUDING DRIVER MEANS FOR APPLYING A SWITCHED SIGNAL TO A COMMUNICATION LINE WITH A CONTROLLED SLEW RATE
5604700	18-Feb-97	08/506989	28-Jul-95	NON-VOLATILE MEMORY CELL HAVING A SINGLE POLYSILICON GATE
5716866	10-Feb-98	08/566320	01-Dec-95	METHOD OF FORMING A SEMICONDUCTOR DEVICE
5900530	04-May-99	08/979331	24-Nov-96	METHOD FOR TESTING PRESSURE SENSORS
5529682	25-Jun-96	08/494482	26-Jun-95	METHOD FOR MAKING SEMICONDUCTOR DEVICES HAVING ELECTROPLATED LEADS
5581432	03-Dec-96	08/506799	25-Jul-95	CLAMP CIRCUIT AND METHOD FOR IDENTIFYING A SAFE OPERATING AREA


Patent No.	Grant Date	Appl No.	Appl Date	Title
5616886	01-Apr-97	08/464112	05-Jun-95	WIREBONDLESS MODULE PACKAGE
5733806	31-Mar-98	08/523705	05-Sep-95	METHOD FOR FORMING A SELF-ALIGNED SEMICONDUCTOR DEVICE
5641712	24-Jun-97	08/512253	07-Aug-95	METHOD AND STRUCTURE FOR REDUCING CAPACITANCE BETWEEN INTERCONNECT LINES
6627511	30-Sep-03	08/508874	28-Jul-95	REDUCED STRESS ISOLATION FOR SOI DEVICES AND A METHOD FOR FABRICATING
5656844	12-Aug-97	08/507898	27-Jul-95	SEMICONDUCTOR-ON-INSULATOR TRANSISTOR HAVING A DOPING PROFILE FOR FULLY-DEPLETED OPERATION
5968849	19-Oct-99	08/512050	07-Aug-95	METHOD FOR PRE-SHAPING A SEMICONDUCTOR SUBSTRATE FOR POLISHING AND STRUCTURE
5708288	13-Jan-98	08/556891	02-Nov-95	THIN FILM SILICON ON INSULATOR SEMICONDUCTOR INTEGRATED CIRCUIT WITH ELECTROSTATIC DAMAGE PROTECTION AND METHOD
5693545	02-Dec-97	08/608160	28-Feb-96	METHOD FOR FORMING A SEMICONDUCTOR SENSOR FET DEVICE [AND SEMICONDUCTOR SENSOR FET DEVICE]
6061099	09-May-00	08/949517	14-Oct-97	VIDEO OVERLAY CIRCUIT AND METHOD for overlaying a video signal
5882961	16-Mar-99	08/940097	29-Sep-97	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH REDUCED CHARGE TRAPPING
5643405	01-Jul-97	08/509685	31-Jul-95	METHOD FOR POLISHING A SEMICONDUCTOR SUBSTRATE
7158578	02-Jan-07	10/451094	08-Oct-01	QUADRATURE MODULATOR WITH PULSE-SHAPING
5674762	07-Oct-97	08/520147	28-Aug-95	METHOD OF FABRICATING AN EPROM WITH HIGH VOLTAGE TRANSISTORS
5579257	26-Nov-96	08/522477	31-Aug-95	METHOD FOR READING AND RESTORING DATA IN A DATA STORAGE ELEMENT
6992568	31-Jan-06	10/228518	27-Aug-02	PASSIVE RESPONSE COMMUNICATION SYSTEM
5712794	27-Jan-98	08/552425	03-Nov-95	AUTOMATED METHOD FOR ADDING AT TRIBUTES IDENTIFIED ON A SCHEMATIC DIAGRAM TO AN INTEGRATED CIRCUIT LAYOUT
5600071	04-Feb-97	08/684723	22-Jul-96	VERTICALLY INTEGRATED SENSOR STRUCTURE AND METHOD
5631192	20-May-97	08/537584	02-Oct-95	SEMICONDUCTOR DEVICE ON AN OPPOSED LEADFRAME AND METHOD FOR MAKING
5780352	14-Jul-98	08/553801	23-Oct-95	METHOD OF FORMING AN ISOLATION OXIDE FOR SILICON-ON-INSULATOR TECHNOLOGY
6664852	16-Dec-03	10/084988	28-Feb-02	APPARATUS AND METHOD FOR DIGITAL CONTROL SYSTEMS
5659648	19-Aug-97	08/536000	29-Sep-95	POLYIMIDE OPTICAL WAVEGUIDE HAVING ELECTRICAL CONDUCTIVITY
7327993	05-Feb-08	10/481977	03-Jun-02	LOW LEAKAGE LOCAL OSCILLATOR SYSTEM
5627492	06-May-97	08/552709	03-Nov-95	CIRCUIT AND METHOD FOR ISOLATING CIRCUIT BLOCKS FOR REDUCING POWER DISSIPATION
5886928	23-Mar-99	08/963212	03-Nov-97	NON-VOLATILE MEMORY CELL AND METHOD OF PROGRAMMING
5703808	30-Dec-97	08/604321	21-Feb-96	NON-VOLATILE MEMORY CELL AND METHOD OF PROGRAMMING
6871176	22-Mar-05	09/915893	26-Jul-01	PHASE EXCITED LINEAR PREDICTION ENCODER
5814545	29-Sep-98	08/810037	04-Mar-97	[METHOD OF MANUFACTURE A] SEMICONDUCTOR DEVICE HAVING A PHOSPHORUS DOPED PECVD FILM and a method of manufacture
6097674	01-Aug-00	09/069426	29-Apr-98	METHOD FOR MEASURING TIME AND STRUCTURE THEREFOR
5796682	18-Aug-98	08/550055	30-Oct-95	METHOD FOR MEASURING TIME AND STRUCTURE THEREFOR
6482289	19-Nov-02	08/540139	06-Oct-95	NONCONDUCTIVE LAMINANT FOR COUPLING SUBSTRATES AND METHOD THEREON
5593538	14-Jan-97	08/537053	29-Sep-95	METHOD FOR ETCHING A DIELECTRIC LAYER ON A SEMICONDUCTOR
5667632	16-Sep-97	08/556688	13-Nov-95	METHOD OF DEFINING A LINE WIDTH
7170135	30-Jan-07	10/651128	28-Aug-03	ARRANGEMENT AND METHOD FOR ESD PROTECTION
5593903	14-Jan-97	08/606472	04-Mar-96	METHOD OF FORMING CONTACT PADS FOR WAFER LEVEL TESTING AND BURN-IN OF SEMICONDUCTOR DEVICE
5719519	17-Feb-98	08/560155	20-Nov-95	CIRCUIT AND METHOD FOR RECONSTRUCTING A PHASE CURRENT
6023091	08-Feb-00	08/565735	30-Nov-95	SEMICONDUCTOR HEATER AND METHOD FOR MAKING
5883012	16-Mar-99	08/576282	21-Dec-95	METHOD OF ETCHING A TRENCH INTO A SEMICONDUCTOR SUBSTRATE
5783475	21-Jul-98	08/974894	20-Nov-97	METHOD OF FORMING A SPACER
5631548	20-May-97	08/550058	30-Oct-95	POWER OFF-LOADING CIRCUIT AND METHOD FOR DISSIPATING POWER
6950634	27-Sep-05	10/154126	23-May-02	TRANSCEIVER CIRCUIT ARRANGEMENT AND METHOD


Patent No.	Grant Date	Appl No.	Appl Date	Title
5750440	12-May-98	08/559669	20-Nov-95	APPARATUS AND METHOD FOR DYNAMICALLY MIXING SLURRY FOR CHEMICAL MECHANICAL POLISHING
5888412	30-Mar-99	08/610033	04-Mar-96	METHOD FOR MAKING A SCULPTURED DIAPHRAGM
7120661	10-Oct-06	10/447352	29-May-03	BIT EXACTNESS SUPPORT IN DUAL-MAC ARCHITECTURE
5661088	26-Aug-97	08/583835	11-Jan-96	ELECTRONIC COMPONENT AND METHOD OF PACKAGING
5789815	04-Aug-98	08/636483	23-Apr-96	THREE DIMENSIONAL SEMICONDUCTOR PACKAGE HAVING FLEXIBLE APPENDAGES [AND METHOD]
6043524	28-Mar-00	08/792843	03-Feb-97	TRANSDUCER AND INTERFACE CIRCUIT [AND METHOD]
5673130	30-Sep-97	08/582841	02-Jan-96	CIRCUIT AND METHOD OF ENCODING AND DECODING DIGITAL DATA TRANSMITTED ALONG OPTICAL FIBERS
5683569	04-Nov-97	08/608357	28-Feb-96	METHOD OF SENSING A CHEMICAL AND SENSOR THEREFOR
5670389	23-Sep-97	08/585137	11-Jan-96	SEMICONDUCTOR-ON-INSULATOR DEVICE HAVING A LATERALLY-GRADED CHANNEL REGION AND METHOD OF MAKING
5773359	30-Jun-98	08/578255	26-Dec-95	INTERCONNECT SYSTEM AND METHOD OF FABRICATION
5656951	12-Aug-97	08/596856	05-Feb-96	INPUT CIRCUIT AND METHOD FOR HOLDING DATA IN MIXED POWER SUPPLY MODE
5721438	24-Feb-98	08/593306	31-Jan-96	HETEROJUNCTION SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
5714800	03-Feb-98	08/619401	21-Mar-96	INTEGRATED CIRCUIT ASSEMBLY HAVING A STEPPED INTERPOSER AND METHOD
6160280	12-Dec-00	08/610504	04-Mar-96	[DOWN CONVERTER AND METHOD FOR GENERATING AN INTERMEDIATE FREQUENCY SIGNAL] Field effect transistor
5663690	02-Sep-97	08/611392	06-Mar-96	CONSTANT HIGH Q VOLTAGE CONTROLLED OSCILLATOR
5825644	20-Oct-98	08/610299	04-Mar-96	METHOD FOR ENCODING A STATE MACHINE
5824565	20-Oct-98	08/608790	29-Feb-96	METHOD OF FABRICATING A SENSOR
5915463	29-Jun-99	08/620522	23-Mar-96	HEAT DISSIPATION APPARATUS AND METHOD
5882034	16-Mar-99	08/641868	02-May-96	AUTOMOBILE AIRBAG SYSTEM
5729176	17-Mar-98	08/642378	03-May-96	LINEAR DIFFERENTIAL GAIN STAGE
5703478	30-Dec-97	08/628307	05-Apr-96	CURRENT MIRROR CIRCUIT
6127230	03-Oct-00	09/094870	15-Jun-98	VERTICAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
5872374	16-Feb-99	08/625016	29-Mar-96	VERTICAL SEMICONDUCTOR DEVICE [AND METHOD OF MANUFACTURING THE SAME]
6492232	10-Dec-02	09/563796	02-May-00	Method of manufacturing VERTICAL SEMICONDUCTOR DEVICE [AND METHOD OF MANUFACTURING THE SAME]
6326228	04-Dec-01	09/086740	29-May-98	SENSOR AND METHOD OF FABRICATION
5798556	25-Aug-98	08/620729	25-Mar-96	SENSOR AND METHOD OF FABRICATION
5804985	08-Sep-98	08/626590	02-Apr-96	PROGRAMMABLE OUTPUT BUFFER AND METHOD FOR PROGRAMMING
5808362	15-Sep-98	08/609251	29-Feb-96	INTERCONNECT STRUCTURE AND METHOD OF FORMING
5894163	13-Apr-99	08/639479	02-Apr-96	DEVICE AND METHOD FOR MULTIPLYING CAPACITANCE
7151387	19-Dec-06	10/672487	26-Sep-03	ANALYSIS MODULE, INTEGRATED CIRCUIT, SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT
5799049	25-Aug-98	08/626593	02-Apr-96	PHASE-INDEPENDENT CLOCK CIRCUIT AND METHOD
5748042	05-May-98	08/686876	26-Jul-96	METHOD FOR CONDITIONING A SIGNAL AND AMPLIFIER CIRCUIT THERE FOR
5650749	22-Jul-97	08/660828	10-Jun-96	FM DEMODULATOR USING INJECTION LOCKED OSCILLATOR HAVING TUNING FEEDBACK AND LINEARIZING FEEDBACK
5912510	15-Jun-99	08/672389	29-May-96	BONDING STRUCTURE FOR AN ELECTRONIC DEVICE
5889763	30-Mar-99	08/658046	04-Jun-96	TRANSFER RATE CONTROLLER AND METHOD OF OPERATION
5751166	12-May-98	08/658040	04-Jun-96	INPUT BUFFER CIRCUIT AND METHOD .
5898122	27-Apr-99	08/674380	02-Jul-96	SQUIB IGNITOR CIRCUIT AND METHOD THEREFOR .
5936294	10-Aug-99	08/654514	28-May-96	OPTICAL SEMICONDUCTOR COMPONENT AND METHOD OF FABRICATION
5926052	20-Jul-99	08/908827	08-Aug-97	VARIABLE PHASE SHIFTER AND METHOD
6014120	11-Jan-00	08/668960	24-Jun-96	LED DISPLAY CONTROLLER AND METHOD OF OPERATION
5777361	07-Jul-98	08/657127	03-Jun-96	SINGLE GATE NONVOLATILE MEMORY CELL AND METHOD FOR ACCESSING THE SAME
5860585	19-Jan-99	08/658907	31-May-96	SUBSTRATE FOR TRANSFERRING BUMPS AND METHOD OF USE
5734317	31-Mar-98	08/674067	01-Jul-96	CURRENT LIMIT CONTROLLER FOR AN AIR BAG DEPLOYMENT SYSTEM


Patent No.	Grant Date	Appl No.	Appl Date	Title
5886547	23-Mar-99	08/771348	16-Dec-96	CIRCUIT AND METHOD OF CONTROLLING MIXER LINEARITY
6747494	08-Jun-04	10/077467	15-Feb-02	PLL ARRANGEMENT, CHARGE PUMP, METHOD AND MOBILE TRANSCEIVER
5790728	04-Aug-98	08/671866	28-Jun-96	OPTICAL COUPLING COMPONENT AND METHOD OF MAKING THE SAME
5773887	30-Jun-98	08/879453	20-Jun-97	HIGH FREQUENCY SEMICONDUCTOR COMPONENT
5888901	30-Mar-99	08/691967	05-Aug-96	MULTILEVEL INTERCONNECTION AND METHOD FOR MAKING
6022761	08-Feb-00	08/654466	28-May-96	METHOD FOR COUPLING SUBSTRATES AND STRUCTURE
7023195	04-Apr-06	10/670683	25-Sep-03	MODULE, SYSTEM AND METHOD FOR TESTING A PHASE LOCKED LOOP
5604160	18-Feb-97	08/687904	29-Jul-96	METHOD FOR PACKAGING SEMICONDUCTOR DEVICES
5776798	07-Jul-98	08/708296	04-Sep-96	SEMICONDUCTOR PACKAGE AND METHOD THEREFOR
5889872	30-Mar-99	08/674382	02-Jul-96	CAPACITIVE MICROPHONE AND METHOD THEREFOR
7567788	28-Jul-09	10/521417	25-Jun-03	TRANSMITTER AND RECEIVER GAIN CALIBRATION BY MEANS OF FEEDBACK IN A TRANSCEIVER
7653765	26-Jan-10	10/507157	11-Nov-02	INFORMATION COMMUNICATION CONTROLLER INTERFACE APPARATUS AND METHOD
5892252	06-Apr-99	09/018976	05-Feb-98	CHEMICAL SENSING TRENCH FIELD EFFECT TRANSISTOR
5747839	05-May-98	08/720513	30-Sep-96	CHEMICAL SENSING TRENCH FIELD EFFECT TRANSISTOR
5773083	30-Jun-98	08/950605	15-Oct-97	METHOD FOR COATING A SUBSTRATE WITH A COATING SOLUTION
7287210	23-Oct-07	10/255278	26-Sep-02	CONVOLUTIONAL ENCODER AND METHOD OF OPERATION
5770965	23-Jun-98	08/722407	30-Sep-96	CIRCUIT AND METHOD OF COMPENSATING FOR NON-LINEARITIES IN A SENSOR SIGNAL
5757237	26-May-98	08/703243	28-Aug-96	METHOD FOR DYNAMICALLY BIASING AN AMPLIFIER AND CIRCUIT THEREOF
5760489	02-Jun-98	08/726023	04-Oct-96	METHOD FOR TRANSMITTING SIGNALS BETWEEN A MICROPORCESSOR AND AN INTERFACE CIRCUIT
5757236	26-May-98	08/673485	01-Jul-96	AMPLIFIER BIAS CIRCUIT AND METHOD
7253595	07-Aug-07	10/504909	12-Feb-03	LOW DROP-OUT VOLTAGE REGULATOR
5832370	03-Nov-98	08/721399	26-Sep-96	CURRENT MODE TRANSCEIVER CIRCUIT AND METHOD
5920810	06-Jul-99	08/851236	05-May-97	MULTIPLIER AND METHOD FOR MIXING SIGNALS
6140703	31-Oct-00	08/774304	26-Dec-96	[METHOD OF FORMING A] SEMICONDUCTOR METALLIZATION structure [SYSTEM AND STRUCTURE THEREFOR]
6693020	17-Feb-04	09/803749	12-Mar-01	METHOD OF PREPARING COPPER METALLIZATION DIE FOR WIRE BONDING
7542412	02-Jun-09	10/508771	01-Nov-02	SELF-ROUTING, STAR-COUPLER-BASED COMMUNICATION NETWORK
5886562	23-Mar-99	08/773293	26-Dec-96	METHOD AND APPARATUS FOR SYNCHRONIZING A PLURALITY OF OUTPUT CLOCK SIGNALS GENERATED FROM A CLOCK INPUT SIGNAL
7046977	16-May-06	10/496524	04-Nov-02	APPARATUS FOR GENERATING MULTIPLE CLOCK SIGNALS OF DIFFERENT FREQUENCY CHARACTERISTICS
5753929	19-May-98	08/697709	28-Aug-96	MULTI-DIRECTIONAL OPTOCOUPLER AND METHOD OF MANUFACTURE
5825091	20-Oct-98	08/823702	25-Mar-97	SENSOR ASSEMBLY MOUNTED TO A LEADFRAME WITH ADHESIVE DEPOSITS AT SEPARATE LOCATIONS
7432145	07-Oct-08	10/518158	10-Jun-03	POWER SEMICONDUCTOR DEVICE WITH A BASE REGION AND METHOD OF MANUFACTURING SAME
7221221	22-May-07	10/517454	23-May-03	POWER AMPLIFIER WITH PRE-DISTORTER
5751555	12-May-98	08/697095	19-Aug-96	ELECTRONIC COMPONENT HAVING REDUCED CAPACITANCE
6175346	16-Jan-01	08/740052	24-Oct-96	DISPLAY DRIVER AND METHOD THEREOF
5940779	17-Aug-99	08/810876	05-Mar-97	ARCHITECTURAL POWER ESTIMATION METHOD AND APPARATUS
5715014	03-Feb-98	08/707116	03-Sep-96	CIRCUIT AND METHOD OF PROVIDING PARENTAL DISCRETIONARY CONTROL ON A PIPIC
5742007	21-Apr-98	08/695813	05-Aug-96	ELECTRONIC DEVICE PACKAGE AND METHOD FOR FORMING THE SAME
5796391	18-Aug-98	08/740050	24-Oct-96	SCALEABLE REFRESH DISPLAY CONTROLLER
5892661	06-Apr-99	08/741793	31-Oct-96	SMARTCARD AND METHOD OF MAKING
5747858	05-May-98	08/723817	30-Sep-96	ELECTRONIC COMPONENT HAVING AN INTERCONNECT SUBSTRATE ADJACENT TO A SIDE SURFACE OF A DEVICE SUBSTRATE


Patent No.	Grant Date	Appl No.	Appl Date	Title
5815017	29-Sep-98	08/808772	03-Mar-97	FORCED OSCILLATOR CIRCUIT AND METHOD
5929935	27-Jul-99	08/753813	02-Dec-96	METHOD FOR REDUCING FLICKER AND CIRCUIT THEREFOR
5898128	27-Apr-99	08/712037	11-Sep-96	ELECTRONIC COMPONENT [AND METHOD OF FABRICATING THE SAME]
5821170	13-Oct-98	08/720511	30-Sep-96	METHOD OF REMOVING ETCHING AN INSULATING MATERIAL
5879999	09-Mar-99	08/720510	30-Sep-96	Method of manufacturing an INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SPACER EXTENSION [AND METHOD OF MANUFACTURE]
5894284	13-Apr-99	08/753812	02-Dec-96	COMMON-MODE OUTPUT SENSING CIRCUIT
5886374	23-Mar-99	09/002801	05-Jan-98	OPTICALLY SENSITIVE DEVICE AND METHOD
5912819	15-Jun-99	08/758331	03-Dec-96	METHOD FOR DESIGNING AN ARCHITECTURAL SYSTEM
5743788	28-Apr-98	08/755870	02-Dec-96	PLATEN COATING STRUCTURE FOR CHEMICAL MECHANICAL POLISHING AND METHOD
5891769	06-Apr-99	09/046559	27-Feb-98	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A HETEROEPI TAXIAL LAYER
6826188	30-Nov-04	09/764967	16-Jan-01	METHOD AND CIRCUIT FOR FORMING AN ATM CELL
6819131	16-Nov-04	10/193053	11-Jul-02	PASSIVE, GREASE-FREE COOLED DEVICE FIXTURES
5801523	01-Sep-98	08/799680	11-Feb-97	CIRCUIT AND METHOD OF PROVIDING A CONSTANT CURRENT
5920093	06-Jul-99	08/834964	07-Apr-97	SOI FET HAVING GATE SUB-REGION S CONFORMING TO T-SHAPE
5892379	06-Apr-99	08/867661	02-Jun-97	TRANSISTOR PROTECTION CIRCUIT AND METHOD
5721451	24-Feb-98	08/758660	02-Dec-96	INTEGRATED CIRCUIT ASSEMBLY ADHESIVE AND METHOD THEREOF
5945694	31-Aug-99	08/792606	31-Jan-97	[METHOD OF FORMING A] COMPOUND SEMICONDUCTOR DEVICE HAVING REDUCED TERMPERATURE VIABILITY
6414562	02-Jul-02	08/863153	27-May-97	CIRCUIT AND METHOD FOR IMPEDANCE MATCHING
5903038	11-May-99	08/885266	30-Jun-97	SEMICONDUCTOR SENSING DEVICE AND METHOD FOR FABRICATING THE SAME
6087701	11-Jul-00	08/997615	23-Dec-97	SEMICONDUCTOR DEVICE HAVING A CAVITY AND METHOD OF MAKING
5811341	22-Sep-98	08/762170	09-Dec-96	DIFFERENTIAL AMPLIFIER HAVING UNILATERAL FIELD EFFECT TRANSISTORS AND PROCESS OF FABRICATING
5926734	20-Jul-99	08/906032	05-Aug-97	SEMICONDUCTOR STRUCTURE HAVING A TITANIUM BARRIER LAYER
5966047	12-Oct-99	08/826179	27-Mar-97	PROGRAMMABLE ANALOG ARRAY AND METHOD
6146541	14-Nov-00	08/848849	02-May-97	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE that uses a calibration standard
5825093	20-Oct-98	08/829397	31-Mar-97	ATTACHMENT SYSTEM AND METHOD THEREFOR
5875897	02-Mar-99	08/838479	31-Mar-97	PACKAGING APPARATUS AND METHOD
5929518	27-Jul-99	08/901525	28-Jul-97	CIRCUIT BOARD AND METHOD
5825640	20-Oct-98	08/885970	30-Jun-97	CHARGE PUMP CIRCUIT AND METHOD
5935321	10-Aug-99	08/904988	01-Aug-97	SINGLE CRYSTAL INGOT AND METHOD AND APPARATUS FOR GROWING THE SAME
5939753	17-Aug-99	08/832512	02-Apr-97	MONOLITHIC [INTEGRATED CIRCUIT AND PROCESS FOR FABRICATING THE SAME] RF mixed signal IC with power amplification
5994161	30-Nov-99	08/927150	03-Sep-97	TEMPERATURE COEFFICIENT OF OFFSET ADJUSTED SEMICONDUCTOR DEVICE AND METHOD THEREOF
6070600	06-Jun-00	08/886741	01-Jul-97	POINT OF USE DILUTION TOOL AND METHOD
6406555	18-Jun-02	09/495180	01-Feb-00	POINT OF USE DILUTION TOOL AND METHOD
5892709	06-Apr-99	08/853601	09-May-97	SINGLE LEVEL GATE NONVOLATILE MEMORY DEVICE AND METHOD FOR ACCESSING THE SAME
5925908	20-Jul-99	08/903085	30-Jul-97	[SEMICONDUCTOR DEVICE AND METHOD OF MAKING] Integrated circuit including a non-volatile memory device and a semiconductor device
6169800	02-Jan-01	08/887166	02-Jul-97	INTEGRATED CIRCUIT AMPLIFIER AND METHOD FOR ADAPTIVE OFFSET
5955980	21-Sep-99	08/943442	03-Oct-97	CIRCUIT AND METHOD FOR CALIBRATING A DIGITAL TO ANALOG CONVERTER
6013933	11-Jan-00	08/866588	30-May-97	SEMICONDUCTOR STRUCTURE HAVING A MONOCRYSTALLINE MEMBER OVERLYING A CAVITY IN A SEMICONDUCTOR SUBSTRATE AND PROCESS THEREFOR
5808873	15-Sep-98	08/865652	30-May-97	ELECTRONIC COMPONENT ASSEMBLY HAVING AN ENCAPSULATION MATERIAL AND METHOD OF FORMING THE SAME


Patent No.	Grant Date	Appl No.	Appl Date	Title
5923217	13-Jul-99	08/883981	27-Jun-97	AMPLIFIER CIRCUIT AND METHOD FOR GENERATING A BIAS VOLTAGE
5824601	20-Oct-98	08/885265	30-Jun-97	CARBOXYLIC ACID ETCHING SOLUTION AND METHOD
5929478	27-Jul-99	08/886746	02-Jul-97	SINGLE LEVEL GATE NONVOLATILE MEMORY DEVICE AND METHOD FOR ACCESSING THE SAME
5828607	27-Oct-98	08/861078	21-May-97	MEMORY PROGRAMMING CIRCUIT AND METHOD
5898617	27-Apr-99	08/859962	21-May-97	SENSING CIRCUIT AND METHOD
5898633	27-Apr-99	08/859897	21-May-97	CIRCUIT AND METHOD OF LIMITING LEAKAGE CURRENT IN A MEMORY CIRCUIT
6041221	21-Mar-00	08/859898	21-May-97	CIRCUIT AND METHOD FOR VERIFYING DATA OF A WIRELESS COMMUNICATIONS DEVICE
5754010	19-May-98	08/859963	21-May-97	MEMORY CIRCUIT AND METHOD FOR SENSING DATA
6023136	08-Feb-00	08/980422	28-Nov-97	ADAPTIVE MOTOR CONTROL CIRCUIT AND METHOD
5914521	22-Jun-99	08/903087	30-Jul-97	[SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE SAME] Sensor devices having a movable structure
6070464	06-Jun-00	08/926319	05-Sep-97	SENSING STRUCTURE COMPRISING A MOVABLE MASS AND A SELF-TEST STRUCTURE
6556584	29-Apr-03	09/055455	06-Apr-98	SYSTEM AND METHOD OF COMMUNICATING NON-STANDARDIZED ADDRESSES OVER A STANDARDIZED CARRIER NETWORK
5965912	12-Oct-99	08/929123	03-Sep-97	VARIABLE CAPACITOR AND METHOD FOR FABRICATING THE SAME
6103548	15-Aug-00	08/931982	17-Sep-97	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
5918112	29-Jun-99	08/899672	24-Jul-97	SEMICONDUCTOR COMPONENT AND METHOD OF FABRICATION
6023086	08-Feb-00	08/926078	02-Sep-97	SEMICONDUCTOR [DEVICE AND METHOD OF MANUFACTURE] transistor with stabilizing gate electrode
6040604	21-Mar-00	08/897964	21-Jul-97	SEMICONDUCTOR COMPONENT COMPRISING AN ELECTROSTATIC-DISCHARGE PROTECTION DEVICE
5936469	10-Aug-99	08/905524	04-Aug-97	AMPLIFIER WITH INPUT REFERRED COMMON-MODE ADJUSTMENT
6147551	14-Nov-00	09/002789	05-Jan-98	SWITCHED CAPACITOR CIRCUIT AND METHOD FOR REDUCING SAMPLING NOISE
6061218	09-May-00	08/943325	03-Oct-97	OVERVOLTAGE PROTECTION DEVICE AND METHOD FOR INCREASING SHUNT CURRENT
6201186	13-Mar-01	09/106552	29-Jun-98	ELECTRONIC COMPONENT ASSEMBLY AND METHOD OF MAKING THE SAME
5973337	26-Oct-99	08/917121	25-Aug-97	[SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE] Ball grid device with optically transmissive coating
5963782	05-Oct-99	08/904989	01-Aug-97	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
5892380	06-Apr-99	08/905624	04-Aug-97	METHOD FOR SHAPING A PULSE WIDTH AND CIRCUIT THEREFOR
6187216	13-Feb-01	08/917982	27-Aug-97	METHOD FOR ETCHING A DIELECTRIC LAYER OVER A SEMICONDUCTOR SUBSTRATE
6593605	15-Jul-03	10/002705	31-Oct-01	ENERGY ROBUST FIELD EFFECT TRANSISTOR
6603157	05-Aug-03	10/004517	02-Nov-01	FIELD EFFECT TRANSISTOR having differing power dissipation across an array of transistors
6140184	31-Oct-00	09/088027	01-Jun-98	[FIELD EFFECT TRANSISTOR AND METHOD OF MAKING] Method of changing the power dissipation across an array of transistors
6423991	23-Jul-02	09/562604	01-May-00	FIELD EFFECT TRANSISTOR AND METHOD OF MAKING
6149508	21-Nov-00	09/318951	26-May-99	CHEMICAL MECHANICAL PLANARIZATION SYSTEM [AND METHOD THEREFOR]
5945346	31-Aug-99	08/963487	03-Nov-97	CHEMICAL MECHANICAL PLANARIZATION SYSTEM AND METHOD THEREFOR
6139079	31-Oct-00	08/954241	20-Oct-97	UNIVERSAL TRANSPORT APPARATUS [AND METHOD]
5936837	10-Aug-99	08/909143	11-Aug-97	SEMICONDUCTOR COMPONENT HAVING LEADFRAME WITH OFFSET GROUND PLANE
6137999	24-Oct-00	08/998367	24-Dec-97	IMAGE REJECTION TRANSCEIVER AND METHOD OF REJECTING AN IMAGE
6111316	29-Aug-00	08/920840	29-Aug-97	ELECTRONIC COMPONENT [AND METHOD FOR MAKING] encapsulated in a glass tube
6100556	08-Aug-00	08/970703	14-Nov-97	METHOD OF FORMING A SEMICONDUCTOR IMAGE SENSOR AND STRUCTURE
6221686	24-Apr-01	09/493366	28-Jan-00	METHOD OF MAKING A SEMICONDUCTOR IMAGE SENSOR
6023081	08-Feb-00	08/970720	14-Nov-97	SEMICONDUCTOR IMAGE SENSOR AND METHOD THEREFOR
6137852	24-Oct-00	08/996903	23-Dec-97	PHASE DETECTOR CIRCUIT AND MET OD OF PHASE DETECTING
5903051	11-May-99	09/055120	03-Apr-98	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE


Patent No.	Grant Date	Appl No.	Appl Date	Title
6160842	12-Dec-00	09/024443	17-Feb-98	DEVICE AND METHOD FOR SERIALLY COMMUNICATING
6088215	11-Jul-00	08/963492	03-Nov-97	CAPACITOR AND METHOD OF MANUFACTURE
6069493	30-May-00	08/980250	28-Nov-97	INPUT CIRCUIT AND METHOD FOR PROTECTING THE INPUT CIRCUIT
6040624	21-Mar-00	08/943020	02-Oct-97	SEMICONDUCTOR DEVICE PACKAGE AND METHOD
6166766	26-Dec-00	08/929125	03-Sep-97	[IMAGE CAPTURING CIRCUIT] Sensing circuit for capturing a pixel signal
6346968	12-Feb-02	08/921965	02-Sep-97	[IMAGING CIRCUIT AND METHOD FOR COLOR BALANCING PIXEL SIGNALS] Color balancing circuit and method
5929662	27-Jul-99	08/963627	04-Nov-97	ANALOG COMPARATOR AND METHOD
6107203	22-Aug-00	08/963486	03-Nov-97	A CHEMICAL MECHANICAL POLISHING SYSTEM AND METHOD THEREFOR
6572462	03-Jun-03	09/072169	04-May-98	CARRIER ASSEMBLY FOR CHEMICAL MECHANICAL PLANARIZATION SYSTEMS AND METHOD
6482073	19-Nov-02	09/693433	20-Oct-00	TRANSLATION MECHANISM FOR A CHEMICAL MECHANICAL PLANARIZATION SYSTEM AND METHOD THEREFOR
6263605	24-Jul-01	09/216820	21-Dec-98	PAD CONDITIONER COUPLING AND END EFFECTOR FOR A CHEMICAL MECHANICAL PLANARIZATION SYSTEM A ND METHOD THEREFOR
6514126	04-Feb-03	09/586189	02-Jun-00	PAD CONDITIONER COUPLING AND END EFFECTOR FOR A CHEMICAL MECHANICAL PLANARIZATION SYSTEM AND METHOD THEREFOR
6796885	28-Sep-04	10/298744	18-Nov-02	PAD CONDITIONER COUPLING AND END EFFECTOR FOR A CHEMICAL MECHANICAL PLANARIZATION SYSTEM AND METHOD THEREFOR
6049703	11-Apr-00	08/980220	28-Nov-97	AMPLIFIER CIRCUIT AND METHOD FOR INCREASING LINEARITY OF THE AMPLIFIER CIRCUIT
6895596	17-May-05	08/997622	23-Dec-97	CIRCUIT AND METHOD FOR INTERLEAVING A DATA STREAM
6039835	21-Mar-00	08/929686	15-Sep-97	ETCHING APPARATUS AND METHOD OF ETCHING A SUBSTRATE
6177354	23-Jan-01	09/389640	03-Sep-99	METHOD OF ETCHING A SUBSTRATE
6144846	07-Nov-00	09/002307	31-Dec-97	FREQUENCY TRANSLATION CIRCUIT AND METHOD OF TRANSLATING
6144845	07-Nov-00	09/002305	31-Dec-97	METHOD AND CIRCUIT FOR IMAGE REJECTION
6147410	14-Nov-00	09/033188	02-Mar-98	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
6137154	24-Oct-00	09/017571	02-Feb-98	BIPOLAR TRANSISTOR WITH INCREASED EARLY VOLTAGE
5959522	28-Sep-99	09/017929	03-Feb-98	INTEGRATED ELECTROMAGNETIC DEVICE AND METHOD
6487395	26-Nov-02	09/039502	16-Mar-98	RADIO FREQUENCY ELECTRONIC SWITCH
6020611	01-Feb-00	09/095504	10-Jun-98	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
6263199	17-Jul-01	09/211168	14-Dec-98	CIRCUIT AND METHOD OF SIGNAL FREQUENCY CONVERSION
6900105	31-May-05	10/211842	02-Aug-02	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
6150200	21-Nov-00	09/055119	03-Apr-98	SEMICONDUCTOR DEVICE AND METHOD OF MAKING
6096606	01-Aug-00	09/072256	04-May-98	SEMICONDUCTOR DEVICE AND METHOD OF MAKING
6426239	30-Jul-02	09/629611	31-Jul-00	[SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE] Method of manufacturing a semiconductor component having a fixed electrode between two flexible diaphragms
6046894	04-Apr-00	09/033013	02-Mar-98	SEMICONDUCTOR PROTECTION CIRCUIT AND METHOD
6087873	11-Jul-00	09/119945	21-Jul-98	PRECISION HYSTERESIS CIRCUIT
6509247	21-Jan-03	09/769710	25-Jan-01	SEMICONDUCTOR DEVICE AND ALIGNMENT METHOD
6228743	08-May-01	09/072052	04-May-98	Alignment method for SEMICONDUCTOR DEVICE
6246123	12-Jun-01	09/072053	04-May-98	TRANSPARENT COMPOUND AND APPLICATIONS FOR ITS USE
6138229	24-Oct-00	09/086741	29-May-98	METHOD AND ARCHITECTURE FOR CUSTOMIZABLE INSTRUCTION SET PROCESSOR
5930103	27-Jul-99	09/032926	02-Mar-98	CONTROL CIRCUIT FOR AN ELECTRO MECHANICAL DEVICE
6087969	11-Jul-00	09/067147	27-Apr-98	SIGMA-DELTA MODULATOR AND METHOD FOR DIGITIZING A SIGNAL
6154369	28-Nov-00	09/456489	07-Dec-99	ELECTRONIC ASSEMBLY [AND METHOD OF MANUFACTURE] for removing heat from a semiconductor device
6001661	14-Dec-99	09/055206	06-Apr-98	INTEGRATED CIRCUIT INTERCONNECT METHOD AND APPARATUS
6160906	12-Dec-00	09/087884	01-Jun-98	METHOD AND APPARATUS FOR VISUALLY INSPECTING AN OBJECT
6404912	11-Jun-02	09/631751	04-Aug-00	METHOD AND APPARATUS FOR VISUALLY INSPECTING AN OBJECT
6133764	17-Oct-00	09/238773	27-Jan-99	COMPARATOR CIRCUIT AND METHOD


Patent No.	Grant Date	Appl No.	Appl Date	Title
6046901	04-Apr-00	09/072196	04-May-98	SUPPORT STRUCTURE ELECTRONIC ASSEMBLY [AND METHOD OF MANUFACTURE]
6140212	31-Oct-00	09/088019	01-Jun-98	SEMICONDUCTOR DEVICE AND METHOD THEREFOR
6163063	19-Dec-00	09/557502	24-Apr-00	SEMICONDUCTOR DEVICE [AND METHOD THEREFOR]
5953251	14-Sep-99	09/215933	18-Dec-98	PROGRAMMING METHOD FOR NONVOLATILE MEMORIES
6476426	05-Nov-02	09/347552	06-Jul-99	ELECTRONIC COMPONENT AND METHOD FOR IMPROVING PIXEL CHARGE TRANSFER IN THE ELECTRONIC COMPONENT
6026003	15-Feb-00	09/215932	18-Dec-98	CHARGE PUMP CIRCUIT AND METHOD for generating a bias voltage
6084241	04-Jul-00	09/087699	01-Jun-98	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND APPARATUS THEREFOR
6046642	04-Apr-00	09/149520	08-Sep-98	AMPLIFIER WITH ACTIVE BIAS COMPENSATION AND METHOD FOR ADJUSTING QUIESCENT CURRENT
6121845	19-Sep-00	09/079843	15-May-98	PHASED-LOCKED LOOP SYSTEM AND METHOD FOR MODIFYING AN OUTPUT TRANSITION TIME
6451627	17-Sep-02	09/391879	07-Sep-99	SEMICONDUCTOR DEVICE AND PROCESS FOR MANUFACTURING AND PACKAGING A SEMICONDUCTOR DEVICE
6166451	26-Dec-00	09/232253	14-Jan-99	[RECTIFIER CIRCUIT HAVING FIRST AND SECOND INPUTS INTERCHANGE ABLY CONNECTED TO FIRST AND SECOND CONDUCTORS] Distributed airbag firing system and interface circuit therefor
6583816	24-Jun-03	09/118684	17-Jul-98	IMAGING CIRCUIT AND METHOD OF SPATIAL COMPENSATION
6081037	27-Jun-00	09/102092	22-Jun-98	SEMICONDUCTOR DEVICE AND METHOD FOR PACKAGING A SEMICONDUCTOR CHIP
6251734	26-Jun-01	09/108361	01-Jul-98	METHOD FOR FABRICATING TRENCH ISOLATION AND TRENCH SUBSTRATE CONTACT
6305708	23-Oct-01	09/106160	29-Jun-98	AIRBAG DEPLOYMENT SYSTEM AND METHOD FOR MONITORING SAME
5942939	24-Aug-99	09/088002	01-Jun-98	AMPLIFIER AND METHOD OF CANCELING DISTORTION BY COMBINING HYPERBOLIC TANGENT AND HYPERBOLIC SINE TRANSFER FUNCTIONS
6127875	03-Oct-00	09/130343	13-Aug-98	COMPLIMENTARY DOUBLE PUMPING VOLTAGE BOOST CONVERTER
6150889	21-Nov-00	09/128025	03-Aug-98	CIRCUIT AND METHOD FOR MINIMIZING RECOVERY TIME
6222420	24-Apr-01	09/660747	13-Sep-00	MINIMIZING RECOVERY TIME
6072211	06-Jun-00	09/128022	03-Aug-98	SEMICONDUCTOR PACKAGE
6177832	23-Jan-01	09/110289	06-Jul-98	HIGH FREQUENCY DIFFERENTIAL TO SINGLE-ENDED CONVERTER
6318174	20-Nov-01	09/538637	30-Mar-00	SENSOR AND METHOD OF USE
6182104	30-Jan-01	09/120835	22-Jul-98	CIRCUIT AND METHOD OF MODULO MULTIPLICATION
6356636	12-Mar-02	09/120580	22-Jul-98	CIRCUIT AND METHOD FOR FAST MODULAR MULTIPLICATION
6037674	14-Mar-00	09/105586	26-Jun-98	CIRCUIT AND METHOD OF CURRENT LIMITING A HALF-BRIDGE DRIVER
6413878	02-Jul-02	09/546595	10-Apr-00	METHOD OF MANUFACTURING ELECTRONIC COMPONENTS
6436300	20-Aug-02	09/124776	30-Jul-98	METHOD OF MANUFACTURING ELECTRONIC COMPONENTS
6868431	15-Mar-05	09/426670	25-Oct-99	CIRCUIT AND METHOD FOR PROCESSING DATA
6225674	01-May-01	09/285532	02-Apr-99	SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
6489211	03-Dec-02	09/516349	01-Mar-00	Method of manufacturing a SEMICONDUCTOR COMPONENT [AND METHOD OF MANUFACTURE]
6133793	17-Oct-00	09/122730	27-Jul-98	CIRCUIT AND METHOD OF AMPLIFYING A SIGNAL FOR A RECEIVER
6137997	24-Oct-00	09/128428	04-Aug-98	CIRCUIT FOR RECEIVING AND TRANSMITTING SIGNALS AND METHOD
6137995	24-Oct-00	09/207869	08-Dec-98	CIRCUIT AND METHOD OF GENERATING A PHASE LOCKED LOOP SIGNAL HAVING AN OFFSET REFERENCE
6056888	02-May-00	09/294075	19-Apr-99	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
6122963	26-Sep-00	09/235731	22-Jan-99	ELECTRONIC COMPONENT for measuring acceleration
6490440	03-Dec-02	09/323236	01-Jun-99	DIGITAL TRANSMITTER CIRCUIT AND METHOD OF OPERATION
6228275	08-May-01	09/208924	10-Dec-98	METHOD OF MANUFACTURING A SENSOR
6100721	08-Aug-00	09/241669	01-Feb-99	CIRCUIT AND METHOD OF EXTENDING THE LINEAR RANGE OF A PHASE FREQUENCY DETECTOR
6671709	30-Dec-03	10/105543	25-Mar-02	MULTIPLIER CELL AND METHOD OF COMPUTING
6592708	15-Jul-03	10/142682	10-May-02	FILTER APPARATUS AND METHOD THEREFOR
6423638	23-Jul-02	09/407211	28-Sep-99	FILTER APPARATUS AND METHOD THEREFOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
6366768	02-Apr-02	09/188266	09-Nov-98	CIRCUIT AND METHOD OF FREQUENCY SYNTHESIZER CONTROL WITH A SERIAL PERIPHERAL INTERFACE
6355541	12-Mar-02	09/296143	21-Apr-99	METHOD FOR TRANSFER OF THIN-FILM OF SILICON CARBIDE VIA IMPLANTATION AND WAFER BONDING
6514789	04-Feb-03	09/427054	26-Oct-99	COMPONENT AND METHOD FOR MANUFACTURE
6259318	10-Jul-01	09/322048	28-May-99	METHOD FOR EXTENDING THE LINEAR RANGE OF AN AMPLIFIER
6271699	07-Aug-01	09/285826	02-Apr-99	DRIVER CIRCUIT AND METHOD FOR CONTROLLING TRANSITION TIME OF A SIGNAL
6101145	08-Aug-00	09/216703	21-Dec-98	SENSING CIRCUIT AND METHOD
6153905	28-Nov-00	09/502694	11-Feb-00	SEMICONDUCTOR COMPONENT [AND METHOD OF MANUFACTURE]
6222236	24-Apr-01	09/302537	30-Apr-99	PROTECTION CIRCUIT AND METHOD FOR PROTECTING A SEMICONDUCTOR DEVICE
6352874	05-Mar-02	09/317734	24-May-99	METHOD OF MANUFACTURING A SENSOR
6261868	17-Jul-01	09/285827	02-Apr-99	SEMICONDUCTOR COMPONENT AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR COMPONENT
6072238	06-Jun-00	09/287282	07-Apr-99	SEMICONDUCTOR COMPONENT
6384353	07-May-02	09/495786	01-Feb-00	MICRO-ELECTROMECHANICAL SYSTEM DEVICE
6342411	29-Jan-02	09/389638	03-Sep-99	ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURE
6498550	24-Dec-02	09/561559	28-Apr-00	FILTERING DEVICE AND METHOD
6462789	08-Oct-02	09/277158	26-Mar-99	CIRCUIT AND METHOD FOR GENERATING CHROMINANCE LOCK
6100763	08-Aug-00	09/280600	29-Mar-99	CIRCUIT FOR RF BUFFER AND METHOD OF OPERATION
6104227	15-Aug-00	09/277867	29-Mar-99	RF MIXER CIRCUIT AND METHOD OF OPERATION
6458622	01-Oct-02	09/348737	06-Jul-99	STRESS COMPENSATION COMPOSITION AND SEMICONDUCTOR COMPONENT FORMED USING THE STRESS COMPENSATION COMPOSITION
6208205	27-Mar-01	09/351168	12-Jul-99	AMPLIFIER CIRCUIT AND METHOD FOR REDUCING NOISE THEREIN
6498066	24-Dec-02	10/006273	04-Dec-01	ULTRA-LATE PROGRAMMING ROM AND METHOD OF MANUFACTURE
6355550	12-Mar-02	09/575846	19-May-00	ULTRA-LATE PROGRAMMING ROM AND METHOD OF MANUFACTURE
6307169	23-Oct-01	09/495664	01-Feb-00	MICRO-ELECTROMECHANICAL SWITCH
6144569	07-Nov-00	09/514800	29-Feb-00	SYSTEM AND METHOD FOR RECOVERING FROM A POWER SUPPLY INTERRUPTION
6133797	17-Oct-00	09/363221	30-Jul-99	SELF CALIBRATING VCO CORRECTION CIRCUIT AND METHOD OF OPERATION
6309908	30-Oct-01	09/469942	21-Dec-99	A PACKAGE FOR AN ELECTRONIC COMPONENT AND METHOD OF MAKING IT
6307452	23-Oct-01	09/397313	16-Sep-99	FOLDED SPRING BASED MICRO ELECTROMECHANICAL (MEM) RF SWITCH
6362089	26-Mar-02	09/294060	19-Apr-99	METHOD FOR PROCESSING A SEMICONDUCTOR SUBSTRATE HAVING A COPPER SURFACE DISPOSED THEREON AND STRUCTURE FORMED
6401545	11-Jun-02	09/490927	25-Jan-00	MICRO ELECTRO-MECHANICAL SYSTEM SENSOR WITH SELECTIVE ENCAPSULATION AND METHOD THEREFOR
6521961	18-Feb-03	09/560737	28-Apr-00	SEMICONDUCTOR DEVICE USING A BARRIER LAYER BETWEEN THE GATE ELECTRODE AND SUBSTRATE AND METHOD THEREFOR
6150881	21-Nov-00	09/317924	25-May-99	AMPLIFIER CIRCUIT WITH AMPLITUDE AND PHASE CORRECTION AND METHOD OF OPERATION
6383885	07-May-02	09/427824	27-Oct-99	BIPOLAR TRANSISTOR WITH IMPROVED REVERSE BREAKDOWN CHARACTERISTICS
6451127	17-Sep-02	09/323464	01-Jun-99	CONDUCTIVE PASTE AND SEMICONDUCTOR COMPONENT HAVING CONDUCTIVE BUMPS MADE FROM THE CONDUCTIVE PASTE
6669079	30-Dec-03	10/211631	02-Aug-02	CONDUCTIVE PASTE AND SEMICONDUCTOR COMPONENT HAVING CONDUCTIVE BUMMPS MADE FROM THE CONDUCTIVE PASTE
6465281	15-Oct-02	09/657393	08-Sep-00	METHOD OF MANUFACTURING A SEMICONDUCTOR WAFER LEVEL PACKAGE
6726826	27-Apr-04	10/011329	05-Nov-01	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND PLATING TOOL THEREFOR
6361675	26-Mar-02	09/451552	01-Dec-99	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND PLATING TOOL THEREFOR
6855965	15-Feb-05	10/007754	15-Nov-01	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT THEREOF
6368929	09-Apr-02	09/641002	17-Aug-00	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT


Patent No.	Grant Date	Appl No.	Appl Date	Title
				AND SEMICONDUCTOR COMPONENT THEREOF
6600344	29-Jul-03	09/605084	26-Jun-00	PREDISTORTION CIRCUIT FOR RF DETECTOR
6596465	22-Jul-03	09/414735	08-Oct-99	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT
6352192	05-Mar-02	09/515185	29-Feb-00	SYSTEM AND METHOD TO CONTROL SOLDER REFLOW FURNACE WITH WAFER SURFACE CHARACTERIZATION
6271106	07-Aug-01	09/430725	29-Oct-99	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT
6125147	26-Sep-00	09/127451	31-Jul-98	METHOD AND APPARATUS FOR REDUCING BREATING ARTIFACTS IN COMPRESSED VIDEO
6265917	24-Jul-01	09/425353	22-Oct-99	CIRCUIT AND METHOD FOR ALTERING THE FREQUENCY OF A SIGNAL
6307298	23-Oct-01	09/531697	20-Mar-00	ACTUATOR AND METHOD OF MANUFACTURE
6401536	11-Jun-02	09/502806	11-Feb-00	ACCELERATION SENSOR AND METHOD OF MANUFACTURE
6667500	23-Dec-03	10/126562	19-Apr-02	SEMICONDUCTOR DEVICE AND METHOD FOR PROTECTING SUCH DEVICE FROM A REVERSED DRAIN VOLTAGE
6413806	02-Jul-02	09/510814	23-Feb-00	SEMICONDUCTOR DEVICE AND METHOD FOR PROTECTING SUCH DEVICE FROM A REVERSED DRAIN VOLTAGE
6720635	13-Apr-04	09/466337	17-Dec-99	ELECTRONIC COMPONENT [AND METHOD OF MANUFACTURE]
6841736	11-Jan-05	10/256789	26-Sep-02	CURRENT-CARRYING ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING SAME
6453749	24-Sep-02	09/429099	28-Oct-99	PHYSICAL SENSOR COMPONENT
6813666	02-Nov-04	09/780720	12-Feb-01	SCALEABLE ARBITRATION AND PRIORITIZATION OF MULTIPLE INTERRUPTS
6373271	16-Apr-02	09/474438	29-Dec-99	SEMICONDUCTOR wafer FRONT SIDE PRESSURE TESTING SYSTEM AND METHOD THEREFOR
6327126	04-Dec-01	09/494055	28-Jan-00	ELECTROSTATIC DISCHARGE CIRCUIT
6231743	15-May-01	09/476811	03-Jan-00	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6423961	23-Jul-02	09/490238	24-Jan-00	PIXEL READOUT SWITCHED CAPACITOR BUFFER CIRCUIT AND METHOD THEREFOR
6313664	06-Nov-01	09/528857	20-Mar-00	LOAD CAPACITANCE COMPENSATED BUFFER AND METHOD THEREOF
6504246	07-Jan-03	09/415493	12-Oct-99	INTEGRATED CIRCUIT HAVING A BALANCED TWIST FOR DIFFERENTIAL SIGNAL LINES
6267641	31-Jul-01	09/574969	19-May-00	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND CHEMICAL-MECHANICAL POLISHING SYSTEM THEREFOR
6617920	09-Sep-03	10/123271	16-Apr-02	LINEAR ENVELOPE TRACKING RF POWER AMPLIFIER WITH ADAPTIVE ANALOG SIGNAL PROCESSING
6407634	18-Jun-02	09/595073	16-Jun-00	LINEAR ENVELOPE TRACKING RF POWER AMPLIFIER WITH ADAPTIVE ANALOG SIGNAL PROCESSING
6372622	16-Apr-02	09/426982	26-Oct-99	FINE PITCH BUMPING WITH IMPROVED DEVICE STANDOFF AND BUMP VOLUME
7169694	30-Jan-07	10/910036	03-Aug-04	METHOD FOR FORMING A BOND PAD INTERFACE
6803302	12-Oct-04	09/443443	22-Nov-99	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A MECHANICALLY ROBUST PAD INTERFACE
6479843	12-Nov-02	09/559791	27-Apr-00	SINGLE SUPPLY HFET WITH TEMPERATURE COMPENSATION
6294933	25-Sep-01	09/495355	01-Feb-00	METHOD AND APPARATUS FOR LOW POWER DIFFERENTIAL SIGNALING TO REDUCE POWER
6591093	08-Jul-03	09/426671	25-Oct-99	CIRCUIT AND METHOD FOR FREQUENCY TRANSLATION
6452284	17-Sep-02	09/599419	22-Jun-00	SEMICONDUCTOR DEVICE SUBSTRATE AND A PROCESS FOR ALTERING A SEMICONDUCTOR DEVICE
6625727	23-Sep-03	09/447253	23-Nov-99	APPARATUS AND METHOD FOR CONFIGURING A DATA PROCESSING SYSTEM BY RETRIEVING A CONFIGURATION VALUE FROM STORAGE DEVICE USING RESET VECTOR AND CONFIGURING PARAMETERS AFTER RESET
6665338	16-Dec-03	09/478024	05-Jan-00	CIRCUITRY FOR CONVERTING A SAMPLED DIGITAL SIGNAL TO A NATURALLY SAMPLED DIGITAL SIGNAL AND METHOD THEREFOR
6995482	07-Feb-06	10/828090	20-Apr-04	SWITCHING CIRCUIT AND METHOD THEREFOR
6475930	05-Nov-02	09/494478	31-Jan-00	UV CURE PROCESS AND TOOL FOR LOW K FILM FORMATION
6421744	16-Jul-02	09/426009	25-Oct-99	DIRECT MEMORY ACCESS CONTROLLER AND METHOD THEREFOR
6418489	09-Jul-02	09/488368	18-Jan-00	DIRECT MEMORY ACCESS CONTROLLER AND METHOD THEREFOR
6542940	01-Apr-03	09/488367	18-Jan-00	METHOD AND APPARATUS FOR CONTROLLING TASK EXECUTION IN A DIRECT MEMORY ACCESS CONTROLLER
6675235	06-Jan-04	09/488363	18-Jan-00	METHOD FOR AN EXECUTION UNIT INTERFACE PROTOCOL AND APPARATUS THEREFOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
6581086	17-Jun-03	09/488366	18-Jan-00	MULTIPLY AND ACCULULATE UNIT (MAC) AND METHOD THEREFOR
6332179	18-Dec-01	09/377636	19-Aug-99	ALLOCATION FOR BACK-TO-BACK MISSES IN A DIRECTORY BASED CACHE
6346469	12-Feb-02	09/476810	03-Jan-00	SEMICONDUCTOR DEVICE AND A PROCESS FOR FORMING THE SEMICONDUCTOR DEVICE
7254766	07-Aug-07	11/093520	30-Mar-05	DISCRETE MULTI-TONE (DMT) SYSTEM AND METHOD THAT COMMUNICATES A DATA PUMP DATA STREAM BETWEEN A GENERAL PURPOSE CPU AND A DSP VIA A BUFFERING SCHEME
6892339	10-May-05	09/398707	20-Sep-99	DISCRETE MULTI-TONE (DMT) SYSTEM AND METHOD THAT COMMUNICATES A DATA PUMP DATA STREAM BETWEEN A GENERAL PURPOSE CPU AND A DSP VIA A BUFFERING SCHEME
6528377	04-Mar-03	09/501950	10-Feb-00	SEMICONDUCTOR SUBSTRATE AND METHOD FOR PREPARING THE SAME
6440805	27-Aug-02	09/516970	29-Feb-00	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH ISOLATION AND WELL REGIONS
6646844	11-Nov-03	09/461909	15-Dec-99	APPARATUS FOR POWER-ON DISABLE IN A MULTIPLE POWER SUPPLY SYSTEM AND A METHOD THEREFOR
6813762	02-Nov-04	09/507910	22-Feb-00	METHOD FOR PROCESSING PROGRAM FILES in a programming language capable of dynamic loading
6479310	12-Nov-02	09/476807	03-Jan-00	METHOD [AND APPARATUS] FOR TESTING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
6480998	12-Nov-02	09/551322	18-Apr-00	ITERATIVE, NOISE SENSITIVE METHOD OF ROUTING SEMICONDUCTOR NETS using a delay noise threshold
6664200	16-Dec-03	09/560974	28-Apr-00	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND POLYIMIDE ETCHANT THEREOF
6376349	23-Apr-02	09/487472	19-Jan-00	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE AND A CONDUCTIVE STRUCTURE
6348820	19-Feb-02	09/617903	17-Jul-00	HIGH-SIDE, LOW-SIDE CONFIGURABLE DRIVER
6475925	05-Nov-02	09/546366	10-Apr-00	REDUCED WATER ADSORPTION FOR INTERLAYER DIELECTRIC
6411758	25-Jun-02	09/494457	31-Jan-00	METHOD AND APPARATUS FOR ALIGNING A WAVEGUIDE TO A DEVICE
6414613	02-Jul-02	09/478013	05-Jan-00	APPARATUS FOR NOISESHAPING A PULSE WIDTH MODULATION (PWM) SIGNAL AND METHOD THEREFOR
6845419	18-Jan-05	09/490132	24-Jan-00	FLEXIBLE INTERRUPT CONTROLLER THAT INCLUDES AN INTERRUPT FORCE REGISTER
6769076	27-Jul-04	09/498812	07-Feb-00	REAL-TIME PROCESSOR DEBUG SYSTEM
6522195	18-Feb-03	09/732161	07-Dec-00	LOW NOISE AMPLIFIER BYPASS CIRCUITRY
6606017	12-Aug-03	09/652614	31-Aug-00	SWITCHABLE AND TUNABLE COPLANAR WAVEGUIDE FILTERS
6369742	09-Apr-02	09/704025	01-Nov-00	SELECTIVE OVER-RANGING IN FOLDING AND AVERAGING INTEGRATED CIRCUITS
6528405	04-Mar-03	09/506844	18-Feb-00	ENHANCEMENT MODE RF DEVICE AND FABRICATION METHOD
6249170	19-Jun-01	09/549835	14-Apr-00	LOGARITHMIC GAIN CONTROL CIRCUIT AND METHOD
6385021	07-May-02	09/546601	10-Apr-00	ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT
6245686	12-Jun-01	09/586828	05-Jun-00	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE AND A PROCESS FOR OPERATING AN APPARATUS
6665527	16-Dec-03	09/726926	30-Nov-00	DOUBLE BALANCED MIXER CIRCUIT
6441449	27-Aug-02	09/981014	16-Oct-01	MEMS VARIABLE CAPACITOR WITH STABILIZED ELECTROSTATIC DRIVE AND METHOD THEREFOR
6362018	26-Mar-02	09/496930	02-Feb-00	Method for fabricating MEMS VARIABLE CAPACITOR WITH STABILIZED ELECTROSTATIC DRIVE [AND METHOD THEREFOR]
6429103	06-Aug-02	09/548791	13-Apr-00	MOCVD-GROWN EMODE HIGFET BUFFER
6413819	02-Jul-02	09/595821	16-Jun-00	MEMORY DEVICE AND METHOD FOR USING PREFABRICATED ISOLATED STORAGE ELEMENTS
6496233	17-Dec-02	09/449893	30-Nov-99	COMMAND AND CONTROL ARCHITECTURE FOR A VIDEO DECODER AND AN AUDIO DECODER
6516376	04-Feb-03	09/449897	30-Nov-99	COMMAND AND CONTROL ARCHITECTURE FOR A VIDEO DECODER AND A HOST
6792502	14-Sep-04	09/689028	12-Oct-00	A MICROPROCESSOR HAVING A CONTENT ADDRESSABLE MEMORY (CAM) DEVICE AS A FUNCTIONAL UNIT THEREIN AND METHOD OF OPERATION
6823224	23-Nov-04	09/788816	21-Feb-01	DATA PROCESSING SYSTEM HAVING AN ON-CHIP BACKGROUND DEBUG SYSTEM AND METHOD THEREFOR
7647472	12-Jan-10	11/510545	25-Aug-06	DIGITAL COMMUNICATIONS PROCESSOR High speed and high


Patent No.	Grant Date	Appl No.	Appl Date	Title
				throughput digital communications processor with efficient cooperation between programmable processing components
7100020	29-Aug-06	09/674864	07-May-99	DIGITAL COMMUNICATIONS PROCESSOR
6598192	22-Jul-03	09/513867	28-Feb-00	METHOD AND APPARATUS FOR TESTING AN INTEGRATED CIRCUIT
6541794	01-Apr-03	09/652643	31-Aug-00	IMAGING DEVICE AND METHOD
6477477	05-Nov-02	09/592524	12-Jun-00	EXTENDED BASE BAND MULTICARRIER SYSTEM
6810266	26-Oct-04	09/441330	16-Nov-99	DIGITALLY CONTROLLED RADIO BACK-END
6473605	29-Oct-02	09/440999	16-Nov-99	NOISE REDUCTION AND RANGE CONTROL[ FOR AN AM/FM DUAL] RADIO SYSTEM
6473606	29-Oct-02	09/441249	16-Nov-99	COMMON INTERMEDIATE FREQUENCY BROADCAST RADIO FRONT END
6424825	23-Jul-02	09/441022	16-Nov-99	FEEDFORWARD AND FEEDBACK CONTROL IN A RADIO
6577851	10-Jun-03	09/441024	16-Nov-99	IMPULSE NOISE BLANKER
7142669	28-Nov-06	09/725821	29-Nov-00	CIRCUIT FOR GENERATING HASH VALUES
6300884	09-Oct-01	09/633949	08-Aug-00	METHOD FOR DECODING A QUADRATURE ENCODED SIGNAL
6459156	01-Oct-02	09/470873	22-Dec-99	SEMICONDUCTOR DEVICE, A PROCESS FOR A SEMICONDUCTOR DEVICE, AND A PROCESS FOR MAKING A MASKING DATABASE
6218200	17-Apr-01	09/616152	14-Jul-00	MULTI-LAYER REGISTRATION CONTROL FOR PHOTOLITHOGRAPHY PROCESSES
6795908	21-Sep-04	09/591938	12-Jun-00	METHOD AND APPARATUS FOR INSTRUCTION EXECUTION IN A DATA PROCESSING SYSTEM
6748558	08-Jun-04	09/567973	10-May-00	PERFORMANCE MONITOR SYSTEM AND METHOD SUITABLE FOR USE IN AN INTEGRATED CIRCUIT
6307782	23-Oct-01	09/542017	03-Apr-00	PROCESS FOR OPERATING A SEMICONDUCTOR DEVICE
6287960	11-Sep-01	09/566500	08-May-00	SELF ALIGNED INLAID PATTERNING AND ETCHING
6404283	24-May-02	09/639126	18-Aug-00	METHOD AND APPARATUS FOR AMPLIFYING A RADIO FREQUENCY SIGNAL
6346880	12-Feb-02	09/468417	20-Dec-99	CIRCUIT AND METHOD FOR CONTROLLING AN ALARM
6465320	15-Oct-02	09/595090	16-Jun-00	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING
6459325	01-Oct-02	09/832149	11-Apr-01	OUTPUT BUFFER HAVING A PRE-DRIVER TRANSITION CONTROLLER
6754752	22-Jun-04	09/758856	11-Jan-01	MULTIPLE MEMORY COHERENCE GROUPS IN A SINGLE SYSTEM AND METHOD THEREFOR
6297095	02-Oct-01	09/596399	16-Jun-00	MEMORY DEVICE THAT INCLUDES PASSIVATED NANOCLUSTERS AND METHOD FOR MANUFACTURE
6760864	6760864	09/788815	21-Feb-01	DATA PROCESSING SYSTEM WITH ON-CHIP FIFO FOR STORING DEBUG INFORMATION AND METHOD THEREFOR
6429531	06-Aug-02	09/551312	18-Apr-00	METHOD AND APPARATUS FOR MANUFACTURING AN INTERCONNECT STRUCTURE
6591378	08-Jul-03	09/507740	22-Feb-00	DEBUG CONTROLLER IN A DATA PROCESSOR AND METHOD THEREFOR
6823070	23-Nov-04	09/536520	28-Mar-00	METHOD FOR KEY ESCROW IN A COMMUNICATION SYSTEM AND APPARATUS THEREFOR
6507475	14-Jan-03	09/604626	27-Jun-00	CAPACITIVE DEVICE AND METHOD OF MANUFACTURE
6344403	05-Feb-02	09/595735	16-Jun-00	MEMORY DEVICE AND METHOD FOR MANUFACTURE
6300202	09-Oct-01	09/574732	18-May-00	SELECTIVE REMOVAL OF A METAL OXIDE DIELECTRIC
6432779	13-Aug-02	09/772632	30-Jan-01	SELECTIVE REMOVAL OF A METAL OXIDE DIELECTRIC
6362071	26-Mar-02	09/542706	05-Apr-00	METHOD FOR FORMING A SEMICONDUCTOR DEVICE WITH AN OPENING IN A DIELECTRIC LAYER
6300234	09-Oct-01	09/602099	26-Jun-00	PROCESS FOR FORMING AN ELECTRICAL DEVICE
6500724	31-Dec-02	09/642680	21-Aug-00	METHOD OF MAKING SEMICONDUCTOR DEVICE HAVING PASSIVE ELEMENTS INCLUDING FORMING CAPACITOR ELECTRODE AND RESISTOR FROM SAME LAYER OF MATERIA
6825092	30-Nov-04	10/243587	13-Sep-02	SEMICONDUCTOR DEVICE HAVING PASSIVE ELEMENTS AND METHOD OF MAKING SAME
6516666	11-Feb-03	09/665332	19-Sep-00	YAW RATE MOTION SENSOR
6725346	20-Apr-04	09/542747	04-Apr-00	METHOD AND APPARATUS FOR OVERLAYING MEMORY IN A DATA PROCESSING SYSTEM
6532559	11-Mar-03	09/491433	26-Jan-00	METHOD AND APPARATUS FOR TESTING AN INTEGRATED CIRCUIT
6489083	03-Dec-02	09/677496	02-Oct-00	SELECTIVE SIZING OF FEATURES TO COMPENSATE FOR RESIST THICKNESS VARITATIONS IN SEMICONDUCTOR DEVICES
6383873	07-May-02	09/575204	18-May-00	PROCESS FOR FORMING A STRUCTURE


Patent No.	Grant Date	Appl No.	Appl Date	Title
6743668	01-Jun-04	10/425242	29-Apr-03	PROCESS FOR FORMING A METAL OXY-NITRIDE DIELECTRIC LAYER BY VARYING THE FLOW RATE OF NITROGEN INTO THE CHAMBER
6576967	10-Jun-03	09/663919	18-Sep-00	SEMICONDUCTOR STRUCTURE AND PROCESS FOR FORMING A METAL OXY-NITRIDE DIELECTRIC LAYER
6821829	23-Nov-04	09/592349	12-Jun-00	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT AND SEMICONDUCTOR COMPONENT THEREOF
6475841	05-Nov-02	09/584963	02-Jun-00	TRANSISTOR WITH SHAPED GATE ELECTRODE AND METHOD THEREFOR
6323704	27-Nov-01	09/633948	08-Aug-00	MULTIPLE VOLTAGE COMPATIBLE I/O BUFFER
6524967	25-Feb-03	09/630083	01-Aug-00	METHOD FOR INCORPORATING NITROGEN INTO A DIELECTRIC LAYER USING A SPECIAL PRECURSOR
6240024	29-May-01	09/546022	10-Apr-00	METHOD AND APPARATUS FOR GENERATING AN ECHO CLOCK IN A MEMORY
6303978	16-Oct-01	09/627029	27-Jul-00	OPTICAL SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
6433568	13-Aug-02	09/588918	08-Jun-00	MASSIVE PARALLEL SEMICONDUCTOR MANUFACTURING TEST PROCESS
6429046	06-Aug-02	09/615865	13-Jul-00	FLIP CHIP DEVICE AND METHOD OF MANUFACTURE
6573160	03-Jun-03	09/578404	26-May-00	METHOD [AND APPARATUS FOR FORMING A SEMICONDUCTOR DEVICE UTILIZING A LOW TEMPERATURE PROCESS] of recrystallizing an amorphous region of a semiconductor
6757852	29-Jun-04	09/610028	05-Jul-00	SELF RESETTING HIGH SPEED REDUNDANCY CIRCUIT AND METHOD THEREFOR
6751724	15-Jun-04	09/552118	19-Apr-00	METHOD AND APPARATUS FOR INSTRUCTION FETCHING
6859875	22-Feb-05	09/592449	12-Jun-00	PROCESSOR HAVING SELECTIVE BRANCH PREDICTION
6766431	20-Jul-04	09/594411	16-Jun-00	DATA PROCESSING SYSTEM AND METHOD FOR A SECTOR CACHE
6799153	28-Sep-04	09/553271	20-Apr-00	CROSS COUPLING DELAY CHARACTERIZATION FOR INTEGRATED CIRCUITS
6545324	08-Apr-03	10/151371	20-May-02	DUAL METAL GATE TRANSISTORS FOR CMOS PROCESS
6794281	21-Sep-04	10/238314	10-Sep-02	DUAL METAL GATE TRANSISTORS FOR CMOS PROCESS
6444512	03-Sep-02	09/592448	12-Jun-00	DUAL METAL GATE TRANSISTORS FOR CMOS PROCESS
6581140	17-Jun-03	09/609749	03-Jul-00	METHOD AND APPARATUS FOR IMPROVING ACCESS TIME IN SET-ASSOCIATIVE CACHE SYSTEMS
6184072	06-Feb-01	09/571588	17-May-00	PROCESS FOR FORMING A HIGH-K GATE DIELECTRIC
6310403	30-Oct-01	09/652620	31-Aug-00	METHOD OF MANUFACTURING COMPONENTS AND COMPONENT THEREOF
6492874	10-Dec-02	09/918015	30-Jul-01	ACTIVE BIAS CIRCUIT
6314023	06-Nov-01	09/594504	15-Jun-00	NON-VOLATILE PROGRAMMING ELEMENTS FOR REDUNDANCY AND IDENTIFICATION IN AN INTEGRATED CIRCUIT
6518634	11-Feb-03	09/654704	01-Sep-00	STRONTIUM NITRIDE OR STRONTIUM OXYNITRIDE GATE DIELECTRIC
6476623	05-Nov-02	09/666759	21-Sep-00	PERCENT BACKSPUTTERING AS A CONTROL PARAMETER FOR METALLIZATION
6551869	22-Apr-03	09/590461	09-Jun-00	LATERAL PNP AND METHOD OF MANUFACTURE
6525501	25-Feb-03	09/580292	26-May-00	METHOD AND APPARATUS FOR ACCELERATING COMMUNICATION BETWEEN CONTROLLABLE DEVICES
7269090	11-Sep-07	09/772830	30-Jan-01	MEMORY ACCESS WITH CONSECUTIVE ADDRESSES CORRESPONDING TO DIFFERENT ROWS
6798064	28-Sep-04	09/614794	12-Jul-00	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
6500750	31-Dec-02	09/609523	03-Jul-00	SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6346832	12-Feb-02	09/575257	22-May-00	MULTI-CHANNEL SIGNALING
6477898	12-Nov-02	09/610501	06-Jul-00	MEMBRANE MASK STRESS MEASUREMENT APPARATUS AND METHOD THEREFOR
6400610	04-Jun-02	09/610078	05-Jul-00	MEMORY DEVICE INCLUDING ISOLATED STORAGE ELEMENTS THAT UTILIZE HOLE CONDUCTION AND METHOD THEREFOR
6689680	10-Feb-04	09/905756	14-Jul-01	SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6751759	15-Jun-04	09/706089	03-Nov-00	METHOD AND APPARATUS FOR PIPELINE HAZARD DETECTION
6691284	10-Feb-04	10/128802	24-Apr-02	METHOD FOR CREATING A CHARACTERIZED DIGITAL LIBRARY FOR A DIGITAL CIRCUIT DESIGN
6528849	04-Mar-03	09/652813	31-Aug-00	DUAL-GATE RESURF SUPERJUNCTION LATERAL DMOSFET
6750524	15-Jun-04	10/145524	14-May-02	TRENCH MOS RESURF SUPER-JUNCTION DEVICES


Patent No.	Grant Date	Appl No.	Appl Date	Title
6517698	11-Feb-03	09/680871	06-Oct-00	SYSTEM AND METHOD FOR PROVIDING ROTATION TO PLATING FLOW
6811714	02-Nov-04	09/680777	06-Oct-00	MICROMACHINED COMPONENT AND METHOD OF MANUFACTURE
6461925	08-Oct-02	09/539130	30-Mar-00	METHOD OF MANUFACTURING A HETEROJUNCTION BICMOS INTEGRATED CIRCUIT
6834216	21-Dec-04	10/022013	13-Dec-01	METHOD AND APPARATUS FOR THE AUTOMATIC SYNCHRONIZATION OF DYNAMIC ANGULAR AND TIME DOMAIN CONTROL SYSTEMS
6406976	18-Jun-02	09/664510	18-Sep-00	SEMICONDUCTOR DEVICE AND PROCESS FOR FORMING THE SAME
6772370	03-Aug-04	09/706090	03-Nov-00	METHOD AND APPARATUS FOR GENERATION OF PIPELINE HAZARD TEST SEQUENCES
7181627	20-Feb-07	10/210441	01-Aug-02	BIOMETRIC SYSTEM FOR REPLACING PASSWORD OR PIN TERMINALS
6420208	16-Jul-02	09/662079	14-Sep-00	Method of forming AN ALTERNATIVE GROUND CONTACT FOR A SEMICONDUCTOR DIE
6770929	03-Aug-04	10/004507	02-Nov-01	METHOD FOR UNIFORM POLISH IN MICROELECTRONIC DEVICE
6358816	19-Mar-02	09/655149	05-Sep-00	METHOD FOR UNIFORM POLISH IN MICROELECTRONIC DEVICE
7171346	30-Jan-07	09/654253	01-Sep-00	MISMATCH MODELING TOOL
6441688	27-Aug-02	09/641990	18-Aug-00	SINGLE-TO-DIFFERENTIAL BUFFER AMPLIFIER
6449195	10-Sep-02	09/677697	28-Sep-00	METHOD AND APPARATUS FOR COUPLING NOISE REDUCTION IN A SEMICONDUCTOR DEVICE
6914935	05-Jul-05	09/790445	21-Feb-01	FRACTIONAL N SYNTHESIZER WITH REDUCED FRACTIONALIZATION SPURS
6614062	02-Sep-03	09/761885	17-Jan-01	SEMICONDUCTOR TILING STRUCTURE AND METHOD OF FORMATION
6630725	07-Oct-03	09/684576	06-Oct-00	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURE
6913941	05-Jul-05	10/238062	09-Sep-02	SOI POLYSILICON TRENCH REFILL PERIMETER OXIDE ANCHOR SCHEME
6544810	08-Apr-03	09/652615	31-Aug-00	CAPACITIVELY SENSED MICROMACHINED COMPONENT AND METHOD OF MANUFACTURING
6763150	13-Jul-04	09/649927	29-Aug-00	IMAGE PROCESSING SYSTEM WITH MULTIPLE PROCESSING UNITS
6573562	03-Jun-03	10/004186	31-Oct-01	SEMICONDUCTOR COMPONENT AND METHOD OF OPERATION
6760865	06-Jul-04	09/859324	16-May-01	MULTIPLE LEVEL BUILT-IN SELF-TEST CONTROLLER AND METHOD THEREFOR
6347056	12-Feb-02	09/859333	16-May-01	RECORDING OF RESULT INFORMATION IN A BUILT-IN SELF-TEST CIRCUIT AND METHOD THEREFOR
6490225	03-Dec-02	10/004721	04-Dec-01	MEMORY HAVING A SYNCHRONOUS CONTROLLER AND ASYNCHRONOUS ARRAY AND METHOD THEREOF
7113430	26-Sep-06	10/158991	31-May-02	DEVICE FOR REDUCING [THE EFFECTS OF LEAKAGE CURRENT WITHIN ELECTRONIC DEVICES] sub-threshold leakage current within a high voltage driver
7124281	17-Oct-06	09/667122	21-Sep-00	PROCESSING SYSTEM HAVING SEQUENTIAL ADDRESS INDICATOR SIGNALS
6554004	29-Apr-03	09/707595	07-Nov-00	METHOD FOR REMOVING ETCH RESIDUE RESULTING FROM A PROCESS FOR FORMING A VIA
6760386	06-Jul-04	09/916915	27-Jul-01	RECEIVER AND METHOD THEREFOR
6751264	15-Jun-04	09/916684	27-Jul-01	RECEIVER AND METHOD THEREFOR
6904446	07-Jun-05	09/939244	24-Aug-01	FLOATING POINT MULTIPLIER/ACCUMULATOR WITH REDUCED LATENCY AND METHOD THEREOF
7080191	18-Jul-06	10/034834	27-Dec-01	METHOD AND SYSTEM FOR ACCESSING MEMORY DEVICES
6889427	10-May-05	10/077538	15-Feb-02	PROCESS [AND APPARATUS] FOR DISENGAGING SEMICONDUCTOR DIE FROM AN ADHESIVE FILM
6503814	07-Jan-03	09/765740	19-Jan-01	METHOD FOR FORMING TRENCH ISOLATION
7447886	04-Nov-08	10/127087	22-Apr-02	SYSTEM FOR EXPANDED INSTRUCTION ENCODING AND METHOD THEREOF
6999627	14-Feb-06	10/025290	19-Dec-01	DETERMINISTIC PREDICTION IN AN IMAGE PROCESSING SYSTEM
6617214	09-Sep-03	09/839663	23-Apr-01	INTEGRATED CIRCUIT STRUCTURE AND METHOD THEREFORE
6842888	11-Jan-05	10/127910	23-Apr-02	METHOD AND APPARATUS FOR HIERARCHICALLY RESTRUCTURING PORTIONS OF A HIERARCHICAL DATABASE BASED ON SELECTED ATTRIBUTES
6650092	18-Nov-03	10/155316	24-May-02	SYSTEM AND METHOD FOR REGULATING A POWER SYSTEM WITH FEEDBACK USING CURRENT SENSING
6465853	15-Oct-02	09/851206	08-May-01	METHOD FOR MAKING A SEMICONDUCTOR DEVICE


Patent No.	Grant Date	Appl No.	Appl Date	Title
6819538	16-Nov-04	09/858126	15-May-01	METHOD AND APPARATUS FOR CONTROLLING CURRENT DEMAND IN AN INTEGRATED CIRCUIT
7074681	11-Jul-06	10/614553	07-Jul-03	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING
6518106	11-Feb-03	09/865855	26-May-01	SEMICONDUCTOR DEVICE AND A METHOD THEREFOR
6348386	19-Feb-02	09/836668	16-Apr-01	METHOD FOR MAKING A HAFNIUM-BASED INSULATING FILM
6785326	31-Aug-04	09/632890	07-Aug-00	METHOD AND APPARATUS FOR DETECTING AND COMPENSATING DIGITAL LOSSES IN A COMMUNICATIONS NETWORK
6592434	15-Jul-03	09/714523	16-Nov-00	WAFER CARRIER AND METHOD OF MATERIAL REMOVAL FROM A SEMICONDUCTOR WAFER
6535157	18-Mar-03	09/949245	07-Sep-01	LOW POWER CYCLIC A/D CONVERTER
6448192	10-Sep-02	09/835770	16-Apr-01	METHOD FOR FORMING A HIGH DIELECTRIC CONSTANT MATERIAL
6762706	13-Jul-04	10/171005	12-Jun-02	REDUCED POWER ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF
6541280	01-Apr-03	09/811656	20-Mar-01	HIGH DIELECTRIC FILM
6770923	03-Aug-04	10/099794	15-Mar-02	HIGH K DIELECTRIC FILM
6747332	08-Jun-04	10/114784	01-Apr-02	SEMICONDUCTOR COMPONENT HAVING HIGH VOLTAGE MOSFET AND METHOD OF MANUFACTURE
6444545	03-Sep-02	09/740249	19-Dec-00	DEVICE STRUCTURE FOR STORING CHARGE AND METHOD THEREFORE
7228401	05-Jun-07	10/054577	13-Nov-01	INTERFACING A PROCESSOR TO A COPROCESSOR IN WHICH THE PROCESSOR SELECTIVELY broadcasts to or ALTERS AN EXECUTION MODE OF THE COPROCESSOR
6574707	03-Jun-03	09/849704	07-May-01	MEMORY INTERFACE PROTOCOL USING TWO ADDRESSING MODES AND METHOD OF OPERATION
7539878	26-May-09	09/956300	19-Sep-01	CPU POWERDOWN METHOD AND APPARATUS THEREFOR
6795191	21-Sep-04	10/038983	04-Jan-02	ULTRASONICALLY ASSISTED OPTICAL MEDIA SENSOR SYSTEM
6552436	22-Apr-03	09/733170	08-Dec-00	SEMICONDUCTOR DEVICE HAVING A BALL GRID ARRAY AND METHOD THEREFOR
6621438	16-Sep-03	10/135782	30-Apr-02	[METHOD AND APPARATUS FOR CONVERTING DIGITAL-TO-ANALOG SIGNALS] Digital-to-analog conversion with current path exchange during clock phases
6594422	15-Jul-03	09/846087	02-May-01	OPTO-COUPLING DEVICE STRUCTURE AND METHOD THEREFOR
6645678	11-Nov-03	09/727666	01-Dec-00	METHOD AND APPARATUS FOR MAKING AN INTEGRATED CIRCUIT USING POLARIZATION PROPERTIES OF LIGHT
6741194	25-May-04	10/328360	23-Dec-02	METHODS AND APPARATUS FOR DETECTING OUT-OF-RANGE SIGNALS IN AN ANALOG-TO-DIGITAL CONVERTER
7043017	09-May-06	09/953665	13-Sep-01	KEY STREAM CIPHER DEVICE
6952812	04-Oct-05	09/781492	13-Feb-01	DESIGN ANALYSIS TOOL FOR PATH EXTRACTION AND FALSE PATH IDENTIFICATION AND METHOD THEREOF
6621351	16-Sep-03	09/935948	23-Aug-01	RF AMPLIFIER AND METHOD THEREFOR
6744117	01-Jun-04	10/086061	28-Feb-02	HIGH FREQUENCY SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
6790727	14-Sep-04	10/348267	21-Jan-03	INTEGRATION OF TWO MEMORY TYPES ON THE SAME INTEGRATED CIRCUIT
6531731	11-Mar-03	09/881332	15-Jun-01	INTEGRATION OF TWO MEMORY TYPES ON THE SAME INTEGRATED CIRCUIT
6465297	15-Oct-02	09/679861	05-Oct-00	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT [AND SEMICONDUCTOR COMPONENT THEREOF] having a capacitor
6775727	10-Aug-04	09/888278	23-Jun-01	SYSTEM AND METHOD FOR CONTROLLING BUS ARBITRATION DURING CACHE MEMORY BURST CYCLES
6865667	08-Mar-05	09/798390	05-Mar-01	DATA PROCESSING SYSTEM HAVING REDIRECTING CIRCUITRY AND METHOD THEREOF
6928409	09-Aug-05	09/871063	31-May-01	SPEECH RECOGNITION USING POLYNOMIAL EXPANSION AND HIDDEN MARKOV MODELS
7208390	24-Apr-07	10/045913	09-Jan-02	SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING
6740544	25-May-04	10/145503	14-May-02	SOLDER COMPOSITIONS FOR ATTACHING A DIE TO A SUBSTRATE
6794101	21-Sep-04	10/159909	31-May-02	MICRO-ELECTRO-MECHANICAL DEVICE AND METHOD OF MAKING
6766433	20-Jul-04	09/957780	21-Sep-01	SYSTEM HAVING USER PROGRAMMABLE ADDRESSING MODES AND METHOD THEREFOR
6803248	12-Oct-04	10/029093	21-Dec-01	A CHEMISTRY FOR ETCHING QUATERNARY INTERFACE LAYERS ON InGaAsP MOSTLY FORMED BETWEEN GaAs AND InxGa(1-x) P LAYERS


Patent No.	Grant Date	Appl No.	Appl Date	Title
6646347	11-Nov-03	09/998507	30-Nov-01	SEMICONDUCTOR POWER DEVICE AND METHOD OF FORMATION
6888246	03-May-05	10/447457	29-May-03	SEMICONDUCTOR POWER DEVICE WITH SHEAR STRESS COMPENSATION
6844588	18-Jan-05	10/025292	19-Dec-01	NON-VOLATILE MEMORY [AND METHOD OF FORMING THEREOF]
6717269	06-Apr-04	10/350852	24-Jan-03	[DIELECTRIC BETWEEN METAL STRUCTURES AND METHOD THEREFOR] Integrated circuit device having sidewall spacers along conductors
6583043	24-Jun-03	09/918429	27-Jul-01	DIELECTRIC BETWEEN METAL STRUCTURES AND METHOD THEREFOR
6857063	15-Feb-05	09/779886	09-Feb-01	DATA PROCESSOR AND METHOD OF OPERATION
6369647	09-Apr-02	09/746286	21-Dec-00	DEMODULATOR CIRCUIT AND METHOD OF TUNING
7047174	16-May-06	09/847487	02-May-01	METHOD FOR PRODUCING TEST PATTERNS FOR TESTING AN INTEGRATED CIRCUIT
6633716	14-Oct-03	09/846086	02-May-01	OPTICAL DEVICE AND METHOD THEREFOR
6759675	06-Jul-04	09/994182	26-Nov-01	OPTICAL DEVICE AND METHOD THEREFOR
6656761	02-Dec-03	09/990977	21-Nov-01	METHOD FOR FORMING A SEMICONDUCTOR DEVICE FOR DETECTING LIGHT
6834086	21-Dec-04	09/746278	21-Dec-00	[PHASE DETECTOR] Demodulator and method for second harmonic cancellation AND METHOD FOR SECOND HARMONIC CANCELLATION
7432547	07-Oct-08	10/779004	13-Feb-04	NON-VOLATILE MEMORY DEVICE WITH IMPROVED DATA RETENTION AND METHOD THEREFOR
6965653	15-Nov-05	09/746277	21-Dec-00	CIRCUIT AND METHOD FOR PROCESSING AN AUTOMATIC FREQUENCY CONTROL SIGNAL
6844221	18-Jan-05	10/821749	09-Apr-04	Method of manufacturing a WIRE BOND-LESS ELECTRONIC COMPONENT FOR USE WITH AN EXTERNAL CIRCUIT [AND METHOD OF MANUFACTURE]
6724079	20-Apr-04	10/039800	04-Jan-02	WIRE BOND-LESS ELECTRONIC COMPONENT FOR USE WITH AN EXTERNAL CIRCUIT AND METHOD OF MANUFACTURE
6611045	26-Aug-03	09/873810	04-Jun-01	METHOD OF FORMING AN INTEGRATED CIRCUIT DEVICE USING DUMMY FEATURES AND STRUCTURE THEREOF
6765396	20-Jul-04	10/116179	04-Apr-02	METHOD, APPARATUS AND SOFTWARE FOR TESTING A DEVICE INCLUDING BOTH ELECTRICAL AND OPTICAL PORTIONS
6658245	02-Dec-03	09/818337	28-Mar-01	RADIO RECEIVER HAVING A DYNAMIC BANDWIDTH FILTER AND METHOD THEREFOR
6868129	15-Mar-05	09/803750	12-Mar-01	DEMODULATOR FOR A RADIO RECEIVER AND METHOD OF OPERATION
6906302	14-Jun-05	10/208212	30-Jul-02	Photodetector [PIXEL] SENSOR CIRCUIT DEVICE AND METHOD THEREOF
6931611	16-Aug-05	10/025289	19-Dec-01	DESIGN VERIFICATION SYSTEM FOR AVOIDING FALSE FAILURES AND METHOD THEREFOR
6500723	31-Dec-02	09/972397	05-Oct-01	METHOD FOR FORMING A WELL UNDER ISOLATION AND STRUCTURE THEREOF
7023981	04-Apr-06	10/041336	08-Jan-02	METHOD AND APPARATUS FOR SIGNAL DETECTION
6531384	11-Mar-03	09/952527	14-Sep-01	METHOD OF FORMING A BOND PAD AND STRUCTURE THEREOF
6777662	17-Aug-04	10/208217	30-Jul-02	SYSTEM, CIRCUIT AND METHOD PROVIDING A DYNAMIC RANGE PIXEL CELL WITH BLOOMING PROTECTION
6551922	22-Apr-03	10/091629	06-Mar-02	METHOD FOR MAKING A SEMICONDUCTOR DEVICE BY VARIABLE CHEMICAL MECHANICAL POLISH DOWNFORCE
6779055	17-Aug-04	09/885574	20-Jun-01	FIRST-IN FIRST-OUT MEMORY SYSTEM having both simultaneous and alternating data access AND METHOD THEREOF
6959014	25-Oct-05	09/773806	01-Feb-01	METHOD AND APPARATUS FOR OPERATING A COMMUNICATION BUS
6472243	29-Oct-02	09/734473	11-Dec-00	METHOD OF FORMING AN INTEGRATED CMOS CAPACITIVE PRESSURE SENSOR
6606044	12-Aug-03	10/034909	02-Jan-02	METHOD AND APPARATUS FOR GENERATING A PULSE WIDTH MODULATED SIGNAL
6893947	17-May-05	10/179769	25-Jun-02	ADVANCED RF ENHANCEMENT-MODE FETS WITH IMPROVED GATE PROPERTIES
7102669	05-Sep-06	10/115176	02-Apr-02	DIGITAL COLOR IMAGE PRE-PROCESSING
6995791	07-Feb-06	10/115465	02-Apr-02	AUTOMATIC WHITE BALANCE FOR DIGITAL IMAGING
6586160	01-Jul-03	09/817408	26-Mar-01	METHOD FOR PATTERNING RESIST
6496556	17-Dec-02	10/047189	15-Jan-02	STEP-DOWN CLOCK CONTROL AND METHOD FOR IMPROVING CONVERGENCE FOR A DIGITALLY CONTROLLED SELF-CALIBRATING VCO
6916682	12-Jul-05	10/008800	08-Nov-01	SEMICONDUCTOR PACKAGE DEVICE FOR USE WITH MULTIPLE


Patent No.	Grant Date	Appl No.	Appl Date	Title
				INTEGRATED CIRCUITS IN A STACKED CONFIGURATION AND METHOD OF FORMATION AND TESTING
6769319	03-Aug-04	09/901366	09-Jul-01	COMPONENT HAVING A FILTER
6978392	20-Dec-05	10/044563	11-Jan-02	ENABLE PROPAGATION CONTROLLER
6545310	08-Apr-03	09/845117	30-Apr-01	NON-VOLATILE MEMORY WITH A SERIAL TRANSISTOR STRUCTURE WITH ISOLATED WELL AND METHOD OF OPERATION
6959035	25-Oct-05	10/033513	26-Dec-01	POST CORRELATION INTERPOLATION FOR DELAY LOCKED LOOPS
6555915	29-Apr-03	09/986232	22-Oct-01	INTEGRATED CIRCUIT HAVING INTERCONNECT TO A SUBSTRATE AND METHOD THEREFOR
6701476	02-Mar-04	09/870205	29-May-01	TEST ACCESS MECHANISM FOR SUPPORTING A CONFIGURABLE BUILT-IN SELF-TEST CIRCUIT AND METHOD THEREOF
7075473	11-Jul-06	10/135789	30-Apr-02	SYSTEM AND APPARATUS FOR REDUCING THE EFFECTS OF CIRCUIT MISMATCH IN ANALOG-TO-DIGITAL CONVERTERS
6864758	08-Mar-05	10/135644	30-Apr-02	APPARATUS AND RESONANT CIRCUIT EMPLOYING A VARACTOR DIODE IN PARALLEL WITH A TRANSMISSION LINE AND METHOD THEREOF
7080373	18-Jul-06	09/800935	07-Mar-01	METHOD AND DEVICE FOR CREATING AND USING PRE-INTERNALIZED PROGRAM FILES
6706548	16-Mar-04	10/041337	08-Jan-02	METHOD OF MAKING A MICROMECHANICAL DEVICE
6959309	25-Oct-05	10/066278	31-Jan-02	INTERFACE BETWEEN PROGRAMMING LANGUAGES AND METHOD THEREFOR
6596616	22-Jul-03	10/126795	19-Apr-02	METHOD FOR FORMING SERRATED CONTACT OPENING IN THE SEMICONDUCTOR DEVICE
6717533	06-Apr-04	09/872270	31-May-01	METHOD AND APPARATUS FOR COMBINING A WIRELESS RECEIVER AND A NON-WIRELESS RECEIVER
6476506	05-Nov-02	09/966584	28-Sep-01	PACKAGED SEMICONDUCTOR WITH MULTIPLE ROWS OF BOND PADS AND METHOD THEREFOR
7277449	02-Oct-07	10/207298	29-Jul-02	ON CHIP NETWORK
6423619	23-Jul-02	09/997899	30-Nov-01	TRANSISTOR METAL GATE STRUCTURE THAT MINIMIZES NON-PLANARITY EFFECTS AND METHOD OF FORMATION
6489229	03-Dec-02	09/949454	07-Sep-01	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING CONDUCTIVE BUMPS WITHOUT USING GOLD
6461914	08-Oct-02	09/942208	29-Aug-01	PROCESS FOR MAKING A MIM CAPACITOR
6653053	25-Nov-03	09/940241	27-Aug-01	METHOD OF FORMING A PATTERN ON A SEMICONDUCTOR WAFER USING AN ATTENUATED PHASE SHIFTING REFLECTIVE MASK
6914012	05-Jul-05	10/879440	29-Jun-04	ARTICLE COMPRISING AN OXIDE LAYER ON A GAAS-BASED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SAME
7276456	02-Oct-07	11/136845	25-May-05	ARTICLE COMPRISING AN OXIDE LAYER ON A GAAS-BASED SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SAME
6756320	29-Jun-04	10/051494	18-Jan-02	Method of forming ARTICLE COMPRISING AN OXIDE LAYER ON A GaAs-BASED SEMICONDUCTOR STRUCTURE [AND METHOD OF FORMING SAME]
7442654	28-Oct-08	11/239749	30-Sep-05	METHOD OF FORMING AN OXIDE LAYER ON A COMPOUND SEMICONDUCTOR STRUCTURE
6504427	07-Jan-03	09/872283	31-May-01	SWITCHING AMPLIFIER HAVING DIGITAL CORRECTION AND METHOD THEREFOR
6717226	06-Apr-04	10/098706	15-Mar-02	Transistor with layered high-K GATE DIELECTRIC AND METHOD THEREFOR
6910025	21-Jun-05	09/989325	20-Nov-01	MODELING BEHAVIOR OF AN ELECTRICAL CURRENT
6597234	22-Jul-03	10/017429	14-Dec-01	ANTI-FUSE CIRCUIT AND METHOD OF OPERATION
6973471	06-Dec-05	10/081431	22-Feb-02	METHOD AND APPARATUS FOR IMPLEMENTING SIGNED MULTIPLICATION OF OPERANDS HAVING DIFFERING BIT WIDTHS WITHOUT SIGN EXTENSION OF THE MULTIPLICAND
6780751	24-Aug-04	10/267453	09-Oct-02	METHOD FOR ELIMINATING VOIDING IN PLATED SOLDER
6605395	12-Aug-03	09/885575	20-Jun-01	METHOD AND APPARATUS FOR FORMING A PATTERN ON AN INTEGRATED CIRCUIT USING DIFFERING EXPOSURE CHARACTERISTICS
6614197	02-Sep-03	09/896534	30-Jun-01	ODD HARMONICS REDUCTION OF PHASE ANGLE CONTROLLED LOADS
6576532	10-Jun-03	09/997886	30-Nov-01	SEMICONDUCTOR DEVICE AND METHOD THEREFOR
6616854	09-Sep-03	10/022711	17-Dec-01	METHOD OF BONDING AND TRANSFERRING A MATERIAL TO FORM A SEMICONDUCTOR DEVICE
6514808	04-Feb-03	09/997358	30-Nov-01	TRANSISTOR HAVING A HIGH K DIELECTRIC AND SHORT GATE LENGTH AND METHOD THEREFOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
6818493	16-Nov-04	09/916023	26-Jul-01	SELECTIVE METAL OXIDE REMOVAL removal performed in a reaction chamber in the absence of RF activation
7306986	11-Dec-07	11/150499	09-Jun-05	METHOD OF MAKING A SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE MADE THEREBY
6919244	19-Jul-05	10/799554	10-Mar-04	METHOD OF MAKING A SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE MADE THEREBY
7535079	19-May-09	11/899218	04-Sep-07	SEMICONDUCTOR DEVICE COMPRISING PASSIVE COMPONENTS
6473349	29-Oct-02	09/997330	29-Nov-01	CASCODE SENSE AMP AND COLUMN SELECT CIRCUIT AND METHOD OF OPERATION
6930032	16-Aug-05	10/145500	14-May-02	UNDER BUMP METALLURGY STRUCTURAL DESIGN FOR HIGH RELIABILITY BUMPED PACKAGES
6844224	18-Jan-05	10/002054	15-Nov-01	SUBSTRATE CONTACT IN SOI AND METHOD THEREFOR
6724048	20-Apr-04	10/462178	16-Jun-03	BODY-TIED SILICON ON INSULATOR SEMICONDUCTOR DEVICE AND METHOD THEREFOR
6620656	16-Sep-03	10/024916	19-Dec-01	Method of BODY-TIED SILICON ON INSULATOR SEMICONDUCTOR DEVICE [AND METHOD THEREFOR]
6563181	13-May-03	10/003535	02-Nov-01	HIGH FREQUENCY SIGNAL ISOLATION IN A SEMICONDUCTOR DEVICE
6489914	03-Dec-02	10/005275	04-Dec-01	RSD ANALOG TO DIGITAL CONVERTER
6892260	10-May-05	09/998506	30-Nov-01	INTERRUPT PROCESSING IN A DATA PROCESSING SYSTEM
6877123	05-Apr-05	10/025291	19-Dec-01	SCAN CLOCK CIRCUIT AND METHOD THEREFOR
6770569	03-Aug-04	10/210315	01-Aug-02	LOW TEMPERATURE PLASMA SI OR SIGE FOR MEMS APPLICATIONS
6744264	01-Jun-04	10/133701	25-Apr-02	TESTING CIRCUIT AND METHOD FOR MEMS SENSOR PACKAGED WITH AN INTEGRATED CIRCUIT
6536026	18-Mar-03	09/896079	30-Jun-01	METHOD AND APPARATUS FOR ANALYZING SMALL SIGNAL RESPONSE AND NOISE IN NONLINEAR CIRCUITS
6996897	14-Feb-06	10/208867	31-Jul-02	MOUNTING SURFACES FOR ELECTRONIC DEVICES
6787421	07-Sep-04	10/219522	15-Aug-02	METHOD FOR FORMING A DUAL GATE OXIDE DEVICE USING A METAL OXIDE AND RESULTING DEVICE
6617524	09-Sep-03	10/013401	11-Dec-01	PACKAGED INTEGRATED CIRCUIT AND METHOD THEREFOR
6673520	06-Jan-04	09/939184	24-Aug-01	METHOD OF MAKING AN INTEGRATED CIRCUIT USING A REFLECTIVE MASK
6905891	14-Jun-05	10/085694	28-Feb-02	METHOD FOR PROCESSING MULTIPLE SEMICONDUCTOR DEVICES FOR TEST
6750721	15-Jun-04	10/136926	30-Apr-02	HBT LINEARIZER AND POWER BOOSTER
6717430	06-Apr-04	10/075047	13-Feb-02	INTEGRATED CIRCUIT TESTING WITH A VISUAL INDICATOR
6832280	14-Dec-04	09/927123	10-Aug-01	DATA PROCESSING SYSTEM HAVING AN ADAPTIVE PRIORITY CONTROLLER
7108755	19-Sep-06	10/208330	30-Jul-02	SIMPLIFICATION OF BALL ATTACH METHOD USING SUPER-SATURATED FINE CRYSTAL FLUX
6750722	15-Jun-04	10/184857	28-Jun-02	BIAS CONTROL FOR HBT POWER AMPLIFIERS
6788134	07-Sep-04	10/325180	20-Dec-02	LOW VOLTAGE CURRENT SOURCES/CURRENT MIRRORS
6858932	22-Feb-05	10/072167	07-Feb-02	PACKAGED SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6518146	11-Feb-03	10/045863	09-Jan-02	SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING
6649452	18-Nov-03	10/085960	28-Feb-02	METHOD FOR MANUFACTURING A LITHOGRAPHIC RETICLE FOR TRANSFERRING AN INTEGRATED CIRCUIT DESIGN TO A SEMICONDUCTOR WAFER AND STRUCTURE THEREOF
6605991	12-Aug-03	09/943177	30-Aug-01	CIRCUITRY FOR CREATING A SPECTRAL NULL IN A DIFFERENTIAL OUTPUT SWITCHING AMPLIFIER AND METHOD THEREFOR
6819912	16-Nov-04	10/008121	05-Nov-01	VARIABLE FREQUENCY SWITCHING AMPLIFIER AND METHOD THEREOF
6846716	25-Jan-05	10/737116	16-Dec-03	INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
6753242	22-Jun-04	10/101298	19-Mar-02	INTEGRATED CIRCUIT DEVICE AND METHOD THEREFOR
7185249	27-Feb-07	10/135877	30-Apr-02	METHOD AND APPARATUS FOR SECURE SCAN TESTING
7154719	26-Dec-06	10/508879	22-Mar-02	CIRCUIT FOR ELECTROSTATIC DISCHARGE PROTECTION
7177318	13-Feb-07	09/929211	14-Aug-01	METHOD AND APPARATUS FOR MANAGING MULTICAST DATA ON AN IP SUBNET
6651227	18-Nov-03	09/986211	22-Oct-01	METHOD FOR GENERATING TRANSITION DELAY FAULT TEST PATTERNS
6632689	14-Oct-03	10/060539	30-Jan-02	METHOD FOR PROCESSING SEMICONDUCTOR WAFERS IN AN


Patent No.	Grant Date	Appl No.	Appl Date	Title
				ENCLOSURE WITH A TREATED INTERIOR SURFACE
6608789	19-Aug-03	10/027547	21-Dec-01	HYSTERESIS REDUCED SENSE AMPLIFIER AND METHOD OF OPERATION
7271013	18-Sep-07	11/009598	10-Dec-04	SEMICONDUCTOR DEVICE HAVING A BOND PAD AND METHOD THEREFOR
6844631	18-Jan-05	10/097036	13-Mar-02	SEMICONDUCTOR DEVICE HAVING A BOND PAD AND METHOD THEREFOR
6921979	26-Jul-05	10/304416	26-Nov-02	SEMICONDUCTOR DEVICE HAVING A BOND PAD AND METHOD THEREFOR
6620301	16-Sep-03	10/109281	28-Mar-02	METHOD FOR FORMING A SPUTTERED LAYER AND APPARATUS THEREFOR
6797440	28-Sep-04	10/213344	06-Aug-02	METHOD OF FORMING A RIM PHASE SHIFTING MASK AND USING THE RIM PHASE SHIFTING MASK TO FORM A SEMICONDUCTOR DEVICE
7092890	15-Aug-06	11/050079	03-Feb-05	METHOD FOR MANUFACTURING THIN GAAS DIE WITH COPPER-BACK METAL STRUCTURES
6870243	22-Mar-05	10/306834	27-Nov-02	THIN GAAS WITH COPPER BACK-METAL STRUCTURE
6792481	14-Sep-04	10/159632	30-May-02	DMA CONTROLLER
6780703	24-Aug-04	10/228711	27-Aug-02	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6838751	04-Jan-05	10/092683	06-Mar-02	MULTI-ROW LEADFRAME
6875635	05-Apr-05	10/811581	29-Mar-04	METHOD OF ATTACHING A DIE TO A SUBSTRATE
6798074	28-Sep-04	10/090094	04-Mar-02	METHOD OF ATTACHING A DIE TO A SUBSTRATE
7634396	15-Dec-09	10/512611	25-Apr-02	METHOD AND COMPUTER PROGRAM PRODUCT FOR GENERATION OF BUS FUNCTIONAL MODELS
7493179	17-Feb-09	10/105650	25-Mar-02	DIGITAL AUDIO SYSTEM AND METHOD THEREFOR
6714081	30-Mar-04	10/241081	11-Sep-02	ACTIVE CURRENT BIAS NETWORK FOR COMPENSATING HOT-CARRIER INJECTION INDUCED BIAS DRIFT
7211466	01-May-07	11/047173	31-Jan-05	STACKED DIE SEMICONDUCTOR DEVICE
6885093	26-Apr-05	10/085869	28-Feb-02	STACKED DIE SEMICONDUCTOR DEVICE
6785772	31-Aug-04	10/132918	26-Apr-02	DATA PREFETCHING APPARATUS IN A DATA PROCESSING SYSTEM AND METHOD THEREFOR
6646500	11-Nov-03	10/115124	02-Apr-02	INTEGRATED CIRCUIT HAVING AN FM DEMODULATOR AND METHOD THEREFOR
6993311	31-Jan-06	10/079352	20-Feb-02	RADIO RECEIVER HAVING AN ADAPTIVE EQUALIZER AND METHOD THEREFOR
6798289	28-Sep-04	10/160348	31-May-02	SYSTEM, APPARATUS AND METHOD FOR VOLTAGE TO CURRENT CONVERSION
6949455	27-Sep-05	10/677070	01-Oct-03	METHOD FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE IN A SEMICONDUCTOR LAYER
6689676	10-Feb-04	10/206475	26-Jul-02	METHOD FOR FORMING A SEMICONDUCTOR DEVICE STRUCTURE IN A SEMICONDUCTOR LAYER
7003743	21-Feb-06	10/061581	01-Feb-02	METHOD AND SYSTEM OF DATA PROCESSOR DESIGN by sensitizing logical difference
6937961	30-Aug-05	10/255427	26-Sep-02	PERFORMANCE MONITOR AND METHOD THEREFOR
7181638	20-Feb-07	10/194765	12-Jul-02	METHOD AND APPARATUS FOR SKEWING DATA WITH RESPECT TO COMMAND ON A DDR INTERFACE
6847990	25-Jan-05	10/150671	17-May-02	DATA TRANSFER UNIT WITH SUPPORT FOR MULTIPLE COHERENCY GRANULES
6898682	24-May-05	10/217174	12-Aug-02	AUTOMATIC READ LATENCY CALCULATION WITHOUT SOFTWARE INTERVENTION FOR A SOURCE-SYNCHRONOUS INTERFACE
6815820	09-Nov-04	10/141714	09-May-02	[MULTIPLE THICKNESS SEMICONDUCTOR INTERCONNECT AND METHOD THEREFOR] Method for forming a semiconductor interconnect with multiple thickness
7176574	13-Feb-07	10/946675	22-Sep-04	SEMICONDUCTOR DEVICE HAVING A MULTIPLE THICKNESS INTERCONNECT
6842822	11-Jan-05	10/117610	05-Apr-02	SYSTEM AND METHOD FOR CACHE EXTERNAL WRITING
7069384	27-Jun-06	10/965596	14-Oct-04	SYSTEM AND METHOD FOR CACHE EXTERNAL WRITING AND WRITE SHADOWING
6724603	20-Apr-04	10/216336	09-Aug-02	ELECTROSTATIC DISCHARGE PROTECTION CIRCUITRY AND METHOD OF OPERATION
7089467	08-Aug-06	10/225058	21-Aug-02	ASYNCHRONOUS DEBUG INTERFACE
7581151	25-Aug-09	11/624454	18-Jan-07	METHOD AND APPARATUS FOR AFFECTING A PORTION OF AN INTEGRATED CIRCUIT


Patent No.	Grant Date	Appl No.	Appl Date	Title
7185251	27-Feb-07	10/157094	29-May-02	METHOD AND APPARATUS FOR AFFECTING A PORTION OF AN INTEGRATED CIRCUIT
6861817	01-Mar-05	10/027514	21-Dec-01	METHOD AND APPARATUS FOR DETECTING A STALL CONDITION IN A STEPPING MOTOR
6828650	07-Dec-04	10/160940	31-May-02	BIPOLAR JUNCTION TRANSISTOR STRUCTURE WITH IMPROVED CURRENT GAIN CHARACTERISTICS
7535078	19-May-09	10/075218	14-Feb-02	SEMICONDUCTOR DEVICE HAVING A FUSE AND METHOD OF FORMING THEREOF
6870219	22-Mar-05	10/209816	31-Jul-02	FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING SAME
6783904	31-Aug-04	10/150564	17-May-02	LITHOGRAPHY CORRECTION METHOD AND DEVICE
6884727	26-Apr-05	10/224675	21-Aug-02	SEMICONDUCTOR FABRICATION PROCESS FOR MODIFYING THE PROFILES OF PATTERNED FEATURES
7111184	19-Sep-06	10/236834	06-Sep-02	SYSTEM AND METHOD FOR DETERMINISTIC COMMUNICATION ACROSS CLOCK DOMAINS
6953985	11-Oct-05	10/170184	12-Jun-02	WAFER LEVEL MEMS PACKAGING
7260105	21-Aug-07	10/194351	12-Jul-02	REDUCED PEAK EMI BUS USING VARIABLE BIT RATE SPREADING
6949398	27-Sep-05	10/286441	31-Oct-02	LOW COST FABRICATION AND ASSEMBLY OF LID FOR SEMICONDUCTOR DEVICES
6787858	07-Sep-04	10/272336	16-Oct-02	CARRIER INJECTION PROTECTION STRUCTURE
7266848	04-Sep-07	10/100462	18-Mar-02	INTEGRATED CIRCUIT SECURITY AND METHOD THEREFOR
7018747	28-Mar-06	10/261905	01-Oct-02	PHOTOMASK HAVING LINE END PHASE ANCHORS
6747434	08-Jun-04	10/155811	25-May-02	METHODS AND DEVICES FOR CONTROLLING STEPPER MOTORS
7058149	06-Jun-06	10/017688	14-Dec-01	SYSTEM FOR PROVIDING A CALIBRATED CLOCK AND METHODS THEREOF
6936896	30-Aug-05	10/027911	21-Dec-01	SEMICONDUCTOR APPARATUS
7115949	03-Oct-06	10/158692	30-May-02	METHOD OF FORMING A SEMICONDUCTOR DEVICE IN A SEMICONDUCTOR LAYER AND STRUCTURE THEREOF
6846717	25-Jan-05	10/606674	24-Jun-03	SEMICONDUCTOR DEVICE HAVING A WIRE BOND PAD AND METHOD THEREFOR
6614091	02-Sep-03	10/097059	13-Mar-02	SEMICONDUCTOR DEVICE HAVING A WIRE BOND PAD AND METHOD THEREFOR
6590818	08-Jul-03	10/173229	17-Jun-02	METHOD AND APPARATUS FOR SOFT DEFECT DETECTION IN A MEMORY
6803323	12-Oct-04	10/159633	30-May-02	METHOD OF FORMING A COMPONENT OVERLYING A SEMICONDUCTOR SUBSTRATE
7016488	21-Mar-06	10/178597	24-Jun-02	METHOD AND APPARATUS FOR NON-LINEAR PROCESSING OF AN AUDIO SIGNAL
7443783	28-Oct-08	10/504456	18-Feb-03	I/Q MISMATCH COMPENSATION IN AN OFDM RECEIVER IN PRESENCE OF FREQUENCY OFFSET
7006439	28-Feb-06	10/131662	24-Apr-02	METHOD AND APPARATUS FOR DETERMINING AN UPPER DATA RATE FOR A VARIABLE DATA RATE SIGNAL
6803832	12-Oct-04	10/236230	06-Sep-02	OSCILLATOR CIRCUIT HAVING REDUCED LAYOUT AREA AND LOWER POWER SUPPLY TRANSIENTS
6724032	20-Apr-04	10/202697	25-Jul-02	MULTI-BIT NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
7388954	17-Jun-08	10/178560	24-Jun-02	METHOD AND APPARATUS FOR TONE INDICATION
6580298	17-Jun-03	10/186363	28-Jun-02	THREE INPUT SENSE AMPLIFIER AND METHOD OF OPERATION
7253486	07-Aug-07	10/209746	31-Jul-02	FIELD PLATE TRANSISTOR WITH REDUCED FIELD PLATE RESISTANCE
7007253	28-Feb-06	10/657304	08-Sep-03	METHOD AND APPARATUS FOR DISTORTION ANALYSIS IN NONLINEAR CIRCUITS
7209332	24-Apr-07	10/315796	10-Dec-02	TRANSIENT DETECTION CIRCUIT
7035319	25-Apr-06	10/210348	31-Jul-02	METHOD AND APPARATUS FOR DETERMINING WHETHER A RECEIVED SIGNAL INCLUDES A DESIRED SIGNAL
7124385	17-Oct-06	10/657609	08-Sep-03	METHOD FOR AUTOMATED TRANSISTOR FOLDING
7107489	12-Sep-06	10/202946	25-Jul-02	METHOD AND APPARATUS FOR DEBUGGING A DATA PROCESSING SYSTEM
7013409	14-Mar-06	10/202747	25-Jul-02	METHOD AND APPARATUS FOR DEBUGGING A DATA PROCESSING SYSTEM
6925622	02-Aug-05	10/260251	30-Sep-02	SYSTEM AND METHOD FOR CORRELATED CLOCK NETWORKS
7034558	25-Apr-06	10/209745	31-Jul-02	TEST SYSTEM FOR DEVICE AND METHOD THEREOF
7242762	10-Jul-07	10/178427	24-Jun-02	MONITORING AND CONTROL OF AN ADAPTIVE FILTER IN A


Patent No.	Grant Date	Appl No.	Appl Date	Title
				COMMUNICATION SYSTEM
6825716	30-Nov-04	10/135645	30-Apr-02	SYSTEM AND APPARATUS FOR REDUCING OFFSET VOLTAGES IN FOLDING AMPLIFIERS
6944806	13-Sep-05	10/155897	24-May-02	METHOD AND APPARATUS TO DATA LOG AT-SPEED MARCH C+ MEMORY BIST
6690144	10-Feb-04	10/215582	09-Aug-02	OPEN LOOP INDUCTOR CURRENT CONTROL SYSTEM AND METHOD
7236756	26-Jun-07	10/319188	13-Dec-02	TUNING SIGNAL GENERATOR AND METHOD THEREOF
7208841	24-Apr-07	10/909124	30-Jul-04	SEMICONDUCTOR DEVICE WITH STRAIN RELIEVING BUMP DESIGN
6790759	14-Sep-04	10/631102	31-Jul-03	SEMICONDUCTOR DEVICE WITH STRAIN RELIEVING BUMP DESIGN
6764919	20-Jul-04	10/327498	20-Dec-02	METHOD FOR [FORMING A PASSIVATION LAYER FOR AIR GAP FORMATION] providing a dummy feature AND STRUCTURE THEREOF
7277972	02-Oct-07	10/094082	08-Mar-02	DATA PROCESSING SYSTEM WITH PERIPHERAL ACCESS PROTECTION AND METHOD THEREFOR
6703895	09-Mar-04	10/256820	26-Sep-02	SEMICONDUCTOR COMPONENT AND METHOD OF OPERATING SAME
6667701	23-Dec-03	10/196532	16-Jul-02	VARIABLE LENGTH DECODER
6768353	27-Jul-04	10/208959	31-Jul-02	PRESCALER METHOD AND APPARATUS
7082451	25-Jul-06	10/237465	09-Sep-02	RECONFIGURABLE VECTOR-FFT/IFFT, VECTOR-MULTIPLIER/DIVIDER
6621729	16-Sep-03	10/185224	28-Jun-02	SENSE AMPLIFIER INCORPORATING A SYMMETRIC MIDPOINT REFERENCE
6924184	02-Aug-05	10/394352	21-Mar-03	SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SEMICONDUCTOR DEVICE USING POST GATE STACK PLANARIZATION
6864135	08-Mar-05	10/285374	31-Oct-02	SEMICONDUCTOR FABRICATION PROCESS USING TRANSISTOR SPACERS OF DIFFERING WIDTHS
6835671	28-Dec-04	10/222505	16-Aug-02	METHOD OF MAKING AN INTEGRATED CIRCUIT USING AN EUV MASK FORMED BY ATOMIC LAYER DEPOSITION
6972224	06-Dec-05	10/400896	27-Mar-03	METHOD FOR FABRICATING DUAL-METAL GATE DEVICE
7117346	03-Oct-06	10/159386	31-May-02	DATA PROCESSING SYSTEM HAVING MULTIPLE REGISTER CONTEXTS AND METHOD THEREFOR
6882023	19-Apr-05	10/286169	31-Oct-02	[SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING SAME] Floating resurf LDMOSFET and method of manufacturing same
6986971	17-Jan-06	10/290693	08-Nov-02	REFLECTIVE MASK USEFUL FOR TRANSFERRING A PATTERN USING EXTREME ULTRAVIOLET (EUV) RADIATION AND METHOD OF MAKING THE SAME
6894353	17-May-05	10/209523	31-Jul-02	CAPPED DUAL METAL GATE TRANSISTOR FOR CMOS PROCESS AND METHOD FOR MAKING THE SAME
6961423	01-Nov-05	10/178176	24-Jun-02	METHOD AND APPARATUS FOR PERFORMING ADAPTIVE FILTERING
7529363	05-May-09	10/292779	12-Nov-02	TONE DETECTOR AND METHOD THEREFOR
7003056	21-Feb-06	10/207469	29-Jul-02	SYMBOL TIMING TRACKING AND METHOD THEREFOR
7585744	08-Sep-09	10/730230	08-Dec-03	METHOD OF FORMING A SEAL FOR A SEMICONDUCTOR DEVICE
7215765	08-May-07	10/178154	24-Jun-02	METHOD AND APPARATUS FOR PURE DELAY ESTIMATION IN A COMMUNICATION SYSTEM
6898129	24-May-05	10/280294	25-Oct-02	ERASE OF A MEMORY HAVING A NON-CONDUCTIVE STORAGE MEDIUM
7236190	26-Jun-07	10/284661	31-Oct-02	DIGITAL IMAGE PROCESSING USING WHITE BALANCE AND GAMMA CORRECTION
6826103	30-Nov-04	10/284061	30-Oct-02	AUTO-TUNEABLE REFERENCE CIRCUIT FOR FLASH EEPROM PRODUCTS
6791883	14-Sep-04	10/178658	24-Jun-02	PROGRAM AND ERASE IN A THIN FILM STORAGE NON-VOLATILE MEMORY
6751125	15-Jun-04	10/287328	04-Nov-02	GATE VOLTAGE REDUCTION IN A MEMORY READ
7158603	02-Jan-07	10/330852	26-Dec-02	METHOD AND APPARATUS FOR COMPENSATING DEVIATION VARIANCES IN A 2-LEVEL FSK FM TRANSMITTER
7074647	11-Jul-06	10/615055	07-Jul-03	[SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING SAME] Semiconductor component comprising leadframe, semiconductor chip and integrated passive component in vertical relationship to each other
6906900	14-Jun-05	10/324219	19-Dec-02	STRUCTURE AND METHOD OF THERMALLY PROTECTING POWER DEVICES FOR AIR-BAG DEPLOYMENT
6709888	23-Mar-04	10/205865	26-Jul-02	METHOD OF DECAPSULATING A PACKAGED COPPER TECHNOLOGY


Patent No.	Grant Date	Appl No.	Appl Date	Title
				INTEGRATED CIRCUIT
7042103	09-May-06	10/334042	30-Dec-02	LOW STRESS SEMICONDUCTOR DIE ATTACH
6796482	28-Sep-04	10/286438	31-Oct-02	PHASE SEPARATED SYSTEM FOR FLUXING
7245246	17-Jul-07	10/534119	03-Nov-03	CONVERTER, CIRCUIT AND METHOD FOR COMPENSATION OF NON-IDEALITIES IN CONTINUOUS TIME SIGMA DELTA CONVERTERS.
6828618	07-Dec-04	10/283748	30-Oct-02	SPLIT-GATE THIN-FILM STORAGE NVM CELL
7135370	14-Nov-06	10/883237	01-Jul-04	DIELECTRIC STORAGE MEMORY CELL HAVING HIGH PERMITTIVITY TOP DIELECTRIC AND METHOD THEREFOR
6812517	02-Nov-04	10/230810	29-Aug-02	DIELECTRIC STORAGE MEMORY CELL HAVING HIGH PERMITTIVITY TOP DIELECTRIC AND METHOD THEREFOR
6884685	26-Apr-05	10/366777	14-Feb-03	RADICAL OXIDATION AND/OR NITRIDATION DURING METAL OXIDE LAYER DEPOSITION PROCESS
7155618	26-Dec-06	10/094053	08-Mar-02	LOW POWER SYSTEM AND METHOD FOR A DATA PROCESSING SYSTEM
6798152	28-Sep-04	10/224817	21-Aug-02	CLOSED LOOP CURRENT CONTROL CIRCUIT AND METHOD THEREOF
6600690	29-Jul-03	10/184784	28-Jun-02	SENSE AMPLIFIER FOR A MEMORY HAVING AT LEAST TWO DISTINCT RESISTANCE STATES
7142597	28-Nov-06	10/255213	26-Sep-02	FULL BRIDGE INTEGRAL NOISE SHAPING FOR QUANTIZATION OF PULSE WIDTH MODULATION SIGNALS
6674333	06-Jan-04	10/271828	15-Oct-02	BAND SWITCHABLE VOLTAGE CONTROLLED OSCILLATOR WITH SUBSTANTIALLY CONSTANT TUNING RANGE
6753216	22-Jun-04	10/285059	31-Oct-02	MULTIPLE GATE TRANSISTOR EMPLOYING MONOCRYSTALLINE SILICON WALLS
6808986	26-Oct-04	10/231556	30-Aug-02	METHOD OF FORMING NANOCRYSTALS IN A MEMORY DEVICE
7260163	21-Aug-07	10/216333	09-Aug-02	NOISE BLANKER USING AN ADAPTIVE ALL-POLE PREDICTOR AND METHOD THEREFOR
6900531	31-May-05	10/280952	25-Oct-02	IMAGE SENSOR DEVICE
7238579	03-Jul-07	11/003279	03-Dec-04	SEMICONDUCTOR DEVICE FOR REDUCING PHOTOVOLTAIC CURRENT
6956281	18-Oct-05	10/224794	21-Aug-02	SEMICONDUCTOR DEVICE FOR REDUCING PHOTOVOLTAIC CURRENT
7385451	10-Jun-08	10/537634	27-Nov-03	ARRANGEMENT, PHASE LOCKED LOOP AND METHOD FOR NOISE SHAPING IN A PHASE-LOCKED LOOP
6982605	03-Jan-06	10/427581	01-May-03	TRANSFORMER COUPLED OSCILLATOR AND METHOD
6760270	06-Jul-04	10/260970	30-Sep-02	ERASE OF A NON-VOLATILE MEMORY
6737929	18-May-04	10/301943	22-Nov-02	HYBRID N+ AND P+ GATE-DOPED VOLTAGE VARIABLE CAPACITORS TO IMPROVE LINEAR TUNING RANGE IN VOLTAGE CONTROLLED OSCILLATORS
7127384	24-Oct-06	10/333432	27-Aug-02	FAST SIMULATION OF CIRCUITRY HAVING SOI TRANSISTORS
6686245	03-Feb-04	10/324787	20-Dec-02	VERTICAL MOSFET WITH ASYMMETRIC GATE STRUCTURE
7105383	12-Sep-06	10/230743	29-Aug-02	PACKAGED SEMICONDUCTOR WITH COATED LEADS AND METHOD THEREFORE
6927722	09-Aug-05	10/441348	20-May-03	SERIES CAPACITIVE COMPONENT FOR SWITCHED-CAPACITOR CIRCUITS CONSISTING OF SERIES-CONNECTED CAPACITORS
7052939	30-May-06	10/304493	26-Nov-02	STRUCTURE TO REDUCE SIGNAL CROSS-TALK THROUGH SEMICONDUCTOR SUBSTRATE FOR SYSTEM ON CHIP APPLICATIONS
6957054	18-Oct-05	10/216335	09-Aug-02	RADIO RECEIVER HAVING A VARIABLE BANDWIDTH IF FILTER AND METHOD THEREFOR
6887758	03-May-05	10/267153	09-Oct-02	NON-VOLATILE MEMORY DEVICE AND METHOD FOR FORMING
7122395	17-Oct-06	10/328922	23-Dec-02	METHOD OF FORMING SEMICONDUCTOR DEVICES THROUGH EPITAXY
6770506	03-Aug-04	10/328944	23-Dec-02	RELEASE ETCH METHOD FOR MICROMACHINED SENSORS
6709793	23-Mar-04	10/284836	31-Oct-02	METHOD OF MANUFACTURING RETICLES USING SUBRESOLUTION TEST PATTERNS
6765778	20-Jul-04	10/407701	04-Apr-03	INTEGRATED VERTICAL STACK CAPACITOR
7010278	07-Mar-06	10/280631	25-Oct-02	SIDEBAND SUPPRESSION METHOD AND APPARATUS FOR QUADRATURE MODULATOR USING MAGNITUDE MEASUREMENTS
7015585	21-Mar-06	10/323296	18-Dec-02	A PACKAGED INTEGRATED CIRCUIT HAVING WIRE BONDS AND METHOD THEREFOR
6906406	14-Jun-05	10/324533	19-Dec-02	MULTIPLE DICE PACKAGE
6916728	12-Jul-05	10/328923	23-Dec-02	[SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE]


Patent No.	Grant Date	Appl No.	Appl Date	Title
				Method for forming a semiconductor structure through epitaxial growth
6844762	18-Jan-05	10/283869	30-Oct-02	CAPACITIVE CHARGE PUMP
6881681	19-Apr-05	10/301993	22-Nov-02	FILM DEPOSITION ON A SEMICONDUCTOR WAFER
6967390	22-Nov-05	10/367344	13-Feb-03	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING SAME
7092465	15-Aug-06	10/294511	14-Nov-02	METHOD AND APPARATUS FOR PROCESSING AN AMPLITUDE MODULATED (AM) SIGNAL
6753719	22-Jun-04	10/227893	26-Aug-02	SYSTEM AND CIRCUIT FOR CONTROLLING WELL BIASING AND METHOD THEREOF
6697001	24-Feb-04	10/324684	19-Dec-02	CONTINUOUS-TIME SIGMA-DELTA MODULATOR WITH DISCRETE TIME COMMON-MODE FEEDBACK
6750704	15-Jun-04	10/340335	09-Jan-03	OFFSET COMPENSATED DIFFERENTIAL AMPLIFIER
7093223	15-Aug-06	10/304423	26-Nov-02	NOISE ANALYSIS FOR AN INTEGRATED CIRCUIT MODEL
7012324	14-Mar-06	10/660828	12-Sep-03	LEAD FRAME WITH FLAG SUPPORT STRUCTURE
7307659	11-Dec-07	10/319866	13-Dec-02	METHOD OF FIXED PATTERN NOISE REDUCTION AND SYSTEM THEREOF
6939781	06-Sep-05	10/609106	27-Jun-03	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT THAT INCLUDES SELF-ALIGNING A GATE ELECTRODE TO A FIELD PLATE
6949816	27-Sep-05	10/420054	21-Apr-03	SEMICONDUCTOR COMPONENT HAVING FIRST SURFACE AREA FOR ELECTRICALLY COUPLING TO A SEMICONDUCTOR CHIP AND SECOND SURFACE AREA FOR ELECTRICALLY COUPLING TO A SUBSTRATE, AND METHOD OF MANUFACTURING SAME
6700451	02-Mar-04	10/281591	28-Oct-02	CROSS COUPLED CASCODE VOLTAGE CONTROLLED OSCILLATOR
6958261	25-Oct-05	10/688228	14-Oct-03	OPTICAL SENSOR PACKAGE
6667543	23-Dec-03	10/282537	29-Oct-02	OPTICAL SENSOR PACKAGE
7138328	21-Nov-06	10/847775	18-May-04	PACKAGED IC USING INSULATED WIRE
6713812	30-Mar-04	10/267199	09-Oct-02	NON-VOLATILE MEMORY DEVICE HAVING AN ANTI-PUNCH THROUGH (APT) REGION
6973142	06-Dec-05	10/391978	19-Mar-03	TIMING SYNCHRONIZATION FOR M-DPSK CHANNELS
6683370	27-Jan-04	10/417992	15-Apr-03	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING SAME
6538940	25-Mar-03	10/255303	26-Sep-02	METHOD AND CIRCUITRY FOR IDENTIFYING WEAK BITS IN AN MRAM
6738303	18-May-04	10/305736	27-Nov-02	TECHNIQUE FOR SENSING THE STATE OF A MAGNETO-RESISTIVE RANDOM ACCESS MEMORY
6882745	19-Apr-05	10/324261	19-Dec-02	METHOD AND APPARATUS FOR TRANSLATING DETECTED WAFER DEFECT COORDINATES TO RETICLE COORDINATES USING CAD DATA
6891229	10-May-05	10/426296	30-Apr-03	INVERTED ISOLATION FORMED WITH SPACERS
7015679	21-Mar-06	10/741055	19-Dec-03	CIRCUIT AND METHOD FOR SUPPLYING AN ELECTRICAL AC LOAD
6836435	28-Dec-04	10/319664	13-Dec-02	COMPACTION SCHEME IN NVM
6897562	24-May-05	10/411744	11-Apr-03	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING SAME
6847102	25-Jan-05	10/290959	08-Nov-02	[SEMICONDUCTOR DEVICE AND METHOD THEREFOR] Low profile semiconductor device having improved heat dissipation
6838354	04-Jan-05	10/327403	20-Dec-02	METHOD FOR FORMING A PASSIVATION LAYER FOR AIR GAP FORMATION AND STRUCTURE THEREOF
6854637	15-Feb-05	10/372061	20-Feb-03	WIREBONDING INSULATED WIRE
6939650	06-Sep-05	10/346623	17-Jan-03	METHOD OF PATTERNING PHOTORESIST ON A WAFER USING A TRANSMISSION MASK WITH A CARBON LAYER
7378197	27-May-08	11/267983	07-Nov-05	METHOD OF PATTERNING PHOTORESIST ON A WAFER USING A REFLECTIVE MASK WITH A MULTI-LAYER ARC
7026076	11-Apr-06	10/377847	03-Mar-03	METHOD OF PATTERNING PHOTORESIST ON A WAFER USING A REFLECTIVE MASK WITH A MULTI-LAYER ARC
6875546	05-Apr-05	10/377844	03-Mar-03	METHOD OF PATTERNING PHOTORESIST ON A WAFER USING AN ATTENUATED PHASE SHIFT MASK
6951801	04-Oct-05	10/351798	27-Jan-03	METAL REDUCTION IN WAFER SCRIBE AREA
6765816	20-Jul-04	10/290704	08-Nov-02	STORAGE CIRCUIT HAVING SINGLE-ENDED WRITE CIRCUITRY
6861689	01-Mar-05	10/290904	08-Nov-02	ONE TRANSISTOR DRAM CELL STRUCTURE AND METHOD FOR FORMING
7031680	18-Apr-06	10/310446	05-Dec-02	STOP-ON-STATION METHOD AND APPARATUS


Patent No.	Grant Date	Appl No.	Appl Date	Title
7414439	19-Aug-08	10/528955	24-Sep-03	RECEIVER FOR A SWITCHED SIGNAL ON A COMMUNICATION LINE
7538586	26-May-09	10/531757	08-Oct-03	TRANSMITTER FOR A CONTROLLED- SHAPE SWITCHED SIGNAL ON A COMMUNICATION LINE
7579279	25-Aug-09	11/670176	01-Feb-07	METHOD TO PASSIVATE CONDUCTIVE SURFACES DURING SEMICONDUCTOR PROCESSING
7188630	13-Mar-07	10/431053	07-May-03	METHOD TO PASSIVATE CONDUCTIVE SURFACES DURING SEMICONDUCTOR PROCESSING
6794949	21-Sep-04	10/402647	28-Mar-03	FREQUENCY GENERATING DEVICE AND METHOD THEREOF
6878633	12-Apr-05	10/329081	23-Dec-02	FLIP-CHIP STRUCTURE AND METHOD FOR HIGH QUALITY INDUCTORS AND TRANSFORMERS
6700814	02-Mar-04	10/283622	30-Oct-02	SENSE AMPLIFIER BIAS CIRCUIT FOR A MEMORY HAVING AT LEAST TWO DISTINCT RESISTANCE STATES
6785177	31-Aug-04	10/315360	10-Dec-02	METHOD OF ACCESSING MEMORY AND DEVICE THEREOF
6853586	08-Feb-05	10/315279	10-Dec-02	NON-VOLATILE MEMORY ARCHITECTURE AND METHOD THEREOF
7278062	02-Oct-07	10/339022	09-Jan-03	METHOD AND APPARATUS FOR RESPONDING TO ACCESS ERRORS IN A DATA PROCESSING SYSTEM
7074687	11-Jul-06	10/407687	04-Apr-03	METHOD FOR FORMING AN ESD PROTECTION DEVICE
7608942	27-Oct-09	10/542669	17-Jan-03	POWER MANAGEMENT SYSTEM
6879476	12-Apr-05	10/348814	22-Jan-03	ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
6815780	09-Nov-04	10/417972	15-Apr-03	SEMICONDUCTOR COMPONENT [AND METHOD OF MANUFACTURING SAME] with substrate injection protection
6693339	17-Feb-04	10/389401	14-Mar-03	SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING SAME
6714436	30-Mar-04	10/393053	20-Mar-03	WRITE OPERATION FOR CAPACITORLESS RAM
7309638	18-Dec-07	11/182597	14-Jul-05	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT
6933546	23-Aug-05	10/391040	17-Mar-03	SEMICONDUCTOR COMPONENT [AND METHOD FOR MANUFACTURING SAME]
7109550	19-Sep-06	11/036860	13-Jan-05	SEMICONDUCTOR FABRICATION PROCESS WITH ASYMMETRICAL CONDUCTIVE SPACERS
6967143	22-Nov-05	10/427141	30-Apr-03	SEMICONDUCTOR FABRICATION PROCESS WITH ASYMMETRICAL CONDUCTIVE SPACERS
7288820	30-Oct-07	11/000584	01-Dec-04	LOW VOLTAGE NMOS-BASED ELECTROSTATIC DISCHARGE CLAMP
6844597	18-Jan-05	10/361469	10-Feb-03	LOW VOLTAGE NMOS-BASED ELECTROSTATIC DISCHARGE CLAMP
6943650	13-Sep-05	10/447448	29-May-03	ELECTROMAGNETIC BAND GAP MICROWAVE FILTER
7132704	07-Nov-06	11/036859	13-Jan-05	TRANSISTOR SIDEWALL SPACER STRESS MODULATION
6902971	07-Jun-05	10/624203	21-Jul-03	TRANSISTOR SIDEWALL SPACER STRESS MODULATION
6734524	11-May-04	10/335030	31-Dec-02	ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING SAME
6930027	16-Aug-05	10/369874	18-Feb-03	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT
7200137	03-Apr-07	10/207459	29-Jul-02	ON CHIP NETWORK THAT MAXIMIZES INTERCONNECT UTILIZATION BETWEEN PROCESSING ELEMENTS
7051150	23-May-06	10/207600	29-Jul-02	SCALABLE ON CHIP NETWORK
7139860	21-Nov-06	10/207588	29-Jul-02	[SCALABLE] ON CHIP NETWORK with independent logical and physical layers
6996651	07-Feb-06	10/207609	29-Jul-02	ON CHIP NETWORK WITH MEMORY DEVICE ADDRESS DECODING
7091602	15-Aug-06	10/318699	13-Dec-02	MINIATURE MOLDLOCKS FOR HEATSINK OR FLAG FOR AN OVERMOLDED PLASTIC PACKAGE
7014888	21-Mar-06	10/326675	23-Dec-02	METHOD AND STRUCTURE FOR FABRICATING SENSORS WITH A SACRIFICIAL GEL DOME
7293188	06-Nov-07	10/292323	12-Nov-02	LOW VOLTAGE DETECTION SYSTEM
6925542	02-Aug-05	10/393592	21-Mar-03	MEMORY MANAGEMENT IN A DATA PROCESSING SYSTEM
6760268	06-Jul-04	10/304662	26-Nov-02	METHOD AND APPARATUS FOR ESTABLISHING A REFERENCE VOLTAGE IN A MEMORY
6693572	17-Feb-04	10/358055	04-Feb-03	DIGITAL TUNING SCHEME FOR CONTINUOUS-TIME SIGMA DELTA MODULATION
6908852	21-Jun-05	10/353886	29-Jan-03	METHOD OF FORMING AN ARC LAYER FOR A SEMICONDUCTOR DEVICE
6839011	04-Jan-05	10/403678	31-Mar-03	SYSTEM AND METHOD OF FILTERING
6784725	31-Aug-04	10/418338	18-Apr-03	SWITCHED CAPACITOR CURRENT REFERENCE CIRCUIT
6849487	01-Feb-05	10/445791	27-May-03	METHOD FOR FORMING AN ELECTRONIC STRUCTURE USING ETCH


Patent No.	Grant Date	Appl No.	Appl Date	Title
7170116	30-Jan-07	11/168593	28-Jun-05	INTEGRATED CIRCUIT WELL BIAS CIRCUITRY
6927429	09-Aug-05	10/366842	14-Feb-03	INTEGRATED CIRCUIT WELL BIAS CIRCUITRY
6812802	02-Nov-04	10/420664	22-Apr-03	METHOD AND APPARATUS FOR CONTROLLING A VOLTAGE CONTROLLED OSCILLATOR
6825641	30-Nov-04	10/349298	22-Jan-03	HIGH EFFICIENCY ELECTRICAL SWITCH AND DC-DC CONVERTER INCORPORATING SAME
7369086	06-May-08	10/403492	31-Mar-03	MINIATURE VERTICALLY POLARIZED MULTIPLE FREQUENCY BAND ANTENNA AND METHOD OF PROVIDING AN ANTENNA FOR A WIRELESS DEVICE
6717270	06-Apr-04	10/409766	09-Apr-03	INTEGRATED CIRCUIT DIE I/O CELLS
6707339	16-Mar-04	10/301992	22-Nov-02	CONTROLLED BIAS CURRENT BUFFER AND METHOD THEREFOR
6879028	12-Apr-05	10/371089	21-Feb-03	MULTI-DIE SEMICONDUCTOR PACKAGE
7005193	28-Feb-06	10/426148	29-Apr-03	METHOD OF ADDING MASS TO MEMS STRUCTURES
7370332	06-May-08	10/872077	18-Jun-04	ARRANGEMENT AND METHOD FOR ITERATIVE DECODING
7015517	21-Mar-06	11/137244	25-May-05	SEMICONDUCTOR DEVICE INCORPORATING A DEFECT CONTROLLED STRAINED CHANNEL STRUCTURE AND METHOD OF MAKING THE SAME
6919258	19-Jul-05	10/677573	02-Oct-03	SEMICONDUCTOR DEVICE INCORPORATING A DEFECT CONTROLLED STRAINED CHANNEL STRUCTURE AND METHOD OF MAKING THE SAME
6933614	23-Aug-05	10/662541	15-Sep-03	INTEGRATED CIRCUIT DIE HAVING A COPPER CONTACT AND METHOD THEREFOR
7447284	04-Nov-08	10/402160	28-Mar-03	METHOD AND APPARATUS FOR SIGNAL NOISE CONTROL
6825727	30-Nov-04	10/608602	27-Jun-03	RADIO FREQUENCY POWER TRANSISTOR AVALANCHE BREAKDOWN DETECTION CIRCUIT AND METHOD THEREFOR
6924697	02-Aug-05	10/375542	27-Feb-03	SEMICONDUCTOR DEVICE AND METHOD THEREFOR
6895530	17-May-05	10/350658	24-Jan-03	METHOD AND APPARATUS FOR CONTROLLING A DATA PROCESSING SYSTEM DURING DEBUG
7096307	22-Aug-06	10/323313	18-Dec-02	SHARED WRITE BUFFER IN A PERIPHERAL INTERFACE AND METHOD OF OPERATING
6838322	04-Jan-05	10/427577	01-May-03	METHOD FOR FORMING A DOUBLE-GATED SEMICONDUCTOR DEVICE
6855979	15-Feb-05	10/769228	30-Jan-04	MULTI-BIT NON-VOLATILE MEMORY DEVICE AND METHOD THEREFOR
6706599	16-Mar-04	10/393065	20-Mar-03	MULTI-BIT NON-VOLATILE MEMORY DEVICE AND METHOD THEREFOR
6880134	12-Apr-05	10/409988	09-Apr-03	METHOD FOR IMPROVING CAPACITOR NOISE AND MISMATCH CONSTRAINTS IN A SEMICONDUCTOR DEVICE
7259634	21-Aug-07	10/872066	18-Jun-04	ARRANGEMENT AND METHOD FOR DIGITAL DELAY LINE
7322014	22-Jan-08	11/555314	01-Nov-06	METHOD OF IMPLEMENTING POLISHING UNIFORMITY AND MODIFYING LAYOUT DATA
7146593	05-Dec-06	10/700883	04-Nov-03	METHOD OF IMPLEMENTING POLISHING UNIFORMITY AND MODIFYING LAYOUT DATA
6924172	02-Aug-05	10/649426	26-Aug-03	METHOD OF FORMING A BOND PAD
6858542	22-Feb-05	10/346263	17-Jan-03	SEMICONDUCTOR FABRICATION METHOD FOR MAKING SMALL FEATURES
7361987	22-Apr-08	11/148691	19-Jul-05	CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING AND METHOD FOR FORMING
6921975	26-Jul-05	10/418790	18-Apr-03	CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING, EXPOSED ACTIVE SURFACE AND A VOLTAGE REFERENCE PLANE
7444012	28-Oct-08	10/626781	24-Jul-03	METHOD AND APPARATUS FOR PERFORMING FAILURE ANALYSIS WITH FLUORESCENCE INKS
7243065	10-Jul-07	10/408996	08-Apr-03	LOW-COMPLEXITY COMFORT NOISE GENERATOR
7006318	28-Feb-06	10/231868	29-Aug-02	REMOVABLE MEDIA STORAGE SYSTEM WITH MEMORY FOR STORING OPERATIONAL DATA
7096378	22-Aug-06	10/230788	29-Aug-02	DATA STORAGE SYSTEM HAVING A NON-VOLATILE IC BASED MEMORY FOR STORING USER DATA
6646948	11-Nov-03	10/230785	29-Aug-02	DATA STORAGE SYSTEM UTILIZING A NON-VOLATILE IC BASED MEMORY FOR REDUCTION OF DATA RETRIEVAL TIME
7173663	06-Feb-07	10/285160	31-Oct-02	AUTOMATIC EXPOSURE CONTROL SYSTEM FOR A DIGITAL CAMERA
7447272	04-Nov-08	10/420321	22-Apr-03	FILTER METHOD AND APPARATUS FOR POLAR MODULATION
7479407	20-Jan-09	10/302130	22-Nov-02	DIGITAL AND RF SYSTEM AND METHOD THEREFOR


Patent No.	Grant Date	Appl No.	Appl Date	Title
6809593	26-Oct-04	10/424251	28-Apr-03	POWER AMPLIFIER DEVICE AND METHOD THEREOF
6871246	22-Mar-05	10/431285	07-May-03	PREFETCH CONTROL IN A DATA PROCESSING SYSTEM
7339499	04-Mar-08	10/557431	30-Jun-04	KEYPAD SIGNAL INPUT APPARATUS
6838776	04-Jan-05	10/418763	18-Apr-03	CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING AND METHOD FOR FORMING
7084485	01-Aug-06	10/750125	31-Dec-03	METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT, AND SEMICONDUCTOR COMPONENT FORMED THEREBY
7262671	28-Aug-07	10/547903	24-Feb-04	AMPLITUDE LEVEL CONTROL CIRCUIT
7242285	10-Jul-07	10/533271	12-Feb-03	APPARATUS AND METHOD FOR POWER MANAGEMENT IN A TIRE PRESSURE MONITORING SYSTEM
6864817	08-Mar-05	10/748543	30-Dec-03	SIGNALING DEPENDENT ADAPTIVE ANALOG-TO-DIGITAL CONVERTER (ADC) SYSTEM AND METHOD OF USING SAME
6862240	01-Mar-05	10/878956	28-Jun-04	VARIABLE REFRESH CONTROL FOR A MEMORY
6778457	17-Aug-04	10/369985	19-Feb-03	VARIABLE REFRESH CONTROL FOR A MEMORY
6686282	03-Feb-04	10/403967	31-Mar-03	PLATED METAL TRANSISTOR GATE AND METHOF OF FORMATION
6833761	21-Dec-04	10/376614	28-Feb-03	AMPLIFIER APPARATUS AND METHOD THEREOF
7018939	28-Mar-06	10/618228	11-Jul-03	MICELLAR TECHNOLOGY FOR POST-ETCH RESIDUES
6936492	30-Aug-05	11/009109	10-Dec-04	SINGLE PROOF MASS, 3 AXIS MEMS TRANSDUCER
6845670	25-Jan-05	10/615328	08-Jul-03	SINGLE PROOF MASS, 3 AXIS MEMS TRANSDUCER
6937047	30-Aug-05	10/634484	05-Aug-03	INTEGRATED CIRCUIT WITH TEST PAD STRUCTURE AND METHOD OF TESTING
7342518	11-Mar-08	10/761158	20-Jan-04	DIGITAL RATE CONVERTER
7283004	16-Oct-07	10/561556	16-Jun-04	PHASE LOCKED LOOP FILTER
6693355	17-Feb-04	10/445561	27-May-03	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH AN AIR GAP FORMED USING A PHOTOSENSITIVE MATERIAL
6909320	21-Jun-05	10/465753	19-Jun-03	METHOD AND APPARATUS FOR DUAL OUTPUT VOLTAGE REGULATION
6906582	14-Jun-05	10/652530	29-Aug-03	CIRCUIT VOLTAGE REGULATION
7434264	07-Oct-08	10/384024	07-Mar-03	DATA PROCESSING SYSTEM WITH PERIPHERAL ACCESS PROTECTION AND METHOD THEREFOR
7404019	22-Jul-08	10/857208	26-May-04	METHOD AND APPARATUS FOR ENDIANNESS CONTROL IN A DATA PROCESSING SYSTEM
6812580	02-Nov-04	10/457632	09-Jun-03	SEMICONDUCTOR PACKAGE HAVING OPTIMIZED WIRE BOND POSITIONING
7412008	12-Aug-08	10/610116	30-Jun-03	PROGRAMMABLE PHASE MAPPING AND PHASE ROTATION MODULATOR AND METHOD
6989229	24-Jan-06	10/400347	27-Mar-03	NON-RESOLVING MASK TILING METHOD FOR FLARE REDUCTION
6781908	24-Aug-04	10/370011	19-Feb-03	MEMORY HAVING A VARIABLE REFRESH CONTROL AND METHOD THEREFOR
7484140	27-Jan-09	10/886340	07-Jul-04	MEMORY HAVING VARIABLE REFRESH CONTROL AND METHOD THEREFOR
6840106	11-Jan-05	10/640724	14-Aug-03	SENSOR USING AN ACTUATOR FOR SELF-TEST AND METHOD THEREFOR
6815254	09-Nov-04	10/385018	10-Mar-03	SEMICONDUCTOR PACKAGE WITH MULTIPLE SIDES HAVING PACKAGE CONTACTS
6831350	14-Dec-04	10/677844	02-Oct-03	SEMICONDUCTOR STRUCTURE WITH DIFFERENT LATTICE CONSTANT MATERIALS AND METHOD FOR FORMING THE SAME
7192876	20-Mar-07	10/443375	22-May-03	TRANSISTOR WITH INDEPENDENT GATE STRUCTURES
6922100	26-Jul-05	10/629203	29-Jul-03	METHOD AND APPARATUS FOR SWITCHING AMPLIFICATION HAVING VARIABLE SAMPLE POINT AND VARIABLE ORDER CORRECTION
6838721	04-Jan-05	10/423589	25-Apr-03	INTEGRATED CIRCUIT WITH A TRANSISTOR OVER AN INTERCONNECT LAYER
7079068	18-Jul-06	10/851608	21-May-04	ANALOG TO DIGITAL CONVERTER
7171526	30-Jan-07	10/703924	07-Nov-03	MEMORY CONTROLLER USEABLE IN A DATA PROCESSING SYSTEM
7226802	05-Jun-07	10/914006	06-Aug-04	TUNGSTEN COATED SILICON FINGERS
7067907	27-Jun-06	10/401171	27-Mar-03	SEMICONDUCTOR PACKAGE HAVING ANGULATED INTERCONNECT SURFACES
6933523	23-Aug-05	10/402539	28-Mar-03	SEMICONDUCTOR ALIGNMENT AID
6909638	21-Jun-05	10/426282	30-Apr-03	NON-VOLATILE MEMORY HAVING A BIAS ON THE SOURCE ELECTRODE FOR HCI PROGRAMMING
6790719	14-Sep-04	10/410043	09-Apr-03	PROCESS FOR FORMING DUAL METAL GATE STRUCTURES


Patent No.	Grant Date	Appl No.	Appl Date	Title
7030849	18-Apr-06	10/613898	03-Jul-03	ROBUST LCD CONTROLLER
6982483	03-Jan-06	10/448548	30-May-03	HIGH IMPEDANCE RADIO FREQUENCY POWER PLASTIC PACKAGE
6937089	30-Aug-05	10/748878	30-Dec-03	OFFSET, DELAY AND PARASITICALLY IMMUNE RESISTOR-CAPACITOR (RC) TRACKING LOOP AND METHOD OF USING SAME
7227916	05-Jun-07	10/649427	26-Aug-03	RECEIVER WITH AUTOMATIC GAIN CONTROL THAT OPERATES WITH MULTIPLE PROTOCOLS AND METHOD THEREOF
7209720	24-Apr-07	10/648468	26-Aug-03	MULTIBAND AND MULTIMODE TRANSMITTER AND METHOD
7041562	09-May-06	10/696079	29-Oct-03	METHOD FOR FORMING MULTIPLE GATE OXIDE THICKNESS UTILIZING ASHING AND CLEANING
7432792	07-Oct-08	10/596044	29-Nov-04	HIGH FRQUENCY THIN FILM ELECTRICAL CIRCUIT ELEMENT
6930554	16-Aug-05	10/623047	18-Jul-03	VARIABLE GAIN LOW NOISE AMPLIFIER AND METHOD
7236339	26-Jun-07	11/111528	21-Apr-05	ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
6900970	31-May-05	10/348939	22-Jan-03	ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
7088009	08-Aug-06	10/644163	20-Aug-03	WIREBONDED ASSEMBLAGE METHOD AND APPARATUS
6870444	22-Mar-05	10/652406	28-Aug-03	ELECTROMECHANICAL RESONATOR AND METHOD OF OPERATING SAME
6825736	30-Nov-04	10/449403	30-May-03	METHOD AND APPARATUS FOR CONTROLLING A VOLTAGE CONTROLLED OSCILLATOR
6903967	07-Jun-05	10/443908	22-May-03	MEMORY WITH CHARGE STORAGE LOCATIONS and adjacent gate structures
6958265	25-Oct-05	10/663621	16-Sep-03	SEMICONDUCTOR DEVICE WITH NANOCLUSTERS
6862208	01-Mar-05	10/412490	11-Apr-03	MEMORY DEVICE WITH SENSE AMPLIFIER AND SELF-TIMED LATCH
7183848	27-Feb-07	10/973728	26-Oct-04	TRANSCONDUCTANCE AMPLIFIER
6911360	28-Jun-05	10/425275	29-Apr-03	FUSE AND METHOD FOR FORMING
6998952	14-Feb-06	10/729531	05-Dec-03	INDUCTIVE DEVICE INCLUDING BOND WIRES
7076584	11-Jul-06	10/435188	09-May-03	METHOD AND APPARATUS FOR INTERCONNECTING PORTIONS OF CIRCUITRY WITHIN A DATA PROCESSING SYSTEM
6909393	21-Jun-05	10/631450	30-Jul-03	SPACE EFFICIENT LOW POWER CYCLIC A/D CONVERTER
7098502	29-Aug-06	10/705317	10-Nov-03	TRANSISTOR HAVING THREE ELECTRICALLY ISOLATED ELECTRODES AND METHOD OF FORMATION
6986974	17-Jan-06	10/688589	16-Oct-03	ATTENUATED PHASE SHIFT MASK FOR EXTREME ULTRAVIOLET LITHOGRAPHY AND METHOD THEREFORE
6919590	19-Jul-05	10/651544	29-Aug-03	[SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURING SAME] Heterojunction bipolar transistor with monolithically integrated junction field effect transistor and method of manufacturing same
6943289	13-Sep-05	10/738815	17-Dec-03	SLOTTED PLANAR POWER CONDUCTOR
7099973	29-Aug-06	10/402165	26-Mar-03	METHOD AND SYSTEM OF BUS MASTER ARBITRATION
6963963	08-Nov-05	10/396675	25-Mar-03	[MEMORY MANAGEMENT IN A DATA PROCESSING SYSTEM] Multiprocessor system having a shared main memory accessible by all processor units
6951783	04-Oct-05	10/695163	28-Oct-03	CONFINED SPACERS FOR DOUBLE GATE TRANSISTOR SEMICONDUCTOR FABRICATION PROCESS
7144825	05-Dec-06	10/687271	16-Oct-03	MULTI-LAYER DIELECTRIC CONTAINING DIFFUSION BARRIER MATERIAL
6902969	07-Jun-05	10/632473	31-Jul-03	PROCESS FOR FORMING DUAL METAL GATE STRUCTURES
6838332	04-Jan-05	10/641544	15-Aug-03	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING ELECTRICAL CONTACT FROM OPPOSITE SIDES
6921961	26-Jul-05	10/946758	22-Sep-04	SEMICONDUCTOR DEVICE HAVING ELECTRICAL CONTACT FROM OPPOSITE SIDES INCLUDING A VIA WITH AN END FORMED AT A BOTTOM SURFACE OF THE DIFFUSION REGION
7122421	17-Oct-06	11/098070	04-Apr-05	SEMICONDUCTOR DEVICE INCLUDING A TRANSISTOR AND A CAPACITOR HAVING AN ALIGNED TRANSISTOR AND CAPACATIVE ELEMENT
7132303	07-Nov-06	10/739605	18-Dec-03	STACKED SEMICONDUCTOR DEVICE ASSEMBLY AND METHOD FOR FORMING
6992003	31-Jan-06	10/659885	11-Sep-03	INTEGRATION OF ULTRA LOW K DIELECTRIC IN A SEMICONDUCTOR FABRICATION PROCESS
6903004	07-Jun-05	10/736853	16-Dec-03	METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A LOW K DIELECTRIC
7078966	18-Jul-06	10/977832	29-Oct-04	POWER AMPLIFIER SATURATION DETECTION AND OPERATION AT MAXIMUM POWER
6905392	14-Jun-05	10/609996	30-Jun-03	POLISHING SYSTEM HAVING A CARRIER HEAD WITH SUBSTRATE


Patent No.	Grant Date	Appl No.	Appl Date	Title
				PRESENCE SENSING
6887138	03-May-05	10/601248	20-Jun-03	CHEMICAL MECHANICAL POLISH (CMP) CONDITIONING-DISK HOLDER
6939767	06-Sep-05	10/716956	19-Nov-03	MULTI-BIT NON-VOLATILE INTEGRATED CIRCUIT MEMORY AND METHOD THEREFOR
7346098	18-Mar-08	10/721950	25-Nov-03	COMMUNICATION RECEIVER
6987423	17-Jan-06	10/643310	19-Aug-03	TWO PORT VOLTAGE CONTROLLED OSCILLATOR FOR USE IN WIRELESS PERSONAL AREA NETWORK SYNTHESIZERS
7042098	09-May-06	10/613703	07-Jul-03	BONDING PAD FOR A PACKAGED INTEGRATED CIRCUIT
7363208	22-Apr-08	10/616842	10-Jul-03	POWER CONSUMPTION ESTIMATION
6928005	09-Aug-05	10/703657	05-Nov-03	DOMINO COMPARATOR CAPABLE FOR USE IN A MEMORY ARRAY
6924232	02-Aug-05	10/650002	27-Aug-03	SEMICONDUCTOR PROCESS AND COMPOSITION FOR FORMING A BARRIER MATERIAL OVERLYING COPPER
7412006	12-Aug-08	10/625957	24-Jul-03	METHOD AND APPARATUS FOR RF CARRIER SUPPRESSION
7630457	08-Dec-09	10/739505	18-Dec-03	METHOD AND APPARATUS FOR DEMODULATING A RECEIVED SIGNAL WITHIN A CODED SYSTEM
6933599	23-Aug-05	10/694146	27-Oct-03	ELECTROMATIC NOISE SHIELDING IN SEMICONDUCTOR PACKAGES USING CAGED INTERCONNECT STRUCTURES
6961669	01-Nov-05	10/631284	31-Jul-03	DE-EMBEDDING DEVICES UNDER TEST
7185148	27-Feb-07	11/197830	05-Aug-05	READ ACCESS AND STORAGE CIRCUITRY READ ALLOCATION APPLICABLE TO A CACHE
6954826	11-Oct-05	10/442718	21-May-03	READ ACCESS AND STORAGE CIRCUITRY READ ALLOCATION APPLICABLE TO A CACHE
7444668	28-Oct-08	10/448031	29-May-03	METHOD AND APPARATUS FOR DETERMINING ACCESS PERMISSION
7030469	18-Apr-06	10/670631	25-Sep-03	METHOD OF FORMING A SEMICONDUCTOR PACKAGE AND STRUCTURE THEREOF
6847548	25-Jan-05	10/601256	20-Jun-03	MEMORY WITH MULTIPLE STATE CELLS AND SENSING METHOD
7057564	06-Jun-06	10/930660	31-Aug-04	MULTYLAYER CAVITY SLOT ANTENNA
6954821	11-Oct-05	10/631167	31-Jul-03	CROSSBAR SWITCH THAT SUPPORTS A MULTI-PORT SLAVE DEVICE AND METHOD OF OPERATION
7185121	27-Feb-07	11/203935	15-Aug-05	METHOD OF ACCESSING MEMORY VIA MULTIPLE SLAVE PORTS
7078785	18-Jul-06	10/668694	23-Sep-03	SEMICONDUCTOR DEVICE AND MAKING THEREOF
7373539	13-May-08	11/047293	31-Jan-05	PARALLEL PATH ALIGNMENT METHOD AND APPARATUS
6816414	09-Nov-04	10/631142	31-Jul-03	NONVOLATILE MEMORY AND METHOD OF MAKING SAME
7183825	27-Feb-07	10/818861	06-Apr-04	STATE RETENTION WITHIN A DATA PROCESSING SYSTEM
7038547	02-May-06	10/689240	20-Oct-03	AMPLIFIER CIRCUIT
7029980	18-Apr-06	10/670928	25-Sep-03	METHOD OF MANUFACTURING SOI TEMPLATE LAYER
7056778	06-Jun-06	10/919784	17-Aug-04	SEMICONDUCTOR LAYER FORMATION
7208357	24-Apr-07	10/919922	17-Aug-04	TEMPLATE LAYER FORMATION
6898128	24-May-05	10/622353	18-Jul-03	PROGRAMMING OF A MEMORY WITH DISCRETE CHARGE STORAGE ELEMENTS
7254003	07-Aug-07	11/089751	24-Mar-05	DIFFERENTIAL NULLING AVALANCHE (DNA) CLAMP CIRCUIT AND METHOD OF USE
6849515	01-Feb-05	10/670634	25-Sep-03	SEMICONDUCTOR PROCESS FOR DISPOSABLE SIDEWALL SPACERS [AND STRUCTURE]
6969883	29-Nov-05	10/950855	27-Sep-04	NON-VOLATILE MEMORY HAVING A REFERENCE TRANSISTOR
6955967	18-Oct-05	10/609361	27-Jun-03	NON-VOLATILE MEMORY HAVING A REFERENCE TRANSISTOR AND METHOD FOR FORMING
7123892	17-Oct-06	10/683493	10-Oct-03	ARCHITECTURE FOR AN AM/FM DIGITAL INTERMEDIATE FREQUENCY RADIO
7013447	14-Mar-06	10/624398	22-Jul-03	METHOD FOR CONVERTING A PLANAR TRANSISTOR DESIGN TO A VERTICAL DOUBLE GATE TRANSISTOR DESIGN
7450665	11-Nov-08	10/731850	09-Dec-03	METHOD AND APPARATUS TO IMPLEMENT DC OFFSET CORRECTION IN A SIGMA DELTA CONVERTER
7268715	11-Sep-07	10/977010	29-Oct-04	GAIN CONTROL IN A SIGNAL PATH WITH SIGMA-DELTA ANALOG-TO DIGITAL CONVERSION
7139878	21-Nov-06	10/600959	20-Jun-03	METHOD AND APPARATUS FOR DYNAMIC PREFETCH BUFFER CONFIGURATION AND REPLACEMENT
6908822	21-Jun-05	10/662832	15-Sep-03	SEMICONDUCTOR DEVICE HAVING AN INSULATING LAYER AND METHOD FOR FORMING
6784103	31-Aug-04	10/442500	21-May-03	METHOD OF FORMATION OF NANOCRYSTALS ON A


Patent No.	Grant Date	Appl No.	Appl Date	Title
				SEMICONDUCTOR STRUCTURE
7074527	11-Jul-06	10/668432	23-Sep-03	METHOD FOR FABRICATING A MASK USNG A HARDMASK AND METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING THE SAME
7272178	18-Sep-07	10/730387	08-Dec-03	METHOD AND APPARATUS FOR CONTROLLING THE BANDWIDTH FREQUENCY OF AN ANALOG FILTER
6921700	26-Jul-05	10/631093	31-Jul-03	METHOD OF FORMING A TRANSISTOR HAVING MULTIPLE CHANNELS
7112832	26-Sep-06	11/091980	29-Mar-05	TRANSISTOR HAVING MULTIPLE CHANNELS
7200719	03-Apr-07	10/631136	31-Jul-03	PREFETCH CONTROL IN A DATA PROCESSING SYSTEM
7613775	03-Nov-09	10/721201	25-Nov-03	NETWORK MESSAGE FILTERING USING HASHING AND PATTERN MATCHING
7142665	28-Nov-06	10/893034	16-Jul-04	AUTOMATIC GAIN CONTROL FOR AN ADAPTIVE FINITE IMPULSE RESPONSE AND METHOD THEREFORE
7065207	20-Jun-06	10/660446	11-Sep-03	CONTROLLING ATTENUATION DURING ECHO SUPPRESSION
7125805	24-Oct-06	10/839385	05-May-04	METHOD OF SEMICONDUCTOR FABRICATION INCORPORATING DISPOSABLE SPACER INTO ELEVATED SOURCE/DRAIN PROCESSING
7638995	29-Dec-09	11/038746	18-Jan-05	CLOCKED RAMP APPARATUS FOR VOLTAGE REGULATOR SOFTSTART AND METHOD FOR SOFTSTARTING VOLTAGE REGULATORS
7365596	29-Apr-08	10/819383	06-Apr-04	STATE RETENTION WITHIN A DATA PROCESSING SYSTEM
7091712	15-Aug-06	10/843805	12-May-04	CIRCUIT FOR PERFORMING VOLTAGE REGULATION
6973540	06-Dec-05	10/627559	25-Jul-03	METHOD AND APPARATUS FOR SELECTING CACHE WAYS AVAILABLE FOR REPLACEMENT
7136029	14-Nov-06	10/927944	27-Aug-04	FREQUENCY SELECTIVE HIGH IMPEDANCE SURFACE
6970336	29-Nov-05	10/684112	10-Oct-03	ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND METHOD OF OPERATION
6856173	15-Feb-05	10/656051	05-Sep-03	MULTIPLEXING OF DIGITAL SIGNALS AT MULTIPLE SUPPLY VOLTAGES IN AN INTEGRATED CIRCUIT
6933227	23-Aug-05	10/691984	23-Oct-03	SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
7261230	28-Aug-07	10/652434	29-Aug-03	WIREBONDING INSULATED WIRE AND CAPILLARY THEREFOR
7265534	04-Sep-07	10/969426	20-Oct-04	TEST SYSTEM FOR DEVICE CHARACTERIZATION
6917097	12-Jul-05	10/644160	20-Aug-03	DUAL GAUGE LEADFRAME
7033866	25-Apr-06	11/043224	26-Jan-05	METHOD FOR MAKING DUAL GAUGE LEADFRAME
6894937	17-May-05	10/672959	26-Sep-03	ACCELERATED LIFE TEST OF MRAM CELLS
7482781	27-Jan-09	10/595228	29-Sep-04	[POWER SUPPLY APPARATUS] Controlling power supply between a voltage generator, a load and a rechargeable battery
7626276	01-Dec-09	11/750048	17-May-07	METHOD AND APPARATUS FOR PROVIDING STRUCTURAL SUPPORT FOR INTERCONNECT PAD WHILE ALLOWING SIGNAL CONDUCTANCE
7241636	10-Jul-07	11/033008	11-Jan-05	METHOD AND APPARATUS FOR PROVIDING STRUCTURAL SUPPORT FOR INTERCONNECT PAD WHILE ALLOWING SIGNAL CONDUCTANCE
6964911	15-Nov-05	10/668714	23-Sep-03	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING ISOLATION REGIONS
7085943	01-Aug-06	10/672161	26-Sep-03	METHOD AND CIRCUITRY FOR CONTROLLING SUPPLY VOLTAGE IN A DATA PROCESSING SYSTEM
7532696	12-May-09	10/991811	18-Nov-04	CALIBRATION DEVICE FOR A PHASED LOCKED LOOP SYNTHESISER
6917555	12-Jul-05	10/675005	30-Sep-03	INTEGRATED CIRCUIT POWER MANAGEMENT FOR REDUCING LEAKAGE CURRENT IN CIRCUIT ARRAYS AND METHOD THEREFOR
7403624	22-Jul-08	10/744619	23-Dec-03	BTSC ENCODER AND INTEGRATED CIRCUIT
7248069	24-Jul-07	10/638795	11-Aug-03	METHOD AND APPARATUS FOR PROVIDING SECURITY FOR DEBUG CIRCUITRY
7522667	21-Apr-09	11/065403	24-Feb-05	METHOD AND APPARATUS FOR DYNAMIC DETERMINATION OF FRAMES REQUIRED TO BUILD A COMPLETE PICTURE IN A MPEG VIDEO STREAM
7039883	02-May-06	10/728622	05-Dec-03	DERIVATION OF CIRCUIT BLOCK CONSTRAINTS
7231586	12-Jun-07	10/896268	21-Jul-04	MULTI-RATE VITERBI DECODER
7153726	26-Dec-06	11/215374	26-Aug-05	SEMICONDUCTOR DEVICE WITH MAGNETICALLY PERMEABLE HEAT SINK
6958548	25-Oct-05	10/716655	19-Nov-03	SEMICONDUCTOR DEVICE WITH MAGNETICALLY PERMEABLE HEAT SINK


Patent No.	Grant Date	Appl No.	Appl Date	Title
7179712	20-Feb-07	10/640723	14-Aug-03	MULTIBIT ROM CELL AND METHOD THEREFOR
7619273	17-Nov-09	11/576828	06-Oct-04	A VARACTOR
7215972	08-May-07	10/731069	09-Dec-03	ADAPTIVE TRANSMIT POWER CONTROL SYSTEM
6902440	07-Jun-05	10/690060	21-Oct-03	METHOD OF FORMING A LOW K DIELECTRIC IN A SEMICONDUCTOR MANUFACTURING PROCESS
7221188	22-May-07	10/967563	18-Oct-04	LOGIC CIRCUITRY
7172927	06-Feb-07	10/740303	18-Dec-03	WARPAGE CONTROL OF ARRAY PACKAGING
7164566	16-Jan-07	10/805119	19-Mar-04	ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD THEREFORE
7050354	23-May-06	10/737058	16-Dec-03	LOW-POWER COMPILER-PROGRAMMABLE MEMORY WITH FAST ACCESS TIMING
7180432	20-Feb-07	10/788588	27-Feb-04	METHOD AND APPARATUS FOR COMPLEX CASCADE SIGMA-DELTA MODULATION AND SINGLE-SIDEBAND ANALOG-TO-DIGITAL CONVERSION
7126433	24-Oct-06	10/802018	16-Mar-04	SELF-CALIBRATING OSCILLATOR SYSTEM
6867078	15-Mar-05	10/716955	19-Nov-03	METHOD FOR FORMING A MICROWAVE FIELD EFFECT TRANSISTOR WITH HIGH OPERATING VOLTAGE
6839280	04-Jan-05	10/609359	27-Jun-03	VARIABLE GATE BIAS FOR A REFERENCE TRANSISTOR IN A NON-VOLATILE MEMORY
7181188	20-Feb-07	10/806498	23-Mar-04	METHOD AND APPARATUS FOR ENTERING A LOW POWER MODE
7047350	16-May-06	10/683778	10-Oct-03	DATA PROCESSING SYSTEM HAVING A SERIAL DATA CONTROLLER
7068198	27-Jun-06	10/857041	28-May-04	DOUBLE-SAMPLED INTEGRATOR SYSTEM AND METHOD THEREOF
7293153	06-Nov-07	10/685561	14-Oct-03	METHOD AND SYSTEM FOR DIRECT ACCESS TO A NON-MEMORY MAPPED DEVICE MEMORY
7542567	02-Jun-09	10/865267	10-Jun-04	METHOD AND APPARATUS FOR PROVIDING SECURITY IN A DATA PROCESSING SYSTEM
7262667	28-Aug-07	10/970098	20-Oct-04	RADIO FREQUENCY POWER AMPLIFIER
7041576	09-May-06	10/856581	28-May-04	SEPARATELY STRAINED N-CHANNEL AND P-CHANNEL TRANSISTORS
7508260	24-Mar-09	11/941473	16-Nov-07	BYPASSABLE LOW NOISE AMPLIFIER TOPOLOGY WITH MULTI-TAP TRANSFORMER
7061299	13-Jun-06	11/199017	08-Aug-05	BIDIRECTIONAL LEVEL SHIFTER
7240304	03-Jul-07	10/838809	04-May-04	METHOD FOR VOLTAGE DROP ANALYSIS IN INTEGRATED CIRCUITS
6894540	17-May-05	10/738433	17-Dec-03	GLITCH REMOVAL CIRCUIT
6954100	11-Oct-05	10/660847	12-Sep-03	LEVEL SHIFTER
6905910	14-Jun-05	10/752159	06-Jan-04	METHOD OF PACKAGING AN OPTICAL SENSOR
7112871	26-Sep-06	11/043547	26-Jan-05	FLIPCHIP QFN PACKAGE
6867072	15-Mar-05	10/752866	07-Jan-04	FLIPCHIP QFN PACKAGE AND METHOD THEREFOR
7623894	24-Nov-09	10/682746	09-Oct-03	CELLULAR MODEM PROCESSING
7599432	06-Oct-09	10/730449	08-Dec-03	METHOD AND APPARATUS FOR DYNAMICALLY INSERTING GAIN IN AN ADAPTIVE FILTER SYSTEM
7002371	21-Feb-06	10/747748	29-Dec-03	LEVEL SHIFTER
7262105	28-Aug-07	10/718892	21-Nov-03	SEMICONDUCTOR DEVICE WITH SILICIDED SOURCE/DRAINS
7634703	15-Dec-09	10/596205	03-Dec-04	A DECODER FOR A WIRELESS COMMUNICATION DEVICE
7415263	19-Aug-08	11/003188	03-Dec-04	RECEIVER FOR A WIRELESS COMMUNICATION DEVICE
7403966	22-Jul-08	10/730174	08-Dec-03	HARDWARE FOR PERFORMING AN ARITHMETIC FUNCTION
7474585	06-Jan-09	11/736231	17-Apr-07	MEMORY WITH SERIAL INPUT/OUTPUT TERMINALS FOR ADDRESS AND DATA AND METHOD THEREFOR
7221613	22-May-07	10/854554	26-May-04	MEMORY WITH SERIAL INPUT/OUTPUT TERMINALS FOR ADDRESS AND DATA AND METHOD THEREFOR
7401234	15-Jul-08	10/791171	01-Mar-04	AUTONOMOUS MEMORY CHECKER FOR RUNTIME SECURITY ASSURANCE AND METHOD THEREFORE
7109816	19-Sep-06	11/046075	28-Jan-05	DUAL PORT MODULATOR COMPRISING A FREQUENCY SYNTHESISER
7610466	27-Oct-09	10/657510	05-Sep-03	DATA PROCESSING SYSTEM USING INDEPENDENT MEMORY AND REGISTER OPERAND SIZE SPECIFIERS AND METHOD THEREOF
7096348	22-Aug-06	10/736393	15-Dec-03	METHOD AND APPARATUS FOR ALLOCATING ENTRIES IN A BRANCH TARGET BUFFER
7415558	19-Aug-08	11/610956	14-Dec-06	COMMUNICATION STEERING FOR USE IN A MULTI-MASTER SHARED RESOURCE SYSTEM
7064615	20-Jun-06	10/808056	24-Mar-04	METHOD AND APPARATUS FOR DOHERTY AMPLIFIER BIASING


Patent No.	Grant Date	Appl No.	Appl Date	Title
7284231	16-Oct-07	11/018637	21-Dec-04	LAYOUT MODIFICATION USING MULTILAYER-BASED CONSTRAINTS
7404139	22-Jul-08	11/040861	21-Jan-05	DECODER WITH M-AT-A-TIME TRACEBACK
7057462	06-Jun-06	10/857040	28-May-04	TEMPERATURE COMPENSATED ON-CHIP BIAS CIRCUIT FOR LINEAR RF HBT POWER AMPLIFIERS
7163903	16-Jan-07	10/836172	30-Apr-04	METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE USING SILICON GERMANIUM
7500152	03-Mar-09	10/728398	05-Dec-03	APPARATUS AND METHOD FOR TIME ORDERING EVENTS IN A SYSTEM HAVING MULTIPLE TIME DOMAINS
6953738	11-Oct-05	10/734435	12-Dec-03	METHOD AND APPARATUS FOR FORMING AN SOI BODY-CONTACTED TRANSISTOR
6818362	16-Nov-04	10/782566	19-Feb-04	PHOTOLITHOGRAPHY RETICLE DESIGN
7013357	14-Mar-06	10/660845	12-Sep-03	ARBITER HAVING PROGRAMMABLE ARBITRATION POINTS FOR UNDEFINED LENGTH BURST ACCESSES AND METHOD
7275148	25-Sep-07	10/657797	08-Sep-03	DATA PROCESSING SYSTEM USING MULTIPLE ADDRESSING MODES FOR SIMD OPERATIONS AND METHOD THEREOF
7315932	01-Jan-08	10/657331	08-Sep-03	DATA PROCESSING SYSTEM HAVING INSTRUCTION SPECIFIERS FOR SIMD REGISTER OPERANDS AND METHOD THEREOF
7107436	12-Sep-06	10/657593	08-Sep-03	CONDITIONAL NEXT PORTION TRANSFERRING OF DATA STREAM TO OR FROM REGISTER BASED ON SUBSEQUENT INSTRUCTION ASPECT
7268524	11-Sep-07	10/891811	15-Jul-04	VOLTAGE REGULATOR WITH ADAPTIVE FREQUENCY COMPENSATION
7015852	21-Mar-06	11/001209	30-Nov-04	CYCLIC ANALOG-TO-DIGITAL CONVERTER
7652597	26-Jan-10	10/596367	13-Dec-04	[A] Multimode DECODER
7136028	14-Nov-06	10/927921	27-Aug-04	APPLICATIONS OF A HIGH IMPEDANCE SURFACE
7040154	09-May-06	10/827220	19-Apr-04	MOTION SENSING FOR TIRE PRESSURE MONITORING
7091089	15-Aug-06	10/876805	25-Jun-04	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
7334059	19-Feb-08	10/792591	03-Mar-04	MULTIPLE BURST PROTOCOL DEVICE CONTROLLER
7349266	25-Mar-08	10/865274	10-Jun-04	MEMORY DEVICE WITH A DATA HOLD LATCH
7135934	14-Nov-06	11/069664	01-Mar-05	FULLY PROGRAMMABLE PHASE LOCKED LOOP
7183817	27-Feb-07	11/169862	29-Jun-05	HIGH SPEED OUTPUT BUFFER WITH AC-COUPLED LEVEL SHIFT AND DC LEVEL DETECTION AND CORRECTION
7071518	04-Jul-06	10/856602	28-May-04	SCHOTTKY DEVICE
7355260	08-Apr-08	10/881678	30-Jun-04	SCHOTTKY DEVICE AND METHOD OF FORMING
6933772	23-Aug-05	10/770149	02-Feb-04	VOLTAGE REGULATOR WITH IMPROVED LOAD REGULATION USING ADAPTIVE BIASING
7205235	17-Apr-07	10/736395	15-Dec-03	METHOD FOR REDUCING CORROSION OF METAL SURFACES DURING SEMICONDUCTOR PROCESSING
6991984	31-Jan-06	10/765804	27-Jan-04	METHOD FOR FORMING A MEMORY STRUCTURE USING A MODIFIED SURFACE TOPOGRAPHY AND STRUCTURE THEREOF
6972571	06-Dec-05	10/805954	22-Mar-04	LOAD BOARD WITH EMBEDDED RELAY TRACKER
6969568	29-Nov-05	10/766205	28-Jan-04	METHOD FOR ETCHING A QUARTZ LAYER IN A PHOTORESISTLESS SEMICONDUCTOR MASK
7001852	21-Feb-06	10/836149	30-Apr-04	METHOD OF MAKING A HIGH QUALITY THIN DIELECTRIC LAYER
7130346	31-Oct-06	10/845949	14-May-04	METHOD AND APPARATUS HAVING A DIGITAL PWM SIGNAL GENERATOR WITH INTEGRAL NOISE SHAPING
6964902	15-Nov-05	10/787510	26-Feb-04	METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS
6969656	29-Nov-05	10/728621	05-Dec-03	METHOD AND CIRCUIT FOR MULTIPLYING SIGNALS WITH A TRANSISTOR HAVING MORE THAN ONE INDEPENDENT GATE STRUCTURE
7241647	10-Jul-07	10/919952	17-Aug-04	GRADED SEMICONDUCTOR LAYER
7282386	16-Oct-07	11/117996	29-Apr-05	SCHOTTKY DEVICE AND METHOD OF FORMING
7282402	16-Oct-07	11/093801	30-Mar-05	METHOD OF MAKING A DUAL STRAINED CHANNEL SEMICONDUCTOR DEVICE
7120402	10-Oct-06	10/790516	01-Mar-04	METHOD AND APPARATUS FOR A HIGH PERFORMANCE AND HIGH DYNAMIC RANGE BASEBAND POWER CONTROL SYSTEM
7141860	28-Nov-06	10/875105	23-Jun-04	LDMOS TRANSISTOR
6976110	13-Dec-05	10/740157	18-Dec-03	METHOD AND APPARATUS FOR REDUCING INTERRUPT LATENCY BY DYNAMIC BUFFER SIZING
7037857	02-May-06	10/737115	16-Dec-03	METHOD FOR ELIMINATING OF EXCESSIVE FIELD OXIDE RECESS


Patent No.	Grant Date	Appl No.	Appl Date	Title
				FOR THIN SI SOI
7056766	06-Jun-06	10/731831	09-Dec-03	METHOD OF FORMING LAND GRID ARRAY PACKAGED DEVICE
7205178	17-Apr-07	10/807527	24-Mar-04	LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
7045432	16-May-06	10/771855	04-Feb-04	METHOD FOR FORMING A SEMICONDUCTOR DEVICE WITH LOCAL SEMICONDUCTOR-ON-INSULATOR (SOI)
7287194	23-Oct-07	11/099889	06-Apr-05	REAL-TIME DEBUG SUPPORT FOR A DMA DEVICE AND METHOD THEREOF
6920586	19-Jul-05	10/764110	23-Jan-04	REAL-TIME DEBUG SUPPORT FOR A DMA DEVICE AND METHOD THEREOF
7015075	21-Mar-06	10/774977	09-Feb-04	DIE ENCAPSULATION USING A POROUS CARRIER
6831310	14-Dec-04	10/705504	10-Nov-03	INTEGRATED CIRCUIT HAVING MULTIPLE MEMORY TYPES AND METHOD OF FORMATION
7500033	03-Mar-09	10/598352	16-Feb-05	UNIVERSAL SERIAL BUS TRANSMITTER
6967611	22-Nov-05	10/804453	19-Mar-04	OPTIMIZED REFERENCE VOLTAGE GENERATION USING SWITCHED CAPACITOR SCALING FOR DATA CONVERTERS
7494832	24-Feb-09	11/465402	17-Aug-06	SEMICONDUCTOR OPTICAL DEVICES AND METHOD FOR FORMING
7521720	21-Apr-09	11/465395	17-Aug-06	SEMICONDUCTOR OPTICAL DEVICES AND METHOD FOR FORMING
7112455	26-Sep-06	10/865451	10-Jun-04	SEMICONDUCTOR OPTICAL DEVICES AND METHOD FOR FORMING
7229903	12-Jun-07	10/925855	25-Aug-04	RECESSED SEMICONDUCTOR DEVICE
7571406	04-Aug-09	11/197103	04-Aug-05	CLOCK TREE ADJUSTABLE BUFFER
7557042	07-Jul-09	10/878839	28-Jun-04	METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH REDUCED SPACING
7091130	15-Aug-06	10/876820	25-Jun-04	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
7368786	06-May-08	11/078026	11-Mar-05	PROCESS INSENSITIVE ESD PROTECTION DEVICE
7447279	04-Nov-08	11/047402	31-Jan-05	METHOD AND SYSTEM FOR INDICATING ZERO-CROSSINGS OF A SIGNAL IN THE PRESENCE OF NOISE
7157377	02-Jan-07	10/779007	13-Feb-04	METHOD OF MAKING A SEMICONDUCTOR DEVICE USING TREATED PHOTORESIST
7126192	24-Oct-06	11/350305	08-Feb-06	TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR
7026204	11-Apr-06	10/807624	24-Mar-04	TRANSISTOR WITH REDUCED GATE-TO-SOURCE CAPACITANCE AND METHOD THEREFOR
6897095	24-May-05	10/843850	12-May-04	SEMICONDUCTOR PROCESS AND INTEGRATED CIRCUIT HAVING DUAL METAL OXIDE GATE DIELECTRIC WITH SINGLE METAL GATE ELECTRODE
7179700	20-Feb-07	10/895553	21-Jul-04	SEMICONDUCTOR DEVICE WITH LOW RESISTANCE CONTACTS
7057427	06-Jun-06	10/892420	15-Jul-04	POWER ON RESET CIRCUIT
7009424	07-Mar-06	10/865269	10-Jun-04	SINGLE SUPPLY LEVEL SHIFTER
7273762	25-Sep-07	10/985530	09-Nov-04	MICROELECTROMECHANICAL (MEM) DEVICE INCLUDING A SPRING RELEASE BRIDGE AND METHOD OF MAKING THE SAME
7102359	05-Sep-06	11/247480	11-Oct-05	INTEGRATED FAULT DETECTOR CIRCUIT
7507638	24-Mar-09	10/881144	30-Jun-04	ULTRA-THIN DIE AND METHOD OF FABRICATING SAME
7049694	23-May-06	11/270300	09-Nov-05	SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
7256488	14-Aug-07	11/388646	24-Mar-06	SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
6992377	31-Jan-06	10/787288	26-Feb-04	SEMICONDUCTOR PACKAGE WITH CROSSING CONDUCTOR ASSEMBLY AND METHOD OF MANUFACTURE
7630429	08-Dec-09	11/147969	08-Jun-05	EQUALIZER CO-EFFICIENT GENERATION APPARATUS AND METHOD THEREFOR
7105429	12-Sep-06	10/797222	10-Mar-04	METHOD OF INHIBITING METAL SILICIDE ENCROACHMENT IN A TRANSISTOR
7235471	26-Jun-07	10/854389	26-May-04	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A SILICIDE LAYER
7354814	08-Apr-08	10/949057	23-Sep-04	SEMICONDUCTOR PROCESS WITH FIRST TRANSISTOR TYPES ORIENTED IN A FIRST PLANE AND SECOND TRANSISTOR TYPES ORIENTED IN A SECOND PLANE
7064396	20-Jun-06	10/790420	01-Mar-04	INTEGRATED CIRCUIT WITH MULTIPLE SPACER INSULATING REGION WIDTHS
7000473	21-Feb-06	10/828042	20-Apr-04	MEM STRUCTURE HAVING REDUCED SPRING STICTION
7177616	13-Feb-07	10/917891	13-Aug-04	HIGH LINEARITY AND LOW NOISE CMOS MIXER AND SIGNAL


Patent No.	Grant Date	Appl No.	Appl Date	Title
				MIXING METHOD
7235502	26-Jun-07	11/096515	31-Mar-05	TRANSITIONAL DIELECTRIC LAYER TO IMPROVE RELIABILITY AND PERFORMANCE OF HIGH DIELECTRIC CONSTANT TRANSISTORS
7476593	13-Jan-09	11/426815	27-Jun-06	SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
7095092	22-Aug-06	10/836170	30-Apr-04	SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
7095246	22-Aug-06	10/926121	25-Aug-04	VARIABLE IMPEDANCE OUTPUT BUFFER
7240041	03-Jul-07	10/721196	25-Nov-03	NETWORK MESSAGE PROCESSING USING INVERSE PATTERN MATCHING
7030001	18-Apr-06	10/827202	19-Apr-04	METHOD FOR FORMING A GATE ELECTRODE HAVING A METAL
7157355	02-Jan-07	10/880685	30-Jun-04	METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING A STRAINED SEMICONDUCTOR LAYER
7105430	12-Sep-06	10/811461	26-Mar-04	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A NOTCHED CONTROL ELECTRODE AND STRUCTURE THEREOF
7085175	01-Aug-06	10/991910	18-Nov-04	WORD LINE DRIVER CIRCUIT FOR A STATIC RANDOM ACCESS MEMORY AND METHOD THEREFOR
7296248	13-Nov-07	11/157025	20-Jun-05	METHOD AND APPARATUS FOR COMPILING A PARAMETERIZED CELL
7102410	05-Sep-06	10/865363	10-Jun-04	HIGH VOLTAGE LEVEL CONVERTER USING LOW VOLTAGE DEVICES
7116147	03-Oct-06	10/967898	18-Oct-04	CIRCUIT AND METHOD FOR INTERPOLATIVE DELAY
7205210	17-Apr-07	10/780143	17-Feb-04	SEMICONDUCTOR STRUCTURE HAVING STRAINED SEMICONDUCTOR AND METHOD THEREFOR
7132327	07-Nov-06	10/853701	25-May-04	DECOUPLED COMPLEMENTARY MASK PATTERNING TRANSFER METHOD
7554185	30-Jun-09	11/718396	31-Oct-05	FLIP CHIP AND WIRE BOND SEMICONDUCTOR PACKAGE
7233539	19-Jun-07	11/135963	24-May-05	NON-VOLATILE MEMORY CELL
7256077	14-Aug-07	10/851607	21-May-04	METHOD FOR REMOVING A SEMICONDUCTOR LAYER
7249288	24-Jul-07	10/940252	14-Sep-04	METHOD AND APPARATUS FOR NON-INTRUSIVE TRACING
7620760	17-Nov-09	11/815189	31-Jan-05	[BUS ARBITRATION CONTROLLER WITH REDUCED ENERGY CONSUMPTION] Non-high impedence device and method for reducing energy consumption
7434009	07-Oct-08	10/955220	30-Sep-04	APPARATUS AND METHOD FOR PROVIDING INFORMATION TO A CACHE MODULE USING FETCH BURSTS
7109051	19-Sep-06	10/989940	15-Nov-04	METHOD OF INTEGRATING OPTICAL DEVICES AND ELECTRONIC DEVICES ON AN INTEGRATED CIRCUIT
7142401	28-Nov-06	10/804450	19-Mar-04	DETECTING OVERCURRENTS IN A SWITCHING REGULATOR USING A VOLTAGE DEPENDENT REFERENCE
7084698	01-Aug-06	10/964793	14-Oct-04	BAND-GAP REFERENCE CIRCUIT
7282307	16-Oct-07	10/872057	18-Jun-04	REFLECTIVE MASK USEFUL FOR TRANSFERRING A PATTERN USING EXTREME ULTRAVIOLET (EUV) RADIATION AND METHOD OF MAKING THE SAME
7018901	28-Mar-06	10/954121	29-Sep-04	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A STRAINED CHANNEL AND A HETEROJUNCTION SOURCE/DRAIN
7037795	02-May-06	10/965964	15-Oct-04	LOW RC PRODUCT TRANSISTORS IN SOI SEMICONDUCTOR PROCESS
7432693	07-Oct-08	10/598955	15-Mar-05	LOW DROP-OUT DC VOLTAGE REGULATOR
7579219	25-Aug-09	11/373087	10-Mar-06	SEMICONDUCTOR DEVICE WITH A PROTECTED ACTIVE DIE REGION AND METHOD THEREFOR
7266359	04-Sep-07	10/963387	12-Oct-04	DC INTERFERENCE REMOVAL IN WIRELESS COMMUNICATIONS
6960509	01-Nov-05	10/883182	30-Jun-04	METHOD OF FABRICATING THREE DIMENSIONAL GATE STRUCTURE USING OXYGEN DIFFUSION
7195963	27-Mar-07	10/851347	21-May-04	METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE USING SILICON GERMANIUM
7301187	27-Nov-07	11/689313	21-Mar-07	HIGH VOLTAGE FIELD EFFECT DEVICE AND METHOD
7211477	01-May-07	11/124469	06-May-05	HIGH VOLTAGE FIELD EFFECT DEVICE AND METHOD
7161199	09-Jan-07	10/925084	24-Aug-04	TRANSISTOR STRUCTURE WITH STRESS MODIFICATION AND CAPACITIVE REDUCTION FEATURE IN A WIDTH DIRECTION AND METHOD THEREOF
7409738	12-Aug-08	11/119142	28-Apr-05	SYSTEM AND METHOD FOR PREDICTING ROTATIONAL IMBALANCE
7101736	05-Sep-06	10/891648	15-Jul-04	METHOD OF ASSEMBLING A SEMICONDUCTOR COMPONENT AND APPARATUS THEREFOR
7141476	28-Nov-06	10/871402	18-Jun-04	METHOD OF FORMING A TRANSISTOR WITH A BOTTOM GATE


Patent No.	Grant Date	Appl No.	Appl Date	Title
7141857	28-Nov-06	10/883180	30-Jun-04	SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING HAFNIUM OXIDE MODIFIED WITH LANTHANUM, A LANTHANIDE-SERIES METAL, OR A COMBINATION THEREOF
6852588	08-Feb-05	10/883181	30-Jun-04	METHODS OF FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING EPITAXIAL HF3SI2 LAYERS
7320931	22-Jan-08	10/903841	30-Jul-04	INTERFACIAL LAYER FOR USE WITH HIGH K DIELECTRIC MATERIALS
7119381	10-Oct-06	10/903784	30-Jul-04	COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURE having ion implant in only one of the complementary devices
7202182	10-Apr-07	10/882482	30-Jun-04	METHOD OF PASSIVATING OXIDE/COMPOUND SEMICONDUCTOR INTERFACE
7432565	07-Oct-08	11/236185	27-Sep-05	III-V COMPOUND SEMICONDUCTOR HETEROSTRUCTURE MOSFET DEVICE
7429506	30-Sep-08	11/236186	27-Sep-05	PROCESS OF MAKING A III-V COMPOUND SEMICONDUCTOR HETEROSTRUCTURE MOSFET
7132372	07-Nov-06	10/901589	29-Jul-04	METHOD FOR PREPARING A SEMICONDUCTOR SUBSTRATE SURFACE FOR SEMICONDUCTOR DEVICE FABRICATION
6979627	27-Dec-05	10/836150	30-Apr-04	ISOLATION TRENCH
7248172	24-Jul-07	11/087339	22-Mar-05	SYSTEM AND METHOD FOR HUMAN BODY FALL DETECTION
7160769	09-Jan-07	10/969108	20-Oct-04	CHANNEL ORIENTATION TO ENHANCE TRANSISTOR PERFORMANCE
7226833	05-Jun-07	10/977423	29-Oct-04	SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR
7362645	22-Apr-08	10/955356	30-Sep-04	INTEGRATED CIRCUIT FUSES HAVING CORRESPONDING STORAGE CIRCUITRY
7067868	27-Jun-06	10/952676	29-Sep-04	DOUBLE GATE DEVICE HAVING A HETEROJUNCTION SOURCE/DRAIN AND STRAINED CHANNEL
7078297	18-Jul-06	10/857545	28-May-04	MEMORY WITH RECESSED DEVICES
7288448	30-Oct-07	10/925108	24-Aug-04	METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DEVICE
7361543	22-Apr-08	10/987047	12-Nov-04	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
7214590	08-May-07	11/098874	05-Apr-05	METHOD OF FORMING AN ELECTRONIC DEVICE
7434108	07-Oct-08	10/836173	30-Apr-04	MASKING WITHIN A DATA PROCESSING SYSTEM HAVING APPLICABILITY FOR A DEVELOPMENT INTERFACE
7166897	23-Jan-07	10/924650	24-Aug-04	METHOD AND APPARATUS FOR PERFORMANCE ENHANCEMENT IN AN ASYMMETRICAL SEMICONDUCTOR DEVICE
7442621	28-Oct-08	10/996319	22-Nov-04	SEMICONDUCTOR PROCESS FOR FORMING STRESS ABSORBENT SHALLOW TRENCH ISOLATIONS STRUCTURES
7159459	09-Jan-07	11/031029	06-Jan-05	MULTIPLE MICROELECTROMECHANICAL (MEM) DEVICES FORMED ON A SINGLE SUBSTRATE AND SEALED AT DIFFERENT PRESSURES AND METHOD THEREFOR
7238601	03-Jul-07	10/939148	10-Sep-04	SEMICONDUCTOR DEVICE HAVING CONDUCTIVE SPACERS IN SIDEWALL REGIONS AND METHOD FOR FORMING
7239182	03-Jul-07	11/122908	05-May-05	PREDRIVER CIRCUIT
7365410	29-Apr-08	10/977727	29-Oct-04	SEMICONDUCTOR STRUCTURE HAVING A METALLIC BUFFER LAYER AND METHOD FOR FORMING
7018876	28-Mar-06	10/871772	18-Jun-04	TRANSISTOR WITH VERTICAL DIELECTRIC STRUCTURE
7276406	02-Oct-07	10/977266	29-Oct-04	TRANSISTOR STRUCTURE WITH DUAL TRENCH FOR OPTIMIZED STRESS EFFECT AND METHOD THEREOF
7132360	07-Nov-06	10/865268	10-Jun-04	METHOD FOR TREATING A SEMICONDUCTOR SURFACE TO FORM A METAL-CONTAINING LAYER
6987063	17-Jan-06	10/865452	10-Jun-04	METHOD TO REDUCE IMPURITY ELEMENTS DURING SEMICONDUCTOR FILM DEPOSITION
7015153	21-Mar-06	10/969634	20-Oct-04	METHOD FOR FORMING A LAYER USING A PURGING GAS IN A SEMICONDUCTOR PROCESS
7200056	03-Apr-07	10/889159	12-Jul-04	MEMORY ROW/COLUMN REPLACEMENT IN AN INTEGRATED CIRCUIT
7129566	31-Oct-06	10/880681	30-Jun-04	SCRIBE STREET STRUCTURE FOR BACKEND INTERCONNECT SEMICONDUCTOR WAFER INTEGRATION
7251797	31-Jul-07	10/994858	22-Nov-04	PESSIMISM REDUCTION IN CROSSTALK NOISE AWARE STATIC TIMING ANALYSIS
7385307	10-Jun-08	11/145629	06-Jun-05	DRIVE ARRANGEMENT FOR ACTIVATING A CAR SAFETY DEVICE ACTIVATION ELEMENT


Patent No.	Grant Date	Appl No.	Appl Date	Title
7191089	13-Mar-07	11/001957	01-Dec-04	SYSTEM AND METHOD FOR FALL DETECTION
7145309	05-Dec-06	10/940058	14-Sep-04	OPEN LOOP MOTOR PARKING METHOD AND SYSTEM
7185170	27-Feb-07	10/928399	27-Aug-04	DATA PROCESSING SYSTEM HAVING TRANSLATION LOOKASIDE BUFFER VALID BITS WITH LOCK AND METHOD THEREFOR
7135379	14-Nov-06	10/955658	30-Sep-04	ISOLATION TRENCH PERIMETER IMPLANT FOR THRESHOLD VOLTAGE CONTROL
7164293	16-Jan-07	10/902204	29-Jul-04	DYNAMIC LATCH HAVING INTEGRAL LOGIC FUNCTION AND METHOD THEREFOR
7074713	11-Jul-06	10/954400	30-Sep-04	PLASMA ENHANCED NITRIDE LAYER
7305223	04-Dec-07	11/021843	23-Dec-04	RADIO FREQUENCY CIRCUIT WITH INTEGRATED ON-CHIP RADIO FREQUENCY SIGNAL COUPLER
7418251	26-Aug-08	11/021295	23-Dec-04	COMPACT RADIO FREQUENCY HARMONIC FILTER USING INTEGRATED PASSIVE DEVICE TECHNOLOGY
7439718	21-Oct-08	10/954793	30-Sep-04	APPARATUS AND METHOD FOR HIGH SPEED VOLTAGE REGULATION
7038959	02-May-06	10/943579	17-Sep-04	MRAM SENSE AMPLIFIER HAVING A PRECHARGE CIRCUIT AND METHOD FOR SENSING
7121141	17-Oct-06	11/046596	28-Jan-05	Z-AXIS ACCELEROMETER WITH AT LEAST TWO GAP SIZES AND TRAVEL STOPS DISPOSED OUTSIDE AN ACTIVE CAPACITOR AREA
7364953	29-Apr-08	10/971657	22-Oct-04	MANUFACTURING METHOD TO CONSTRUCT SEMICONDUCTOR-ON-INSULATOR WITH CONDUCTOR LAYER SANDWICHED BETWEEN BURIED DIELECTRIC LAYER AND SEMICONDUCTOR LAYERS
7482679	27-Jan-09	11/569113	14-Oct-05	LEADFRAME FOR A SEMICONDUCTOR DEVICE
7151396	19-Dec-06	11/098106	04-Apr-05	CLOCK DELAY COMPENSATION CIRCUIT
7226820	05-Jun-07	11/101354	07-Apr-05	TRANSISTOR FABRICATION USING DOUBLE ETCH/REFILL PROCESS
7262494	28-Aug-07	11/082096	16-Mar-05	THREE DIMENSIONAL PACKAGE
7109782	19-Sep-06	10/958831	05-Oct-04	WELL BIAS VOLTAGE GENERATOR
7232701	19-Jun-07	11/029951	04-Jan-05	MICROELECTROMECHANICAL (MEM) DEVICE WITH A PROTECTIVE CAP THAT FUNCTIONS AS A MOTION STOP
7339275	04-Mar-08	10/995818	22-Nov-04	MULTI-CHIPS SEMICONDUCTOR DEVICE ASSEMBLIES AND METHODS FOR FABRICATING THE SAME
7199679	03-Apr-07	10/978596	01-Nov-04	BALUNS FOR MULTIPLE BAND OPERATION
7235847	26-Jun-07	10/944306	17-Sep-04	SEMICONDUCTOR DEVICE HAVING A GATE WITH A THIN CONDUCTIVE LAYER
7105395	12-Sep-06	10/930891	31-Aug-04	PROGRAMMING AND ERASING STRUCTURE FOR AN NVM CELL
7227366	05-Jun-07	10/955219	30-Sep-04	DEVICE AND METHOD FOR BIASING A TRANSISTOR THAT IS CONNECTED TO A POWER CONVERTER
7238580	03-Jul-07	11/043577	26-Jan-05	SEMICONDUCTOR FABRICATION PROCESS EMPLOYING STRESS INDUCING SOURCE DRAIN STRUCTURES WITH GRADED IMPURITY CONCENTRATION
7230264	12-Jun-07	11/247866	07-Oct-05	SEMICONDUCTOR TRANSISTOR HAVING STRUCTURAL ELEMENTS OF DIFFERING MATERIALS
6979622	27-Dec-05	10/924632	24-Aug-04	SEMICONDUCTOR TRANSISTOR HAVING STRUCTURAL ELEMENTS OF DIFFERING MATERIALS AND METHOD OF FORMATION
7279433	09-Oct-07	10/945319	20-Sep-04	DEPOSITION AND PATTERNING OF BORON NITRIDE NANOTUBE ILD
7195983	27-Mar-07	10/930892	31-Aug-04	PROGRAMMING, ERASING, AND READING STRUCTURE FOR AN NVM CELL
7360183	15-Apr-08	11/007705	08-Dec-04	DESIGN ANALYSIS TOOL AND METHOD FOR DERIVING CORRESPONDENCE BETWEEN STORAGE ELEMENTS OF TWO MEMORY MODELS
7183161	27-Feb-07	10/944244	17-Sep-04	PROGRAMMING AND ERASING STRUCTURE FOR A FLOATING GATE MEMORY CELL AND METHOD OF MAKING
7215014	08-May-07	10/901844	29-Jul-04	SOLDERABLE METAL FINISH FOR INTEGRATED CIRCUIT PACKAGE LEADS AND METHOD FOR FORMING
7126172	24-Oct-06	10/962944	12-Oct-04	INTEGRATION OF MULTIPLE GATE DIELECTRICS BY SURFACE PROTECTION
7285855	23-Oct-07	11/625350	22-Jan-07	PACKAGED DEVICE AND METHOD OF FORMING SAME
7179682	20-Feb-07	11/191132	27-Jul-05	PACKAGED DEVICE AND METHOD OF FORMING SAME
7374971	20-May-08	11/110283	20-Apr-05	SEMICONDUCTOR DIE EDGE RECONDITIONING
7074627	11-Jul-06	10/879242	29-Jun-04	LEAD SOLDER INDICATOR AND METHOD
7361985	22-Apr-08	10/974658	27-Oct-04	THERMALLY ENHANCED MOLDED PACKAGE FOR SEMICONDUCTORS
7091071	15-Aug-06	11/028811	03-Jan-05	SEMICONDUCTOR FABRICATION PROCESS INCLUDING RECESSED


Patent No.	Grant Date	Appl No.	Appl Date	Title
				SOURCE/DRAIN REGIONS IN AN SOI WAFER
7585735	08-Sep-09	11/047946	01-Feb-05	ASYMMETRIC SPACERS AND ASYMMETRIC SOURCE/DRAIN EXTENSION LAYERS
7116537	03-Oct-06	11/300075	14-Dec-05	SURGE CURRENT PREVENTION CIRCUIT AND DC POWER SUPPLY
7444557	28-Oct-08	10/891649	15-Jul-04	MEMORY WITH FAULT TOLERANT REFERENCE CIRCUITRY
7088632	08-Aug-06	10/854298	26-May-04	AUTOMATIC HIDDEN REFRESH IN A DRAM AND METHOD THEREFOR
7130943	31-Oct-06	10/954809	30-Sep-04	DATA PROCESSING SYSTEM WITH BUS ACCESS RETRACTION
7491594	17-Feb-09	11/258987	26-Oct-05	METHODS OF GENERATING PLANAR DOUBLE GATE TRANSISTOR SHAPES [AND DATA PROCESSING SYSTEM READABLE MEDIA TO PERFORM THE METHODS]
7521974	21-Apr-09	11/443971	31-May-06	A TRANSITIONAL PHASE LOCKED LOOP USING A QUANTIZED INTERPOLATED EDGE TIMED SYNTHESIZER
7339775	04-Mar-08	11/300076	14-Dec-05	OVERCURRENT PROTECTION CIRCUIT AND DC POWER SUPPLY
7338894	04-Mar-08	11/043827	26-Jan-05	SEMICONDUCTOR DEVICE HAVING NITRIDATED OXIDE LAYER AND METHOD THEREFOR
7144784	05-Dec-06	10/902218	29-Jul-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
7447944	04-Nov-08	11/118827	29-Apr-05	PREDICTIVE METHODS AND APPARATUS FOR NON-VOLATILE MEMORY
7176130	13-Feb-07	10/987790	12-Nov-04	PLASMA TREATMENT FOR SURFACE OF SEMICONDUCTOR DEVICE
7295484	13-Nov-07	11/685419	13-Mar-07	TEMPERATURE BASED DRAM REFRESH
7206244	17-Apr-07	11/000560	01-Dec-04	TEMPERATURE BASED DRAM REFRESH
7183159	27-Feb-07	11/035913	14-Jan-05	METHOD OF FORMING AN INTEGRATED CIRCUIT HAVING NANOCLUSTER DEVICES AND NON-NANOCLUSTER DEVICES
7288447	30-Oct-07	10/977226	18-Jan-05	SEMICONDUCTOR DEVICE HAVING TRENCH ISOLATION FOR DIFFERENTIAL STRESS AND METHOD THEREFOR
7518179	14-Apr-09	10/961295	08-Oct-04	VIRTUAL GROUND MEMORY ARRAY AND METHOD THEREFOR
7249223	24-Jul-07	10/916298	11-Aug-04	PREFETCHING IN A DATA PROCESSING SYSTEM
7042765	09-May-06	10/912824	06-Aug-04	MEMORY BIT LINE SEGMENT ISOLATION
7187600	06-Mar-07	10/946951	22-Sep-04	METHOD AND APPARATUS FOR PROTECTING AN INTEGRATED CIRCUIT FROM ERRONEOUS OPERATION
7504302	17-Mar-09	11/083878	18-Mar-05	NON-VOLATILE MEMORY CELL INCLUDING A CAPACITOR STRUCTURE AND PROCESSES FOR FORMING THE SAME
7208424	24-Apr-07	10/943383	17-Sep-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A METAL LAYER
7190279	13-Mar-07	11/063957	22-Feb-05	AUDIO MODULATED LIGHT SYSTEM FOR PERSONAL ELECTRONIC DEVICES
7361567	22-Apr-08	11/043826	26-Jan-05	NON-VOLATILE NANOCRYSTAL MEMORY AND METHOD THEREFOR
7142058	28-Nov-06	10/984438	09-Nov-04	ON-CHIP TEMPERATURE COMPENSATION CIRCUIT FOR AN ELECTRONIC DEVICE
7160775	09-Jan-07	10/912825	06-Aug-04	METHOD OF DISCHARGING A SEMICONDUCTOR DEVICE
7288977	30-Oct-07	11/040089	21-Jan-05	HIGH RESOLUTION PULSE WIDTH MODULATOR
7064030	20-Jun-06	10/961014	08-Oct-04	METHOD FOR FORMING A MULTI-BIT NON-VOLATILE MEMORY DEVICE
7346317	18-Mar-08	11/099179	04-Apr-05	DYNAMIC GAIN AND PHASE COMPENSATION FOR POWER AMPLIFIER LOAD SWITCHING
7504677	17-Mar-09	11/092264	28-Mar-05	MULTI-GATE ENHANCEMENT MODE RF SWITCH AND BIAS ARRANGEMENT
7345545	18-Mar-08	11/092070	28-Mar-05	ENHANCEMENT MODE TRANSCEIVER AND SWITCHED GAIN AMPLIFIER INTEGRATED CIRCUIT
7190213	13-Mar-07	11/089963	25-Mar-05	DIGITAL TIME CONSTANT TRACKING TECHNIQUE AND APPARATUS
7305642	04-Dec-07	11/100039	05-Apr-05	METHOD OF TILING ANALOG CIRCUITS
7071038	04-Jul-06	10/946938	22-Sep-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A DIELECTRIC LAYER WITH HIGH DIELECTRIC CONSTANT
7151695	19-Dec-06	10/991879	18-Nov-04	INTEGRATED CIRCUIT HAVING A NON-VOLATILE MEMORY WITH DISCHARGE RATE CONTROL AND METHOD THEREFOR
7272053	18-Sep-07	11/120270	02-May-05	INTEGRATED CIRCUIT HAVING A NON-VOLATILE MEMORY WITH DISCHARGE RATE CONTROL AND METHOD THEREFOR
7442581	28-Oct-08	11/009284	10-Dec-04	FLEXIBLE CARRIER AND RELEASE METHOD FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION
7286070	23-Oct-07	11/284566	21-Nov-05	RF CARRIER GENERATOR AND METHOD THEREOF


Patent No.	Grant Date	Appl No.	Appl Date	Title
7217643	15-May-07	11/066887	24-Feb-05	SEMICONDUCTOR STRUCTURES AND METHODS FOR FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING HIGH DIELECTRIC CONSTANT STACKED STRUCTURES
7517741	14-Apr-09	11/172569	30-Jun-05	SINGLE TRANSISTOR MEMORY CELL WITH REDUCED RECOMBINATION RATES
7527976	05-May-09	11/060833	18-Feb-05	PROCESS FOR TESTING A REGION FOR AN ANALYTE AND A PROCESS FOR FORMING AN ELECTRONIC DEVICE
7238555	03-Jul-07	11/172570	30-Jun-05	SINGLE TRANSISTOR MEMORY CELL WITH REDUCED PROGRAMMING VOLTAGES
7291521	06-Nov-07	11/113589	25-Apr-05	SELF CORRECTING SUPPRESSION OF THRESHOLD VOLTAGE VARIATION IN FULLY DEPLETED TRANSISTORS
7176133	13-Feb-07	10/994720	22-Nov-04	CONTROLLED ELECTROLESS PLATING
7109055	19-Sep-06	11/039688	20-Jan-05	METHODS AND APPARATUS HAVING WAFER LEVEL CHIP SCALE PACKAGE FOR SENSING ELEMENTS
7344917	18-Mar-08	11/290300	30-Nov-05	METHOD FOR PACKAGING A SEMICONDUCTOR DEVICE
7160798	09-Jan-07	11/065360	24-Feb-05	METHOD OF MAKING REINFORCED SEMICONDUCTOR PACKAGE
7297586	20-Nov-07	11/043619	26-Jan-05	[NOVEL] GATE DIELECTRIC AND METAL GATE INTEGRATION
7074664	11-Jul-06	11/092418	29-Mar-05	DUAL METAL GATE ELECTRODE SEMICONDUCTOR FABRICATION PROCESS AND STRUCTURE THEREOF
7132863	07-Nov-06	11/098107	04-Apr-05	DIGITAL CLOCK FREQUENCY DOUBLER
7285832	23-Oct-07	11/192956	29-Jul-05	MULTIPORT SINGLE TRANSISTOR BIT CELL
7235473	26-Jun-07	11/213470	26-Aug-05	DUAL SILICIDE SEMICONDUCTOR FABRICATION PROCESS
7323355	29-Jan-08	11/088387	23-Mar-05	METHOD OF FORMING A MICROELECTRONIC DEVICE
7402472	22-Jul-08	11/067257	25-Feb-05	METHOD OF MAKING A NITRIDED GATE DIELECTRIC
7187205	06-Mar-07	11/065793	25-Feb-05	INTEGRATED CIRCUIT STORAGE ELEMENT HAVING LOW POWER DATA RETENTION AND METHOD THEREFOR
7094645	22-Aug-06	10/944239	17-Sep-04	PROGRAMMING AND ERASING STRUCTURE FOR A FLOATING GATE MEMORY CELL AND METHOD OF MAKING
7446990	04-Nov-08	11/056617	11-Feb-05	I/O CELL ESD SYSTEM
7422979	09-Sep-08	11/078236	11-Mar-05	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER STACK AND STRUCTURE THEREOF
7160755	09-Jan-07	11/108220	18-Apr-05	METHOD OF FORMING A SUBSTRATELESS SEMICONDUCTOR PACKAGE
7256471	14-Aug-07	11/095302	31-Mar-05	ANTIFUSE ELEMENT AND ELECTRICALLY REDUNDANT ANTIFUSE ARRAY FOR CONTROLLED RUPTURE LOCATION
7353311	01-Apr-08	11/142148	01-Jun-05	METHOD OF ACCESSING INFORMATION AND SYSTEM THEREFOR
7148749	12-Dec-06	11/046910	31-Jan-05	CLOSED LOOP POWER CONTROL WITH HIGH DYNAMIC RANGE
7376568	20-May-08	11/315733	22-Dec-05	VOICE SIGNAL PROCESSOR
7432133	07-Oct-08	11/257822	24-Oct-05	PLASTIC PACKAGED DEVICE WITH DIE INTERFACE LAYER
7091568	15-Aug-06	11/023014	22-Dec-04	[DIELECTRIC LAYER, AN] ELECTRONIC DEVICE INCLUDING THE DIELECTRIC LAYER, AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
7241691	10-Jul-07	11/092469	28-Mar-05	CONDUCTING METAL OXIDE WITH ADDITIVE AS P-MOS DEVICE ELECTRODE
7563662	21-Jul-09	11/084283	18-Mar-05	ELECTRONIC DEVICES INCLUDING NON-VOLATILE MEMORY AND PROCESSES FOR FORMING THE SAME
7282929	16-Oct-07	11/493686	25-Jul-06	APPARATUS FOR CURRENT SENSING
7102365	05-Sep-06	11/097593	01-Apr-05	APPARATUS FOR CURRENT SENSING
7364969	29-Apr-08	11/172728	01-Jul-05	SEMICONDUCTOR FABRICATION PROCESS FOR INTEGRATING FORMATION OF EMBEDDED NONVOLATILE STORAGE DEVICE WITH FORMATION OF MULTIPLE TRANSISTOR DEVICE TYPES
7340542	04-Mar-08	10/955558	30-Sep-04	DATA PROCESSING SYSTEM WITH BUS ACCESS RETRACTION
7539906	26-May-09	11/094593	30-Mar-05	SYSTEM FOR INTEGRATED DATA INTEGRITY VERIFICATION AND METHOD THEREOF
7430642	30-Sep-08	11/149670	10-Jun-05	SYSTEM AND METHOD FOR UNIFIED CACHE ACCESS USING SEQUENTIAL INSTRUCTION INFORMATION
7135842	14-Nov-06	11/047494	31-Jan-05	VOLTAGE REGULATOR HAVING IMPROVED IR DROP
7360182	15-Apr-08	11/476386	28-Jun-06	METHOD AND SYSTEM FOR REDUCING DELAY NOISE IN AN INTEGRATED CIRCUIT
7297588	20-Nov-07	11/046079	28-Jan-05	ELECTRONIC DEVICE COMPRISING A GATE ELECTRODE INCLUDING A METAL-CONTAINING LAYER HAVING ONE OR MORE IMPURITIES AND A PROCESS FOR FORMING THE SAME


Patent No.	Grant Date	Appl No.	Appl Date	Title
7506105	17-Mar-09	11/120288	02-May-05	PREFETCHING USING HASHED PROGRAM COUNTER
7215188	08-May-07	11/065796	25-Feb-05	INTEGRATED CIRCUIT HAVING A LOW POWER MODE AND METHOD THEREFOR
7470951	30-Dec-08	11/047543	31-Jan-05	HYBRID-FET AND ITS APPLICATION AS SRAM
7282415	16-Oct-07	11/092291	29-Mar-05	METHOD FOR MAKING A SEMICONDUCTOR DEVICE WITH STRAIN ENHANCEMENT
7586374	08-Sep-09	11/994258	30-Jun-05	WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND BIASING CIRCUIT THEREFOR
7220632	22-May-07	11/065324	24-Feb-05	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND AN OPTICAL DEVICE AND STRUCTURE THEREOF
7361561	22-Apr-08	11/166138	24-Jun-05	A METHOD OF MAKING A METAL GATE SEMICONDUCTOR DEVICE
7399675	15-Jul-08	11/079674	14-Mar-05	ELECTRONIC DEVICE INCLUDING AN ARRAY AND PROCESS FOR FORMING THE SAME
7247552	24-Jul-07	11/033009	11-Jan-05	INTEGRATED CIRCUIT HAVING STRUCTURAL SUPPORT FOR A FLIP-CHIP INTERCONNECT PAD AND METHOD THEREFOR
7161827	09-Jan-07	11/033934	12-Jan-05	SRAM HAVING IMPROVED CELL STABILITY AND METHOD THEREFOR
7285976	23-Oct-07	11/047161	31-Jan-05	INTEGRATED CIRCUIT WITH PROGRAMMABLE-IMPEDENCE OUTPUT BUFFER AND METHOD THEREFOR
7202117	10-Apr-07	11/047448	31-Jan-05	METHOD OF MAKING A PLANAR DOUBLE-GATED TRANSISTOR
7217667	15-May-07	11/058071	15-Feb-05	PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING A SEMICONDUCTOR LAYER
7190150	13-Mar-07	11/068272	28-Feb-05	DC-DC CONVERTER FOR POWER LEVEL TRACKING POWER AMPLIFIERS
7649961	19-Jan-10	11/156396	20-Jun-05	SUPPRESSED CARRIER QUADRATURE PULSE MODULATOR
7544576	09-Jun-09	11/192968	29-Jul-05	DIFFUSION BARRIER FOR NICKEL SILICIDES IN A SEMICONDUCTOR FABRICATION PROCESS
7301378	27-Nov-07	11/063071	22-Feb-05	CIRCUIT AND METHOD FOR DETERMINING OPTIMAL POWER AND FREQUENCY METRICS OF AN INTEGRATED CIRCUIT
7186616	06-Mar-07	11/082094	16-Mar-05	METHOD OF REMOVING NANOCLUSTERS IN A SEMICONDUCTOR DEVICE
7161822	09-Jan-07	11/068625	28-Feb-05	COMPACT NON-VOLATILE MEMORY ARRAY WITH REDUCED DISTURB
7299335	20-Nov-07	11/140310	27-May-05	TRANSLATION INFORMATION RETRIEVAL TRANSPARENT TO PROCESSOR CORE
7282426	16-Oct-07	11/092289	29-Mar-05	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING ASYMMETRIC DIELECTRIC REGIONS AND STRUCTURE THEREOF
7138686	21-Nov-06	11/142433	31-May-05	INTEGRATED CIRCUIT WITH IMPROVED SIGNAL NOISE ISOLATION AND METHOD FOR IMPROVING SIGNAL NOISE ISOLATION
7253455	07-Aug-07	11/100095	05-Apr-05	pHEMT WITH BARRIER OPTIMIZED FOR LOW TEMPERATURE OPERATION
7192855	20-Mar-07	11/106970	15-Apr-05	PECVD NITRIDE FILM
7496364	24-Feb-09	11/265869	03-Nov-05	MEDIA-INDEPENDENT HANDOVER (MIH) METHOD FEATURING A SIMPLIFIED BEACON
7109079	19-Sep-06	11/043337	26-Jan-05	METAL GATE TRANSISTOR CMOS PROCESS AND METHOD FOR MAKING
7215150	08-May-07	11/047427	31-Jan-05	METHOD AND CIRCUIT FOR MAINTAINING I/O PAD CHARACTERISTICS ACROSS DIFFERENT I/O SUPPLY VOLTAGES
7435625	14-Oct-08	11/257802	24-Oct-05	SEMICONDUCTOR DEVICE WITH REDUCED PACKAGE CROSS-TALK AND LOSS
7639083	29-Dec-09	11/994760	05-Jul-05	COMPENSATION FOR PARASITIC COUPLING BETWEEN RF OR MICROWAVE TRANSISTORS IN THE SAME PACKAGE
7164301	16-Jan-07	11/125462	10-May-05	STATE RETENTION POWER GATING LATCH CIRCUIT
7387946	17-Jun-08	11/146825	07-Jun-05	METHOD OF FABRICATING A SUBSTRATE FOR A PLANAR, DOUBLE GATED, TRANSISTOR PROCESS
7262655	28-Aug-07	11/118283	28-Apr-05	HIGH BANDWIDTH RESISTOR
7512391	31-Mar-09	11/136752	24-May-05	SELF-ALIGNING RESONATOR FILTER CIRCUIT AND WIDEBAND TUNER CIRCUIT INCORPORATING SAME
7301741	27-Nov-07	11/130873	17-May-05	INTEGRATED CIRCUIT WITH MULTIPLE INDEPENDENT GATE FIELD EFFECT TRANSISTOR (MIGFET) RAIL CLAMP CIRCUIT
7272767	18-Sep-07	11/117893	29-Apr-05	METHODS AND APPARATUS FOR INCORPORATING IDDQ TESTING INTO LOGIC BIST
7301402	27-Nov-07	11/282734	17-Nov-05	SOFT SATURATION DETECTION FOR POWER AMPLIFIERS
7469020	23-Dec-08	11/114366	26-Apr-05	SYSTEMS, METHODS, AND APPARATUS FOR REDUCING DYNAMIC RANGE REQUIREMENTS OF A POWER AMPLIFIER IN A WIRELESS

100


Patent No.	Grant Date	Appl No.	Appl Date	Title
				DEVICE
7123068	17-Oct-06	11/097658	01-Apr-05	FLIP-FLOP CIRCUIT HAVING LOW POWER DATA RETENTION
7538000	26-May-09	11/193675	28-Jul-05	[STRUCTURE AND MANUFACTURING METHOD OF MULTI-GATE DIELECTRIC THICKNESSES FOR PLANAR DOUBLE GATE DEVICE HAVING MULTI-THRESHOLD VOLTAGES] Method of forming double gate transistors having varying gate dielectric thicknesses
7221006	22-May-07	11/110234	20-Apr-05	GeSOI TRANSISTOR WITH LOW JUNCTION CURRENT AND LOW JUNCTION CAPACITANCE AND METHOD FOR MAKING THE SAME
7186596	06-Mar-07	11/158022	21-Jun-05	VERTICAL DIODE FORMATION IN SOI APPLICATION
7446006	04-Nov-08	11/226826	14-Sep-05	SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE STRINGER REMOVAL PROCESSING
7436919	14-Oct-08	11/097577	01-Apr-05	METHODS AND APPARATUS FOR BIT SYNCHRONIZING DATA TRANSFERRED ACROSS A MULTI-PIN ASYNCHRONOUS SERIAL INTERFACE
7486941	03-Feb-09	11/099278	04-Apr-05	METHOD AND APPARATUS FOR DYNAMIC GAIN AND PHASE COMPENSATIONS
7238990	03-Jul-07	11/100168	06-Apr-05	INTERLAYER DIELECTRIC UNDER STRESS FOR AN INTEGRATED CIRCUIT
7276974	02-Oct-07	11/222545	08-Sep-05	METHOD AND APPARATUS FOR PROTECTING RF POWER AMPLIFIERS
7538799	26-May-09	11/036818	14-Jan-05	SYSTEM AND METHOD FOR FLICKER DETECTION IN DIGITAL IMAGING
7317345	08-Jan-08	11/069537	01-Mar-05	ANTI-GATE LEAKAGE PROGRAMMABLE CAPACITOR
7237149	26-Jun-07	11/065898	25-Feb-05	METHOD AND APPARATUS FOR QUALIFYING DEBUG OPERATION USING SOURCE INFORMATION
7265004	04-Sep-07	11/273092	14-Nov-05	ELECTRONIC DEVICES INCLUDING A SEMICONDUCTOR LAYER AND A PROCESS FOR FORMING THE SAME
7530037	05-May-09	11/258777	26-Oct-05	METHODS OF GENERATING PLANAR DOUBLE GATE TRANSISTOR SHAPES AND DATA PROCESSING SYSTEM READABLE MEDIA TO PERFORM THE METHODS
7496060	24-Feb-09	11/134712	20-May-05	EXTENDING BATTERY LIFE IN COMMUNICATION DEVICES HAVING A PLURALITY OF RECEIVERS
7064700	20-Jun-06	11/154405	15-Jun-05	MULTI-CHANNEL ANALOG TO DIGITAL CONVERTER
7622309	24-Nov-09	11/168837	28-Jun-05	MECHANICAL INTEGRITY EVALUATION OF LOW-K DEVICES WITH BUMP SHEAR
7525353	28-Apr-09	11/855153	14-Sep-07	BROWN OUT DETECTOR
7369820	06-May-08	11/096520	01-Apr-05	SYSTEM AND METHOD FOR DC OFFSET CORRECTION IN TRANSMIT BASEBAND
7439606	21-Oct-08	11/830577	30-Jul-07	METHOD OF MANUFACTURING A PASSIVE INTEGRATED MATCHING NETWORK FOR POWER AMPLIFIERS
7276420	02-Oct-07	11/179685	11-Jul-05	METHOD OF MANUFACTURING A PASSIVE INTEGRATED MATCHING NETWORK FOR POWER AMPLIFIERS
7528069	05-May-09	11/267975	07-Nov-05	FINE PITCH INTERCONNECT AND METHOD OF MAKING
7227783	05-Jun-07	11/116614	28-Apr-05	MEMORY STRUCTURE AND METHOD OF PROGRAMMING
7433803	07-Oct-08	11/116672	27-Apr-05	PERFORMANCE MONITOR WITH PRECISE START-STOP CONTROL
7296137	13-Nov-07	11/140176	27-May-05	MEMORY MANAGEMENT CIRCUITRY TRANSLATION INFORMATION RETRIEVAL DURING DEBUGGING
7322000	22-Jan-08	11/117777	29-Apr-05	METHODS AND APPARATUS FOR EXTENDING SEMICONDUCTOR CHIP TESTING WITH BOUNDARY SCAN REGISTERS
7622313	24-Nov-09	11/193926	29-Jul-05	FABRICATION OF THREE DIMENSIONAL INTEGRATED CIRCUIT EMPLOYING MULTIPLE DIE PANELS
7244989	17-Jul-07	11/144569	02-Jun-05	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
7180158	20-Feb-07	11/144570	02-Jun-05	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
7466006	16-Dec-08	11/134792	19-May-05	STRUCTURE AND METHOD FOR RESURF DIODES WITH A CURRENT DIVERTER
7439584	21-Oct-08	11/363901	28-Feb-06	STRUCTURE AND METHOD FOR RESURF LDMOSFET WITH A CURRENT DIVERTER
7341915	11-Mar-08	11/142057	31-May-05	METHOD OF MAKING PLANAR DOUBLE GATE SILICON-ON INSULATOR STRUCTURES
7440737	21-Oct-08	11/215776	30-Aug-05	NOISE BLANKER CONTROL
7205202	17-Apr-07	11/111450	21-Apr-05	SEMICONDUCTOR DEVICE AND METHOD FOR REGIONAL STRESS CONTROL
7622349	24-Nov-09	11/302937	14-Dec-05	FLOATING GATE NON-VOLATILE MEMORY AND METHOD THEREOF

101


Patent No.	Grant Date	Appl No.	Appl Date	Title
7344933	18-Mar-08	11/324510	03-Jan-06	METHOD OF FORMING DEVICE HAVING A RAISED EXTENSION REGION
7539462	26-May-09	11/199737	08-Aug-05	CONFIGURABLE MULTI-MODE MODULATION SYSTEM AND TRANSMITTER
7608893	27-Oct-09	12/037147	26-Feb-08	MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF
7354831	08-Apr-08	11/199482	08-Aug-05	MULTI-CHANNEL TRANSISTOR STRUCTURE AND METHOD OF MAKING THEREOF
7164998	16-Jan-07	11/063072	22-Feb-05	METHOD FOR DETERMINING PROGRAMMABLE COEFFICIENTS TO REPLICATE FREQUENCY AND SUPPLY VOLTAGE CORRELATION IN AN INTEGRATED CIRCUIT
7167035	23-Jan-07	11/063070	22-Feb-05	DELAY CIRCUITRY AND METHOD THEREFOR
7356628	08-Apr-08	11/129600	13-May-05	PACKET SWITCH WITH MULTIPLE ADDRESSABLE COMPONENTS
7323389	29-Jan-08	11/190411	27-Jul-05	METHOD OF FORMING A FINFET STRUCTURE
7271469	18-Sep-07	11/142077	31-May-05	METHODS OF MAKING INTEGRATED CIRCUITS
7352631	01-Apr-08	11/061005	18-Feb-05	METHODS FOR PROGRAMMING A FLOATING BODY NONVOLATILE MEMORY
7193924	20-Mar-07	11/123514	06-May-05	DUAL-PORT STATIC RANDOM ACCESS MEMORY HAVING IMPROVED CELL STABILITY AND WRITE MARGIN
7242626	10-Jul-07	11/123484	06-May-05	METHOD AND APPARATUS FOR LOW VOLTAGE WRITE IN A STATIC RANDOM ACCESS MEMORY
7388419	17-Jun-08	11/490439	20-Jul-06	PVT VARIATION DETECTION AND COMPENSATION CIRCUIT
7271069	18-Sep-07	11/111451	21-Apr-05	SEMICONDUCTOR DEVICE HAVING A PLURALITY OF DIFFERENT LAYERS AND METHOD THEREFOR
7411466	12-Aug-08	11/457580	14-Jul-06	COIL-LESS OVERTONE CRYSTAL OSCILLATOR
7612619	03-Nov-09	11/387595	23-Mar-06	PHASE DETECTOR DEVICE AND METHOD THEREOF
7403758	22-Jul-08	11/243633	04-Oct-05	LINEARIZED AND BALANCED MIXER APPARATUS AND SIGNAL MIXING METHOD
7138842	21-Nov-06	11/097659	01-Apr-05	FLIP-FLOP CIRCUIT HAVING LOW POWER DATA RETENTION
7570634	04-Aug-09	11/213764	30-Aug-05	PRIORITY QUEUING OF FRAMES IN A TDMA NETWORK
7592248	22-Sep-09	11/298148	09-Dec-05	SEMICONDUCTOR DEVICE HAVING NANOTUBE STRUCTURES AND METHOD OF FORMING
7495465	24-Feb-09	11/490441	20-Jul-06	PVT VARIATION DETECTION AND COMPENSATION CIRCUIT
7605652	20-Oct-09	12/063012	05-Aug-05	LOOP GAIN EQUALIZER FOR RF POWER AMPLIFIER
7268463	11-Sep-07	11/192874	28-Jul-05	STRESS RELEASE MECHANISM IN MEMS DEVICE AND METHOD OF MAKING SAME
7329566	12-Feb-08	11/142111	31-May-05	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
7098073	29-Aug-06	11/108224	18-Apr-05	METHOD FOR STACKING AN INTEGRATED CIRCUIT ON ANOTHER INTEGRATED CIRCUIT
7196427	27-Mar-07	11/108223	18-Apr-05	STRUCTURE HAVING AN INTEGRATED CIRCUIT ON ANOTHER INTEGRATED CIRCUIT WITH AN INTERVENING BENT ADHESIVE ELEMENT
7402476	22-Jul-08	11/152931	15-Jun-05	METHOD FOR FORMING AN ELECTRONIC DEVICE
7158432	02-Jan-07	11/218135	01-Sep-05	MEMORY WITH ROBUST DATA SENSING AND METHOD FOR SENSING DATA
7241695	10-Jul-07	11/244516	06-Oct-05	SEMICONDUCTOR DEVICE HAVING NANO-PILLARS AND METHOD THEREFOR
7355456	08-Apr-08	11/199493	08-Aug-05	WIDE LINEAR RANGE PEAK DETECTOR
7446592	04-Nov-08	11/490440	20-Jul-06	PVT VARIATION DETECTION AND COMPENSATION CIRCUIT
7392026	24-Jun-08	11/098490	04-Apr-05	MULTI-BAND MIXER AND QUADRATURE SIGNAL GENERATOR FOR A MULTI-MODE RADIO RECEIVER
7517742	14-Apr-09	11/158021	21-Jun-05	AREA DIODE FORMATION IN SOI APPLICATION
7595666	29-Sep-09	12/244214	02-Oct-08	AMPLIFIER CIRCUIT FOR DOUBLE SAMPLED ARCHITECTURES
7449923	11-Nov-08	11/206521	17-Aug-05	AMPLIFIER CIRCUIT FOR DOUBLE SAMPLED ARCHITECTURES
7339442	04-Mar-08	11/176034	07-Jul-05	BASEBAND RC FILTER POLE AND ON-CHIP CURRENT TRACKING SYSTEM
7164297	16-Jan-07	11/095066	31-Mar-05	MULTIPLE REFERENCE CLOCK SYNTHESIZER
7230505	12-Jun-07	11/098110	04-Apr-05	VOLTAGE CONTROLLED OSCILLATOR WITH GAIN CONTROL
7187197	06-Mar-07	11/098108	04-Apr-05	TRANSMISSION LINE DRIVER
▇▇▇▇▇▇▇	14-Jul-09	11/▇▇▇▇▇▇	29-Apr-05	FRONT-END METHOD FOR NICAM ENCODING
7109906	19-Sep-06	11/118211	29-Apr-05	NICAM ENCODER FEATURING SYNCHRONIZATION OF A NICAM

102


Patent No.	Grant Date	Appl No.	Appl Date	Title
				PROCESSOR WITH FRONT-END INPUT AND OUTPUT SECTIONS
7327288	05-Feb-08	11/394254	30-Mar-06	VARIABLE INTERPOLATOR FOR NON-UNIFORMLY SAMPLED SIGNALS AND METHOD
7442598	28-Oct-08	11/148455	09-Jun-05	METHOD OF FORMING AN INTERLAYER DIELECTRIC
7599321	06-Oct-09	11/365774	28-Feb-06	PRIORITIZATION OF CONNECTION IDENTIFIERS FOR AN UPLINK SCHEDULER IN A BROADBAND WIRELESS ACCESS COMMUNICATION SYSTEM
7421252	02-Sep-08	11/195478	02-Aug-05	CENTER FREQUENCY CONTROL OF AN INTEGRATED PHASE ROTATOR BAND-PASS FILTER USING VCO COARSE TRIM BITS
7375002	20-May-08	11/168579	28-Jun-05	MIM CAPACITOR IN A SEMICONDUCTOR DEVICE AND METHOD THEREFOR
7575958	18-Aug-09	11/247479	11-Oct-05	PROGRAMMABLE FUSE WITH SILICON GERMANIUM
7649234	19-Jan-10	12/129861	30-May-08	SEMICONDUCTOR DEVICES
7393752	01-Jul-08	11/189587	25-Jul-05	SEMICONDUCTOR DEVICES AND METHOD OF FABRICATION
7339267	04-Mar-08	11/140351	26-May-05	SEMICONDUCTOR PACKAGE AND METHOD FOR FORMING THE SAME
7524707	28-Apr-09	11/209869	23-Aug-05	MODIFIED HYBRID ORIENTATION TECHNOLOGY
7157345	02-Jan-07	11/170444	29-Jun-05	SOURCE SIDE INJECTION STORAGE DEVICE AND METHOD THEREFOR
7211858	01-May-07	11/188603	25-Jul-05	SPLIT GATE STORAGE DEVICE INCLUDING A HORIZONTAL FIRST GATE AND A VERTICAL SECOND GATE IN A TRENCH
7405099	29-Jul-08	11/192198	27-Jul-05	WIDE AND NARROW TRENCH FORMATION IN HIGH ASPECT RATIO MEMS
7582929	01-Sep-09	11/188999	25-Jul-05	ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7619275	17-Nov-09	11/188935	25-Jul-05	Process for forming an ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7256454	14-Aug-07	11/188953	25-Jul-05	ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND A PROCESS FOR FORMING THE SAME
7471560	30-Dec-08	11/834391	06-Aug-07	ELECTRONIC DEVICE INCLUDING A MEMORY ARRAY AND CONDUCTIVE LINES
7262997	28-Aug-07	11/188898	25-Jul-05	ELECTRONIC DEVICE INCLUDING A MEMORY ARRAY AND CONDUCTIVE LINES
7308658	11-Dec-07	11/252019	17-Oct-05	METHOD AND APPARATUS FOR MEASURING TEST COVERAGE
7435646	14-Oct-08	11/208670	22-Aug-05	METHOD FOR FORMING FLOATING GATES WITHIN NVM PROCESS
7205608	17-Apr-07	11/188910	25-Jul-05	ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7226840	05-Jun-07	11/188909	25-Jul-05	PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7285819	23-Oct-07	11/188582	25-Jul-05	NONVOLATILE STORAGE ARRAY WITH CONTINUOUS CONTROL GATE EMPLOYING HOT CARRIER INJECTION PROGRAMMING
7314798	01-Jan-08	11/188583	25-Jul-05	METHOD OF FABRICATING A NONVOLATILE STORAGE ARRAY WITH CONTINUOUS CONTROL GATE EMPLOYING HOT CARRIER INJECTION PROGRAMMING
7112490	26-Sep-06	11/188604	25-Jul-05	HOT CARRIER INJECTION PROGRAMMABLE STRUCTURE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND SPACER CONTROL GATES IN A TRENCH
7459744	02-Dec-08	11/525747	22-Sep-06	HOT CARRIER INJECTION PROGRAMMABLE STRUCTURE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND SPACER CONTROL GATES IN A TRENCH AND A METHOD OF USING THE SAME
7619270	17-Nov-09	11/188591	25-Jul-05	ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7211487	01-May-07	11/188939	25-Jul-05	PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
7642594	05-Jan-10	11/188588	25-Jul-05	ELECTRONIC DEVICE INCLUDING GATE LINES, BIT LINES, OR A COMBINATION THEREOF
7394686	01-Jul-08	11/188585	25-Jul-05	PROGRAMMABLE STRUCTURE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND SPACER CONTROL GATES IN A TRENCH
7250340	31-Jul-07	11/188584	25-Jul-05	METHOD OF FABRICATING PROGRAMMABLE STRUCTURE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND SPACER CONTROL GATES IN A TRENCH
7274247	25-Sep-07	11/098344	04-Apr-05	SYSTEM, METHOD AND PROGRAM PRODUCT FOR WELL-BIAS SET POINT ADJUSTMENT
7292073	06-Nov-07	11/443198	30-May-06	TRANSMISSION LINE DRIVER CIRCUIT

103


Patent No.	Grant Date	Appl No.	Appl Date	Title
7421610	02-Sep-08	11/370381	06-Mar-06	CLOCK GENERATION CIRCUIT
7361551	22-Apr-08	11/355822	16-Feb-06	METHOD FOR MAKING AN INTEGRATED CIRCUIT HAVING AN EMBEDDED NON-VOLATILE MEMORY
7414462	19-Aug-08	11/443405	30-May-06	DIFFERENTIAL RECEIVER CIRCUIT
7394299	01-Jul-08	11/538304	03-Oct-06	DIGITAL CLOCK FREQUENCY MULTIPLIER
7550348	23-Jun-09	11/536190	28-Sep-06	SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
7235823	26-Jun-07	11/536099	28-Sep-06	SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
7132329	07-Nov-06	11/170447	29-Jun-05	SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
7388422	17-Jun-08	11/441415	25-May-06	CHARGE PUMP CIRCUIT FOR HIGH SIDE DRIVE CIRCUIT AND DRIVER DRIVING VOLTAGE CIRCUIT
▇▇▇▇▇▇▇	28-Apr-09	11/▇▇▇▇▇▇	01-Oct-07	STORAGE CIRCUIT AND METHOD THEREFOR
7295487	13-Nov-07	11/132457	19-May-05	STORAGE CIRCUIT AND METHOD THEREFOR
7504289	17-Mar-09	11/258781	26-Oct-05	Process for forming an ELECTRONIC DEVICE INCLUDING TRANSISTOR STRUCTURES WITH SIDEWALL SPACERS [AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE]
7276419	02-Oct-07	11/264068	31-Oct-05	SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
7440731	21-Oct-08	11/191687	27-Jul-05	POWER AMPLIFIER WITH VSWR DETECTION AND CORRECTION FEATURE
7316965	08-Jan-08	11/158793	21-Jun-05	SUBSTRATE CONTACT FOR A CAPPED MEMS AND METHOD OF MAKING THE SUBSTRATE CONTACT AT THE WAFER LEVEL
7369974	06-May-08	11/217577	31-Aug-05	POLYNOMIAL GENERATION METHOD FOR CIRCUIT MODELING
7409654	05-Aug-08	11/252064	17-Oct-05	METHOD AND APPARATUS FOR PERFORMING TEST PATTERN AUTOGRADING
7378314	27-May-08	11/170446	29-Jun-05	SOURCE SIDE INJECTION STORAGE DEVICE WITH CONTROL GATES ADJACENT TO SHARED SOURCE/DRAIN AND METHOD THEREFOR
7303983	04-Dec-07	11/331763	13-Jan-06	ALD GATE ELECTRODE
7378298	27-May-08	11/524457	20-Sep-06	METHOD OF MAKING STACKED DIE PACKAGE
7254080	07-Aug-07	11/355682	16-Feb-06	FUSE CIRCUIT AND ELECTRONIC CIRCUIT
7609779	27-Oct-09	11/363463	27-Feb-06	RF TRANSMITTER WITH INTERLEAVED IQ MODULATION
7292473	06-Nov-07	11/220733	07-Sep-05	METHOD AND APPARATUS FOR PROGRAMMING/ERASING A NON-VOLATILE MEMORY
7580070	25-Aug-09	11/095418	31-Mar-05	SYSTEM AND METHOD FOR ROLL-OFF CORRECTION IN IMAGE PROCESSING
7572699	11-Aug-09	11/626762	24-Jan-07	Process of forming an ELECTRONIC DEVICE INCLUDING FINS AND DISCONTINUOUS STORAGE ELEMENTS [AND PROCESSES OF FORMING[AND USING THE SAME]
7572680	11-Aug-09	12/033716	19-Feb-08	PACKAGED INTEGRATED CIRCUIT WITH ENHANCED THERMAL DISSIPATION
7355289	08-Apr-08	11/192525	29-Jul-05	PACKAGED INTEGRATED CIRCUIT WITH ENHANCED THERMAL DISSIPATION
7651916	26-Jan-10	11/626768	24-Jan-07	ELECTRONIC DEVICE INCLUDING TRENCHES AND DISCONTINUOUS STORAGE ELEMENTS AND PROCESSES OF FORMING AND USING THE SAME
7432164	07-Oct-08	11/342025	27-Jan-06	SEMICONDUCTOR DEVICE COMPRISING A TRANSISTOR HAVING A COUNTER-DOPED CHANNEL REGION AND METHOD FOR FORMING THE SAME
7539272	26-May-09	11/290367	30-Nov-05	FREQUENCY ERROR ESTIMATION AND CORRECTION IN A SAIC LINEAR EQUALIZER
7590419	15-Sep-09	11/433590	12-May-06	FREQUENCY CORRECTION CHANNEL BURST DETECTOR IN A GSM/EDGE COMMUNICATION SYSTEM
7307572	11-Dec-07	11/154416	15-Jun-05	PROGRAMMABLE DUAL INPUT SWITCHED-CAPACITOR GAIN STAGE
7305643	04-Dec-07	11/128659	12-May-05	METHOD OF TILING ANALOG CIRCUITS THAT INCLUDE RESISTORS AND CAPACITORS
7437951	21-Oct-08	11/842776	21-Aug-07	[FLOWMETER AND METHOD FOR THE MAKING THEREOF] Method of using a differential pressure type flowmeter
7261003	28-Aug-07	11/324830	03-Jan-06	FLOWMETER AND METHOD FOR THE MAKING THEREOF
7332414	19-Feb-08	11/159553	22-Jun-05	CHEMICAL DIE SINGULATION TECHNIQUE
7653448	26-Jan-10	11/240314	30-Sep-05	NICAM PROCESSING METHOD
7528015	05-May-09	11/169962	28-Jun-05	TUNABLE ANTIFUSE ELEMENT AND METHOD OF MANUFACTURE
7598784	06-Oct-09	11/245566	07-Oct-05	SYSTEM AND METHOD FOR CONTROLLING SIGNAL TRANSITIONS

104


Patent No.	Grant Date	Appl No.	Appl Date	Title
7505748	17-Mar-09	11/238657	28-Sep-05	LINEAR VOLTAGE CONTROLLED VARIABLE ATTENUATOR WITH LINEAR DB/V GAIN SLOPE
7511319	31-Mar-09	11/361624	24-Feb-06	METHOD AND APPARATUS FOR A STEPPED-DRIFT MOSFET
7425464	16-Sep-08	11/373423	10-Mar-06	SEMICONDUCTOR DEVICE PACKAGING
7215268	08-May-07	11/250993	14-Oct-05	SIGNAL CONVERTERS WITH MULTIPLE GATE DEVICES
7439791	21-Oct-08	11/344511	31-Jan-06	TEMPERATURE COMPENSATION DEVICE AND METHOD THEREOF
7452768	18-Nov-08	11/257972	25-Oct-05	MULTIPLE DEVICE TYPES INCLUDING AN INVERTED-T CHANNEL TRANSISTOR AND METHOD THEREFOR
7371626	13-May-08	11/556368	03-Nov-06	METHOD [AND APPARATUS] FOR MAINTAINING TOPOGRAPHICAL UNIFORMITY OF A SEMICONDUCTOR MEMORY ARRAY
7151302	19-Dec-06	11/165736	24-Jun-05	METHOD AND APPARATUS FOR MAINTAINING TOPOGRAPHICAL UNIFORMITY OF A SEMICONDUCTOR MEMORY ARRAY
7259999	21-Aug-07	11/258745	26-Oct-05	NON-VOLATILE EMORY CELL ARRAY FOR IMPROVED DATA RETENTION AND METHOD OF OPERATING THEREOF
7651935	26-Jan-10	11/237346	27-Sep-05	[ELECTRONIC DEVICE WITH A GATE ELECTRODE HAVING AT LEAST TWO PORTIONS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE] Process of forming an electronic device including active regions and gate electrodes of different compositions overlying the active regions
7593202	22-Sep-09	11/264557	01-Nov-05	ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT FOR MULTIPLE POWER DOMAIN INTEGRATED CIRCUIT
7339241	04-Mar-08	11/216974	31-Aug-05	FINFET STRUCTURE WITH CONTACTS
7342833	11-Mar-08	11/209294	23-Aug-05	NONVOLATILE MEMORY CELL PROGRAMMING
7238561	03-Jul-07	11/195510	02-Aug-05	METHOD FOR FORMING UNIAXIALLY STRAINED DEVICES
7432122	07-Oct-08	11/327686	06-Jan-06	ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
7573114	11-Aug-09	12/201074	29-Aug-08	ELECTRONIC DEVICE INCLUDING A GATED DIODE
7539888	26-May-09	11/395781	31-Mar-06	MESSAGE BUFFER FOR A RECEIVER APPARATUS ON A COMMUNICATIONS BUS
7602861	13-Oct-09	11/495500	28-Jul-06	WIRELESS RECEIVER FOR REMOVING DIRECT CURRENT OFFSET COMPONENT
7593485	22-Sep-09	11/443199	30-May-06	WIRELESS RECEIVER FOR REMOVING DIRECT CURRENT OFFSET COMPONENT
7510922	31-Mar-09	11/339953	26-Jan-06	SPACER T-GATE STRUCTURE FOR CoSi2 EXTENDIBILITY
7480837	20-Jan-09	11/142639	01-Jun-05	METHOD OF MONITORING TIMEOUT CONDITIONS AND DEVICE THEREFOR
7544575	09-Jun-09	11/337036	19-Jan-06	A DUAL METAL SILICIDE SCHEME USING A DUAL SPACER PROCESS
7432729	07-Oct-08	11/328645	10-Jan-06	METHODS OF TESTING ELECTRONIC DEVICES
7456055	25-Nov-08	11/375890	15-Mar-06	[ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN AND A] PROCESS FOR FORMING THE ELECTRONIC DEVICE including semiconductor fins
7279997	09-Oct-07	11/250994	14-Oct-05	VOLTAGE CONTROLLED OSCILLATOR WITH A MULTIPLE GATE TRANSISTOR AND METHOD THEREFOR
7618902	17-Nov-09	11/290320	▇▇-▇▇▇-▇▇	▇▇▇▇▇▇ TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION OF A METAL-CONTAINING LAYER
7264986	04-Sep-07	11/239783	30-Sep-05	MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME
7425485	16-Sep-08	11/239986	30-Sep-05	[MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME] Method for forming microelectronic assembly
7575975	18-Aug-09	11/263120	31-Oct-05	METHOD FOR FORMING A PLANAR AND VERTICAL SEMICONDUCTOR STRUCTURE HAVING A STRAINED SEMICONDUCTOR LAYER
7265059	04-Sep-07	11/240243	30-Sep-05	MULTIPLE FIN FORMATION
7553704	30-Jun-09	11/169951	28-Jun-05	ANTIFUSE ELEMENT AND METHOD OF MANUFACTURE
7414877	19-Aug-08	11/337355	23-Jan-06	ELECTRONIC DEVICE INCLUDING A STATIC-RANDOM-ACCESS MEMORY CELL AND A PROCESS OF FORMING THE ELECTRONIC DEVICE
7376777	20-May-08	11/233915	23-Sep-05	PERFORMING AN N-BIT WRITE ACCESS TO AN MXN-BIT-ONLY PERIPHERAL
7563681	21-Jul-09	11/341973	27-Jan-06	DOUBLE-GATED NON-VOLATILE MEMORY AND METHODS FOR FORMING THEREOF
7256657	14-Aug-07	11/251467	14-Oct-05	VOLTAGE CONTROLLED OSCILLATOR HAVING DIGITALLY CONTROLLED PHASE ADJUSTMENT AND METHOD THEREFOR
7579282	25-Aug-09	11/331786	13-Jan-06	METHOD FOR REMOVING METAL FOOT DURING HIGH-K

105


Patent No.	Grant Date	Appl No.	Appl Date	Title
				DIELECTRIC/METAL DATE ETCHING
7339404	04-Mar-08	11/508617	23-Aug-06	DEGLITCH FILTER
7539277	26-May-09	11/222543	09-Sep-05	BINARY STREAM SWITCHING CONTROLLED MODULUS DIVIDER FOR FRACTIONAL FREQUENCY SYNTHESIS
7420202	02-Sep-08	11/269303	08-Nov-05	ELECTRONIC DEVICE INCLUDING A TRANSISTOR STRUCTURE HAVING AN ACTIVE REGION ADJACENT TO A STRESSOR LAYER AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
7511360	31-Mar-09	11/300091	14-Dec-05	SEMICONDUCTOR DEVICE HAVING STRESSORS AND METHOD FOR FORMING
7145084	05-Dec-06	11/215888	30-Aug-05	RADIATION SHIELDED MODULE AND METHOD OF SHIELDING MICROELECTRONIC DEVICES
7510956	31-Mar-09	11/343623	30-Jan-06	MOS DEVICE WITH MULTI-LAYER GATE STACK
7358616	15-Apr-08	11/226025	14-Sep-05	SEMICONDUCTOR STACKED DIE/WAFER CONFIGURATION AND PACKAGING AND METHOD THEREOF
7378920	27-May-08	11/354472	14-Feb-06	METHODS AND APPARATUS FOR A HIGH-FREQUENCY OUTPUT MATCH CIRCUIT
7400172	15-Jul-08	11/851381	06-Sep-07	▇▇▇▇▇▇ CAPACITANCE TOLERANT BUFFER ELEMENT
7602014	13-Oct-09	12/109215	24-Apr-08	SUPERJUNCTION POWER MOSFET
7378317	27-May-08	11/304196	14-Dec-05	SUPERJUNCTION POWER MOSFET
7446001	04-Nov-08	11/349875	08-Feb-06	METHOD FOR FORMING A SEMICONDUCTOR-ON-INSULATOR (SOI) BODY-CONTACTED DEVICE WITH A PORTION OF DRAIN REGION REMOVED
7364970	29-Apr-08	11/240242	30-Sep-05	A METHOD OF MAKING A MULTI-BIT NON-VOLATILE MEMORY (NVM) CELL AND STRUCTURE
7335602	26-Feb-08	11/333844	18-Jan-06	CHARGE-FREE LAYER BY LAYER ETCHING OF DIELECTRICS
7312129	25-Dec-07	11/339101	25-Jan-06	METHOD FOR PRODUCING TWO GATES CONTROLLING THE SAME CHANNEL
7651939	26-Jan-10	11/742942	01-May-07	METHOD OF BLOCKING A VOID DURING CONTACT FORMATION [PROCESS AND DEVICE HAVING THE SAME]
7323373	29-Jan-08	11/339133	25-Jan-06	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH DECREASED UNDERCUTTING OF SEMICONDUCTOR MATERIAL
7435639	14-Oct-08	11/443627	31-May-06	DUAL SURFACE SOI BY LATERAL EPITAXIAL OVERGROWTH
7346820	18-Mar-08	11/388154	23-Mar-06	TESTING OF DATA RETENTION LATCHES IN CIRCUIT DEVICES
7206214	17-Apr-07	11/197814	05-Aug-05	ONE TIME PROGRAMMABLE MEMORY AND METHOD OF OPERATION
7491600	17-Feb-09	11/267442	04-Nov-05	NANOCRYSTAL BITCELL PROCESS INTEGRATION FOR HIGH DENSITY APPLICATION
7245519	17-Jul-07	11/209117	22-Aug-05	DIGITALLY PROGRAMMABLE CAPACITOR ARRAY
7403071	22-Jul-08	11/374870	14-Mar-06	HIGH LINEARITY AND LOW NOISE AMPLIFIER WITH CONTINUOUSLY VARIABLE GAIN CONTROL
7534162	19-May-09	11/221375	06-Sep-05	GROOVED PLATEN WITH CHANNELS OR PATHWAY TO AMBIENT AIR
7432748	07-Oct-08	11/538295	03-Oct-06	SEQUENCE-INDEPENDENT POWER-ON RESET FOR MULTIVOLTAGE CIRCUITS
7442591	28-Oct-08	11/406638	19-Apr-06	METHOD OF MAKING A MULTI-GATE DEVICE
7383393	03-Jun-08	11/261357	28-Oct-05	SYSTEM AND METHOD FOR COOPERATIVE PREFETCHING
7268588	11-Sep-07	11/170398	29-Jun-05	CASCADABLE LEVEL SHIFTER CELL
7530039	05-May-09	11/524655	13-Jun-06	METHODS AND APPARATUS FOR SIMULATING DISTRIBUTED EFFECTS
7520797	21-Apr-09	11/221376	06-Sep-05	PLATEN ENDPOINT WINDOW WITH PRESSURE RELIEF
7653822	26-Jan-10	11/377993	17-Mar-06	ENTRY INTO A LOW POWER MODE UPON APPLICATION OF POWER AT A PROCESSING DEVICE
7538002	26-May-09	11/361171	24-Feb-06	SEMICONDUCTOR PROCESS INTEGRATING SOURCE/DRAIN STRESSORS AND INTERLEVEL DIELECTRIC LAYER STRESSORS
7494856	24-Feb-09	11/393340	30-Mar-06	SEMICONDUCTOR FABRICATION PROCESS USING ETCH STOP LAYER TO OPTIMIZE FORMATION OF SOURCE/DRAIN STRESSOR
7642182	05-Jan-10	11/972475	10-Jan-08	ESD PROTECTION FOR PASSIVE INTEGRATED DEVICES
7335955	26-Feb-08	11/300710	14-Dec-05	ESD PROTECTION FOR PASSIVE INTEGRATED DEVICES
7488635	10-Feb-09	11/260849	26-Oct-05	SEMICONDUCTOR STRUCTURE WITH REDUCED GATE DOPING AND METHODS FOR FORMING THEREOF
7362190	22-Apr-08	11/297884	09-Dec-05	OSCILLATOR CIRCUIT WITH HIGH PASS FILTER AND LOW PASS FILTER IN OUTPUT STAGE
7446411	04-Nov-08	11/257784	24-Oct-05	SEMICONDUCTOR STRUCTURE AND METHOD OF ASSEMBLY

106


Patent No.	Grant Date	Appl No.	Appl Date	Title
7445967	04-Nov-08	11/336368	20-Jan-06	METHOD OF PACKAGING A SEMICONDUCTOR DIE AND PACKAGE THEREOF
7262617	28-Aug-07	11/493424	26-Jul-06	METHOD FOR TESTING INTEGRATED CIRCUIT, AND WAFER
7403410	22-Jul-08	11/373532	10-Mar-06	SWITCH DEVICE AND METHOD
7482880	27-Jan-09	11/557721	08-Nov-06	FREQUENCY MODULATED OUTPUT CLOCK FROM A DIGITAL FREQUENCY/PHASE LOCKED LOOP
7420426	02-Sep-08	11/323294	30-Dec-05	FREQUENCY MODULATED OUTPUT CLOCK FROM A DIGITAL PHASE LOCKED LOOP
7429790	30-Sep-08	11/257783	24-Oct-05	SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
7358792	15-Apr-08	11/503650	14-Aug-06	DISCHARGE DEVICE AND DC POWER SUPPLY SYSTEM
7236014	26-Jun-07	11/297191	07-Dec-05	CIRCUIT AND METHOD FOR PEAK DETECTION OF AN ANALOG SIGNAL
7491630	17-Feb-09	11/375768	15-Mar-06	UNDOPED GATE POLY INTEGRATION FOR IMPROVED GATE PATTERNING AND COBALT SILICIDE EXTENDIBILITY
7468313	23-Dec-08	11/420849	30-May-06	ENGINEERING STRAIN IN THICK STRAINED-SOI SUBSTRATES
7282395	16-Oct-07	11/297103	07-Dec-05	METHOD OF MAKING EXPOSED PAD BALL GRID ARRAY PACKAGE
7484147	27-Jan-09	11/503649	14-Aug-06	SEMICONDUCTOR INTEGRATED CIRCUIT
7583945	01-Sep-09	11/329752	10-Jan-06	AMPLIFIER WITH IMPROVED NOISE PERFORMANCE AND EXTENDED GAIN CONTROL RANGE
7411270	12-Aug-08	11/397493	03-Apr-06	COMPOSITE CAPACITOR AND METHOD FOR FORMING THE SAME
7420296	02-Sep-08	11/508618	23-Aug-06	POWER SUPPLY CIRCUIT
7622339	▇▇-▇▇▇-▇▇	▇▇/▇▇▇▇▇▇	▇▇-▇▇▇-▇▇	▇▇▇ T-GATE STRUCTURE FOR CoSi2 EXTENDIBILITY
7590184	15-Sep-09	11/247481	11-Oct-05	BLIND PREAMBLE DETECTION FOR AN ORTHOGONAL FREQUENCY DIVISION MULTIPLEXED SAMPLE STREAM
7336533	26-Feb-08	11/337775	23-Jan-06	ELECTRONIC DEVICE AND METHOD FOR OPERATING A MEMORY CIRCUIT
7332979	19-Feb-08	11/261978	28-Oct-05	LOW NOISE REFERENCE OSCILLATOR WITH FAST START-UP
7427549	23-Sep-08	11/278180	31-Mar-06	METHOD OF SEPARATING STRUCTURE IN A SEMICONDUCTOR DEVICE
7495939	24-Feb-09	11/557388	07-Nov-06	RIPPLE FILTER CIRCUIT
7327194	05-Feb-08	11/290286	30-Nov-05	LOW VOLTAGE LOW POWER CLASS A/B OUTPUT STAGE
7420401	02-Sep-08	11/453324	13-Jun-06	LOW PIN COUNT RESET CONFIGURATION
7200020	03-Apr-07	11/215655	30-Aug-05	STORAGE ELEMENT WITH CLEAR OPERATION AND METHOD THEREOF
7441102	21-Oct-08	11/364104	28-Feb-06	INTEGRATED CIRCUIT WITH FUNCTIONAL STATE CONFIGURABLE MEMORY AND METHOD OF CONFIGURING FUNCTIONAL STATES OF THE INTEGRATED CIRCUIT MEMORY
7397703	08-Jul-08	11/385108	21-Mar-06	NON-VOLATILE MEMORY WITH CONTROLLED PROGRAM/ERASE
7312654	25-Dec-07	11/314203	20-Dec-05	QUIET POWER UP AND POWER DOWN OF A DIGITAL AUDIO AMPLIFIER
7456679	25-Nov-08	11/416273	28-Apr-06	REFERENCE CIRCUIT AND METHOD FOR GENERATING A REFERENCE SIGNAL FROM A REFERENCE CIRCUIT
7279409	09-Oct-07	11/263440	31-Oct-05	METHOD FOR FORMING MULTI-LAYER BUMPS ON A SUBSTRATE
7422973	09-Sep-08	11/341302	27-Jan-06	METHOD FOR FORMING MULTI-LAYER BUMPS ON A SUBSTRATE
7494924	24-Feb-09	11/370387	06-Mar-06	METHOD FOR FORMING REINFORCED INTERCONNECTS ON A SUBSTRATE
7371677	13-May-08	11/240241	30-Sep-05	LATERALLY GROWN NANOTUBES AND METHOD OF FORMATION
7548102	16-Jun-09	11/457668	14-Jul-06	DATA LATCH with minimal setup time and launch delay
7262615	28-Aug-07	11/263089	31-Oct-05	METHOD AND APPARATUS FOR TESTING A SEMICONDUCTOR STRUCTURE HAVING TOP-SIDE AND BOTTOM-SIDE CONNECTIONS
7432130	07-Oct-08	11/341303	27-Jan-06	METHOD OF PACKAGING SEMICONDUCTOR DIE without lead frame or substrate
7236402	26-Jun-07	11/290321	30-Nov-05	METHOD AND APPARATUS FOR PROGRAMMING/ERASING A NON-VOLATILE MEMORY
7315268	01-Jan-08	11/453200	15-Jun-06	INTEGRATOR CURRENT MATCHING
7443325	28-Oct-08	11/979089	31-Oct-07	SIGMA-DELTA MODULATOR
7559041	07-Jul-09	11/559731	14-Nov-06	[FLIP FLOP FUNCTION DEVICE, SEMICONDUCTOR INTEGRATED CIRCUIT, AND] METHOD AND APPARATUS FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
7301225	27-Nov-07	11/364047	▇▇-▇▇▇-▇▇	▇▇▇▇▇-▇▇▇ ▇▇▇▇ ▇▇▇▇▇
▇▇▇▇▇▇▇	09-Oct-07	11/364792	28-Feb-06	METHOD OF TESTING FOR POWER AND GROUND CONTINUITY OF A

107


Patent No.	Grant Date	Appl No.	Appl Date	Title
				SEMICONDUCTOR DEVICE
7378306	27-May-08	11/375763	14-Mar-06	SELECTIVE SILICON DEPOSITION FOR PLANARIZED DUAL SURFACE ORIENTATION INTEGRATION
7286423	23-Oct-07	11/362694	27-Feb-06	BIT LINE PRECHARGE IN EMBEDDED MEMORY
7440335	21-Oct-08	11/438890	23-May-06	CONTENTION-FREE HIERARCHICAL BIT LINE IN EMBEDDED MEMORY AND METHOD THEREOF
7534693	19-May-09	11/326524	04-Jan-06	THIN-FILM CAPACITOR WITH A FIELD MODIFICATION LAYER AND METHODS FOR FORMING THE SAME
7369452	06-May-08	11/400417	07-Apr-06	PROGRAMMABLE CELL
7599236	06-Oct-09	11/448225	07-Jun-06	IN-CIRCUIT VT DISTRIBUTION BIT COUNTER FOR NON-VOLATILE MEMORY DEVICES
7479813	20-Jan-09	11/424132	14-Jun-06	LOW VOLTAGE CIRCUIT WITH VARIABLE SUBSTRATE BIAS
7362134	22-Apr-08	11/388921	24-Mar-06	CIRCUIT AND METHOD FOR LATCH BYPASS
7550804	23-Jun-09	11/390796	27-Mar-06	SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
7635920	22-Dec-09	11/360925	23-Feb-06	METHOD AND APPARATUS FOR INDICATING DIRECTIONALITY IN INTEGRATED CIRCUIT MANUFACTURING
7491622	17-Feb-09	11/409790	24-Apr-06	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A LAYER FORMED USING AN INDUCTIVELY COUPLED PLASMA
7446026	04-Nov-08	11/349595	08-Feb-06	METHOD OF FORMING A [SEMICONDUCTOR] CMOS DEVICE WITH STRESSOR SOURCE/DRAIN REGIONS
7413970	19-Aug-08	11/375894	15-Mar-06	[ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN AND A] PROCESS FOR FORMING THE ELECTRONIC DEVICE including a semiconductor fin
7544548	09-Jun-09	11/443628	31-May-06	TRENCH LINER FOR DSO INTEGRATION
7402477	22-Jul-08	11/393563	30-Mar-06	METHOD OF MAKING A MULTIPLE CRYSTAL ORIENTATION SEMICONDUCTOR DEVICE
7285452	23-Oct-07	11/351518	10-Feb-06	METHOD TO SELECTIVELY FORM REGIONS HAVING DIFFERING PROPERTIES AND STRUCTURE
7553753	30-Jun-09	11/469158	31-Aug-06	METHOD OF FORMING CRACK ARREST FEATURES IN EMBEDDED DEVICE BUILD-UP PACKAGE AND PACKAGE THEREOF
7534706	19-May-09	11/348021	06-Feb-06	RECESSED POLY EXTENSION T-GATE
7524693	28-Apr-09	11/383659	16-May-06	METHOD AND APPARATUS FOR FORMING AN ELECTRICAL CONNECTION TO A SEMICONDUCTOR SUBSTRATE
7650579	19-Jan-10	11/441367	25-May-06	MODEL CORRESPONDENCE METHOD AND DEVICE
7564275	21-Jul-09	11/450623	09-Jun-06	SWITCHING CIRCUIT AND A METHOD OF DRIVING A LOAD
▇▇▇▇▇▇▇	21-Jul-09	11/▇▇▇▇▇▇	22-Feb-06	METHOD FOR IMPROVING SELF-ALIGNED SILICIDE EXTENDIBILITY WITH SPACER RECESS USING AN AGGREGATED SPACER RECESS ETCH (ASRE) INTEGRATION
7535060	19-May-09	11/370283	08-Mar-06	CHARGE STORAGE STRUCTURE FORMATION IN TRANSISTOR WITH VERTICAL CHANNEL REGION
7631229	08-Dec-09	11/410218	24-Apr-06	SELECTIVE BIT ERROR DETECTION AT A BUS DEVICE
7617437	10-Nov-09	11/359329	21-Feb-06	ERROR CORRECTION DEVICE AND METHOD THEREOF
7418675	26-Aug-08	11/342747	30-Jan-06	SYSTEM AND METHOD FOR REDUCING THE POWER CONSUMPTION OF CLOCK SYSTEMS
7288458	30-Oct-07	11/302770	14-Dec-05	SOI ACTIVE LAYER WITH DIFFERENT SURFACE ORIENTATION
7274203	25-Sep-07	11/257706	25-Oct-05	DESIGN-FOR-TEST CIRCUIT FOR LOW PIN COUNT DEVICES
7444568	28-Oct-08	11/355681	16-Feb-06	METHOD AND APPARATUS FOR TESTING A DATA PROCESSING SYSTEM
7602837	13-Oct-09	11/254392	20-Oct-05	BEAMFORMING FOR NON-COLLABORATIVE, SPACE DIVISION MULTIPLE ACCESS SYSTEMS
7074118	11-Jul-06	11/264185	01-Nov-05	POLISHING CARRIER HEAD WITH A MODIFIED PRESSURE PROFILE
7560318	14-Jul-09	11/374372	13-Mar-06	[ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE] Process for forming an electronic device including semiconductor layers having different stresses
7141989	28-Nov-06	11/401592	10-Apr-06	METHODS AND APPARATUS FOR A MEMS VARACTOR
7443174	28-Oct-08	11/400160	06-Apr-06	ELECTRICAL FIELD RECIPROCAL DISPLACEMENT SENSORS
7592224	22-Sep-09	11/393287	30-Mar-06	PROGRAMMABLE STRUCTURE INCLUDING CONTROL GATE OVERLYING SELECT GATE FORMED IN A TRENCH
7544980	09-Jun-09	11/342155	27-Jan-06	SPLIT GATE MEMORY CELL IN A FINFET
7456465	25-Nov-08	11/240240	30-Sep-05	SPLIT GATE MEMORY CELL AND METHOD THEREFOR
7437698	14-Oct-08	11/290368	30-Nov-05	METHOD AND PROGRAM PRODUCT FOR PROTECTING INFORMATION IN EDA TOOL DESIGN VIEWS

108


Patent No.	Grant Date	Appl No.	Appl Date	Title
7649957	19-Jan-10	11/387466	22-Mar-06	NON-OVERLAPPING MULTI-STAGE CLOCK GENERATOR SYSTEM
7489026	10-Feb-09	11/590327	31-Oct-06	METHODS AND APPARATUS FOR A QUAD FLAT NO-LEAD (QFN) PACKAGE
7652357	26-Jan-10	12/350547	08-Jan-09	QUAD FLAT NO-LEAD (QFN) PACKAGES
7640389	29-Dec-09	11/364129	28-Feb-06	NON-VOLATILE MEMORY HAVING A MULTIPLE BLOCK ERASE MODE AND METHOD THEREFOR
7410544	12-Aug-08	11/408311	21-Apr-06	METHOD FOR CLEANING ELECTROLESS PROCESS TANK
7528029	05-May-09	11/408347	21-Apr-06	STRESSOR INTEGRATION AND METHOD THEREOF
7452750	18-Nov-08	11/365119	▇▇-▇▇▇-▇▇	▇▇▇▇▇▇▇▇▇ ▇▇▇▇▇▇▇▇▇▇ ▇▇▇▇▇▇
▇▇▇▇▇▇▇	07-Apr-09	11/400945	10-Apr-06	[ELECTRONIC DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE] Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer
7428172	23-Sep-08	11/487863	17-Jul-06	CONCURRENT PROGRAMMING AND PROGRAM VERIFICATION OF FLOATING GATE TRANSISTOR
7564738	21-Jul-09	11/464129	11-Aug-06	DOUBLE-RATE MEMORY
7619464	17-Nov-09	11/460732	28-Jul-06	CURRENT COMPARISON BASED VOLTAGE BIAS GENERATOR FOR ELECTRONIC DATA STORAGE DEVICES
7358743	15-Apr-08	11/380479	27-Apr-06	ACCUMULATED CURRENT COUNTER AND METHOD THEREOF
7580288	25-Aug-09	11/420095	24-May-06	MULTI-LEVEL VOLTAGE ADJUSTMENT
7378339	27-May-08	11/278042	30-Mar-06	BARRIER FOR USE IN 3-D INTEGRATION OF CIRCUITS
7579258	25-Aug-09	11/339132	25-Jan-06	SEMICONDUCTOR INTERCONNECT HAVING ADJACENT RESERVOIR FOR BONDING AND METHOD FOR FORMATION
7440354	21-Oct-08	11/433998	15-May-06	MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
▇▇▇▇▇▇▇	30-Oct-07	11/▇▇▇▇▇▇	25-Apr-06	SYSTEM AND METHOD FOR ANALOG-TO-DIGITAL CONVERSION
7556978	07-Jul-09	11/363791	28-Feb-06	PIEZOELECTRIC MEMS SWITCHES AND METHODS OF MAKING
7179151	20-Feb-07	11/390292	27-Mar-06	POLISHING PAD, A POLISHING APPARATUS, AND A PROCESS FOR USING THE POLISHING PAD
7512723	31-Mar-09	11/647653	29-Dec-06	Queued interface devices, multi-core peripheral systems, and METHODS [AND APPARATUS] FOR SHARING A PERIPHERAL IN A MULTI-CORE SYSTEM
7628072	08-Dec-09	11/489789	19-Jul-06	MEMS DEVICE AND METHOD OF REDUCING STICTION IN A MEMS DEVICE
7573101	11-Aug-09	12/021431	29-Jan-08	EMBEDDED SUBSTRATE INTERCONNECT FOR UNDERSIDE CONTACT TO SOURCE AND DRAIN REGIONS
7345344	18-Mar-08	11/356229	16-Feb-06	EMBEDDED SUBSTRATE INTERCONNECT FOR UNDERSIDE CONTACT TO SOURCE AND DRAIN REGIONS
7456798	25-Nov-08	11/476387	28-Jun-06	STACKED LOOP ANTENNA
7397297	08-Jul-08	11/670398	01-Feb-07	LEVEL SHIFTER CIRCUIT
7608913	27-Oct-09	11/360285	23-Feb-06	NOISE ISOLATION BETWEEN CIRCUIT BLOCKS IN AN INTEGRATED CIRCUIT CHIP
7419866	02-Sep-08	11/375893	15-Mar-06	ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR ISLANDS OF DIFFERENT THICKNESSES OVER AN INSULATING LAYER AND A PROCESS OF FORMING THE SAME
7446017	04-Nov-08	11/444091	31-May-06	METHODS AND APPARATUS FOR RF SHIELDING IN VERTICALLY-INTEGRATED SEMICONDUCTOR DEVICES
7579238	25-Aug-09	11/668210	29-Jan-07	METHOD OF FORMING A MULTI-BIT NONVOLATILE MEMORY DEVICE
7445984	04-Nov-08	11/459837	25-Jul-06	METHOD FOR REMOVING NANOCLUSTERS FROM SELECTED REGIONS
7432158	07-Oct-08	11/459843	25-Jul-06	METHOD FOR RETAINING NANOCLUSTER SIZE AND ELECTRICAL CHARACTERISTICS DURING PROCESSING
7411467	12-Aug-08	11/467791	28-Aug-06	OVERTONE CRYSTAL OSCILLATOR AUTOMATIC CALIBRATION SYSTEM
7376807	20-May-08	11/360926	23-Feb-06	DATA PROCESSING SYSTEM HAVING ADDRESS TRANSLATION BYPASS AND METHOD THEREFOR
7384819	10-Jun-08	11/414440	28-Apr-06	METHOD OF FORMING STACKABLE PACKAGE
7502893	10-Mar-09	11/553146	26-Oct-06	SYSTEM AND METHOD FOR REPORTING CACHE COHERENCY STATE RETAINED WITHIN A CACHE HIERARCHY OF A PROCESSING NODE
7497763	03-Mar-09	11/390176	27-Mar-06	POLISHING PAD, A POLISHING APPARATUS, AND A PROCESS FOR USING THE POLISHING PAD
7414316	19-Aug-08	11/366928	01-Mar-06	METHODS AND APPARATUS FOR THERMAL ISOLATION IN VERTICALLY-INTEGRATED SEMICONDUCTOR DEVICES

109


Patent No.	Grant Date	Appl No.	Appl Date	Title
7603094	13-Oct-09	11/452457	14-Jun-06	DC OFFSET CORRECTION FOR DIRECT CONVERSION RECEIVERS
7583542	01-Sep-09	11/277694	28-Mar-06	MEMORY WITH CHARGE STORAGE LOCATIONS
7432725	07-Oct-08	11/376810	15-Mar-06	ELECTRICAL FIELD SENSORS for detecting fluid presence or level
7528062	05-May-09	11/586807	25-Oct-06	INTEGRATED MATCHING NETWORK AND METHOD FOR MANUFACTURING INTEGRATED MATCHING NETWORKS
7514340	07-Apr-09	11/368720	06-Mar-06	COMPOSITE INTEGRATED DEVICE AND METHODS FOR FORMING THEREOF
7405102	29-Jul-08	11/450667	09-Jun-06	METHODS AND APPARATUS FOR THERMAL MANAGEMENT IN A MULTI-LAYER EMBEDDED CHIP STRUCTURE
7368668	06-May-08	11/347461	▇▇-▇▇▇-▇▇	▇▇▇▇▇▇ ▇▇▇▇▇▇▇ FOR SEMICONDUCTORS
7624361	24-Nov-09	11/775228	10-Jul-06	METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
7656045	02-Feb-10	11/360336	23-Feb-06	CAP LAYER FOR AN ALUMINUM COPPER BOND PAD
7655550	02-Feb-10	11/427980	30-Jun-06	A METHOD OF MAKING METAL GATE TRANSISTORS
7479429	20-Jan-09	11/669307	31-Jan-07	SPLIT GATE MEMORY CELL METHOD
7276435	02-Oct-07	11/445657	02-Jun-06	DIE LEVEL METAL DENSITY GRADIENT FOR IMPROVED FLIP CHIP PACKAGE RELIABILITY
5822374	13-Oct-98	08/660399	07-Jun-96	METHOD FOR FINE GAINS ADJUSTMENT IN AN ADSL COMMUNICATIONS SYSTEM
5740382	14-Apr-98	08/623482	28-Mar-96	METHOD AND APPARATUS FOR ACCESSING A CHIP-SELECTABLE DEVICE IN A DATA PROCESSING SYSTEM
5799160	25-Aug-98	08/669071	24-Jun-96	CIRCUIT AND METHOD FOR CONTROLLING BUS ARBITRATION
5969383	19-Oct-99	08/876576	16-Jun-97	SPLIT GATE MEMORY DEVICE AND METHOD FOR ACCESSING THE SAME
5729493	17-Mar-98	08/703176	23-Aug-96	MEMORY SUITABLE FOR OPERATION AT LOW POWER SUPPLY VOLTAGES AND SENSE AMPLIFIER THEREFOR
5754482	19-May-98	08/845097	21-Apr-97	MEMORY USING UNDECODED PRECHARGE FOR HIGH SPEED DATA SENSING
5721704	24-Feb-98	08/▇▇▇▇▇▇	23-Aug-96	CONTROL GATE DRIVER CIRCUIT FOR A NON-VOLATILE MEMORY AND MEMORY USING SAME
5726502	10-Mar-98	08/638095	26-Apr-96	BUMPED SEMICONDUCTOR DEVICE WITH ALIGNMENT FEATURES AND METHOD FOR MAKING THE SAME
5646949	08-Jul-97	08/658185	04-Jun-96	METHOD AND APPARATUS FOR GENERATING INSTRUCTIONS FOR USE IN TESTING A MICROPROCESSOR
5790415	04-Aug-98	08/630189	10-Apr-96	COMPLEMENTARY NETWORK REDUCTION FOR LOAD MODELING
5812595	22-Sep-98	08/672732	01-Jul-96	WAVEFORM SHAPING CIRCUIT FOR A MULTIPLEXED INFORMATION BUS TRANSMITTER
5964863	12-Oct-99	08/632208	15-Apr-96	METHOD AND APPARATUS FOR PROVIDING PIPE FULLNESS INFORMATION EXTERNAL TO A DATA PROCESSING SYSTEM
6010927	04-Jan-00	08/959554	28-Oct-97	A METHOD FOR MAKING A FERROELECTRIC DEVICE HAVING A TANTALUM NITRIDE BARRIER LAYER
5716875	10-Feb-98	08/609697	01-Mar-96	METHOD FOR MAKING A FERROELECTRIC DEVICE
5742527	21-Apr-98	08/616818	15-Mar-96	FLEXIBLE ASYMMETRICAL DIGITAL SUBSCRIBER LINE (ADSL) RECEIVER, CENTRAL OFFICE USING SAME, AND METHOD THEREFOR
5781728	14-Jul-98	08/616819	15-Mar-96	FLEXIBLE ASYMMETRICAL DIGITAL SUBSCRIBER LINE (ADSL) TRANSMITTER, REMOTE TERMINAL USING SAME, AND METHOD THEREFOR
6137466	24-Oct-00	08/▇▇▇▇▇▇	03-Nov-97	LCD DRIVER MODULE AND METHOD THEREOF
▇▇▇▇▇▇▇	29-Jun-99	08/▇▇▇▇▇▇	21-Jun-96	MULTIPLEXED DRIVER SYSTEM REQUIRING A REDUCED NUMBER OF AMPLIFIER CIRCUITS
5740109	14-Apr-98	08/703173	23-Aug-96	NON-LINEAR CHARGE PUMP
6523095	18-Feb-03	08/684717	22-Jul-96	METHOD AND DATA PROCESSING SYSTEM FOR USING QUICK DECODE INSTRUCTIONS
5835746	10-Nov-98	08/845096	21-Apr-97	METHOD AND APPARATUS FOR FETCHING AND ISSUING DUAL-WORD OR MULTIPLE INSTRUCTIONS IN A DATA PROCESSING SYSTEM
5729225	17-Mar-98	08/710792	23-Sep-96	METHOD AND APPARATUS FOR ASYNCHRONOUS DIGITAL MIXING
5854944	29-Dec-98	08/645014	09-May-96	METHOD AND APPARATUS FOR DETERMINING WAIT STATES ON A PER CYCLE BASIS IN A DATA PROCESSING SYSTEM
5812561	22-Sep-98	08/707272	03-Sep-96	SCAN BASED TESTING OF AN INTEGRATED CIRCUIT FOR COMPLIANCE WITH TIMING SPECIFICATIONS
5813041	22-Sep-98	08/660028	06-Jun-96	METHOD FOR ACCESSING MEMORY BY ACTIVATING A PROGRAMMABLE CHIP SELECT SIGNAL

110


Patent No.	Grant Date	Appl No.	Appl Date	Title
5875482	23-Feb-99	08/660620	06-Jun-96	METHOD AND APPARATUS FOR PROGRAMMABLE CHIP SELECT NEGATION IN A DATA PROCESSING SYSTEM
6006288	21-Dec-99	08/660702	06-Jun-96	A METHOD AND APPARATUS FOR ADAPTABLE BURST CHIP SELECT IN A DATA PROCESSING SYSTEM
5826047	20-Oct-98	08/703252	26-Aug-96	METHOD AND APPARATUS FOR EXTERNAL VIEWING OF AN INTERNAL BUS
5867719	02-Feb-99	08/669863	10-Jun-96	METHOD AND APPARATUS FOR TESTING ON-CHIP MEMORY ON A MICROCONTROLLER
5901103	04-May-99	08/835363	07-Apr-97	INTEGRATED CIRCUIT HAVING STANDBY CONTROL FOR MEMORY AND METHOD THEREOF
5890191	30-Mar-99	08/644098	10-May-96	METHOD AND APPARATUS FOR PROVIDING ERASING AND PROGRAMMING PROTECTION FOR ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY
5751593	12-May-98	08/629487	10-Apr-96	ACCURATE DELAY PREDICTION BASED ON MULTI-MODEL ANALYSIS
5801098	01-Sep-98	08/708245	03-Sep-96	METHOD OF DECREASING RESISTIVITY IN AN ELECTRICALLY CONDUCTIVE LAYER
5929659	27-Jul-99	08/815526	12-Mar-97	CIRCUIT AND PROCESS FOR SENSING DATA
5800747	01-Sep-98	08/674379	02-Jul-96	METHOD FOR MOLDING USING AN ION IMPLANTED MOLD
5821160	13-Oct-98	08/659376	06-Jun-96	METHOD FOR FORMING A LASER REPAIRABLE FUSE AREA OF A MEMORY CELL USING AN ETCH STOP LAYER
6085261	04-Jul-00	08/690463	29-Jul-96	METHOD AND APPARATUS FOR BURST PROTOCOL IN A DATA PROCESSING SYSTEM
5913054	15-Jun-99	08/768059	16-Dec-96	METHOD AND SYSTEM FOR [EFFICIENTLY] PROCESSING A MULTIPLE-REGISTER INSTRUCTION THAT PERMIT MULTIPLE DATA WORDS TO BE WRITTEN IN A SINGLE PROCESSOR CYCLE
5937324	10-Aug-99	09/041646	13-Mar-98	METHOD FOR FORMING A LINE-ON-LINE MULTI-LEVEL METAL INTERCONNECT STRUCTURE FOR USE IN INTEGRATED CIRCUITS
5798568	25-Aug-98	08/703223	26-Aug-96	SEMICONDUCTOR COMPONENT WITH MULTI-LEVEL INTERCONNECT SYSTEM AND METHOD OF MANUFACTURE
5872458	16-Feb-99	08/676771	08-Jul-96	METHOD FOR ELECTRICALLY CONTACTING SEMICONDUCTOR DEVICES IN TRAYS AND TEST CONTACTOR USEFUL THEREFOR
5748949	05-May-98	08/674381	02-Jul-96	COUNTER HAVING PROGRAMMABLE PERIODS AND METHOD THEREFOR
6077791	20-Jun-00	09/038466	11-Mar-98	METHOD OF FORMING PASSIVATION LAYERS USING DEUTERIUM CONTAINING REACTION GASES
5920484	06-Jul-99	08/753835	02-Dec-96	METHOD FOR GENERATING A REDUCED ORDER MODEL OF AN ELECTRONIC CIRCUIT
5894562	13-Apr-99	08/738515	28-Oct-96	METHOD AND APPARATUS FOR CONTROLLING BUS ARBITRATION IN A DATA PROCESSING SYSTEM
5812868	22-Sep-98	08/714644	16-Sep-96	METHOD AND APPARATUS FOR SELECTING A REGISTER FILE IN A DATA PROCESSING SYSTEM
5727038	10-Mar-98	08/707828	06-Sep-96	PHASE LOCKED LOOP USING DIGITAL LOOP FILTER AND DIGITALLY CONTROLLED OSCILLATOR
5956336	21-Sep-99	08/722587	27-Sep-96	APPARATUS AND METHOD FOR CONCURRENT SEARCH CONTENT ADDRESSABLE MEMORY CIRCUIT
5883907	16-Mar-99	08/848902	01-May-97	ASYMMETRICAL DIGITAL SUBSCRIBER LINE (ADSL) BLOCK ENCODER CIRCUIT AND METHOD OF OPERATION
5880018	09-Mar-99	08/727159	07-Oct-96	A METHOD FOR MANUFACTURING A LOW DIELECTRIC CONSTANT INTERLEVEL INTEGRATED CIRCUIT STRUCTURE
5849440	15-Dec-98	08/792670	29-Jan-97	PROCESS FOR PRODUCING AND INSPECTING A LITHOGRAPHIC RETICLE AND FABRICATING SEMICONDUCTOR DEVICES USING SAME
5819305	06-Oct-98	08/703175	23-Aug-96	METHOD AND APPARATUS FOR CONFIGURING OPERATING MODES IN A MEMORY
5707881	13-Jan-98	08/706888	03-Sep-96	A TEST STRUCTURE AND METHOD FOR PERFORMING BURN-IN TESTING OF A SEMICONDUCTOR PRODUCT WAFER
5959462	28-Sep-99	08/925248	08-Sep-97	A TEST STRUCTURE FOR ENABLING BURN-IN TESTING ON AN ENTIRE SEMICONDUCTOR WAFER
6308308	23-Oct-01	09/358522	22-Jul-99	SEMICONDUCTOR DEVICE USING DIODE PLACE-HOLDERS AND METHOD OF MANUFACTURE THEREOF
6011719	04-Jan-00	09/241150	01-Feb-99	DIGITAL SIGNAL PROCESSOR HAVING AN ON-CHIP PIPELINED EEPROM DATA MEMORY AND AN ON-CHIP PIPELINED EEPROM PROGRAM MEMORY
5901086	04-May-99	08/780120	26-Dec-96	PIPELINED FAST-ACCESS FLOATING GATE MEMORY ARCHITECTURE AND METHOD OF OPERATION

111


Patent No.	Grant Date	Appl No.	Appl Date	Title
5750419	12-May-98	08/803789	24-Feb-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE HAVING A FERROELECTRIC CAPACITOR
5773364	30-Jun-98	08/734566	21-Oct-96	METHOD FOR USING AMMONIUM SALT SLURRIES FOR CHEMICAL MECHANICAL POLISHING (CMP)
5958508	28-Sep-99	08/828635	31-Mar-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5888588	30-Mar-99	08/828638	31-Mar-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6012970	11-Jan-00	08/783975	15-Jan-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6076170	13-Jun-00	08/711517	16-Sep-96	METHOD AND APPARATUS FOR SELECTIVELY PROGRAMMING ACCESS TIME IN A DATA PROCESSOR
5929650	27-Jul-99	08/795030	04-Feb-97	METHOD AND APPARATUS FOR PERFORMING OPERATIVE TESTING ON AN INTEGRATED CIRCUIT
6047390	04-Apr-00	08/995359	22-Dec-97	MULTIPLE CONTEXT SOFTWARE ANALYSIS
5799143	25-Aug-98	08/703261	26-Aug-96	MULTIPLE CONTEXT SOFTWARE ANALYSIS
5984510	16-Nov-99	08/740720	01-Nov-96	AUTOMATIC SYNTHESIS OF STANDARD CELL LAYOUTS
6006024	21-Dec-99	08/740768	01-Nov-96	METHOD OF ROUTING AN INTEGRATED CIRCUIT
5941974	24-Aug-99	08/757606	29-Nov-96	SERIAL INTERFACE WITH REGISTER SELECTION WHICH USES CLOCK COUNTING, CHIP SELECT PULSING, AND NO ADDRESS BITS
5909463	01-Jun-99	08/741634	04-Nov-96	SINGLE-CHIP SOFTWARE CONFIGURABLE TRANSCEIVER FOR ASYMMETRIC COMMUNICATION SYSTEM
5898744	27-Apr-99	08/722433	07-Oct-96	APPARATUS AND METHOD FOR CLOCK RECOVERY IN A COMMUNICATION S+K6245YSTEM
5825768	20-Oct-98	08/723437	30-Sep-96	AN INTERFACE FOR AN ASYMMETRIC DIGITAL SUBSCRIBER LINE TRANSCEIVER
5737337	07-Apr-98	08/723032	30-Sep-96	METHOD AND APPARATUS FOR INTERLEAVING DATA IN AN ASYMMETRIC DIGITAL SUBSCRIBER LINE (ADSL) TRANSMITTER
5751741	12-May-98	08/754768	20-Nov-96	RATE-ADAPTED COMMUNICATION SYSTEM AND METHOD FOR EFFICIENT BUFFER UTILIZATION THEREOF
5995568	30-Nov-99	08/740176	28-Oct-96	METHOD AND APPARATUS FOR PERFORMING FRAME SYNCHRONIZATION IN AN ASYMMETRICAL DIGITAL SUBSCRIBER LINE (ADSL) SYSTEM
5903599	11-May-99	08/744078	04-Nov-96	TRANSCEIVER AND METHOD FOR REPORTING STATE TRANSITIONS IN A COMMUNICATION SYSTEM
5960036	28-Sep-99	08/741635	04-Nov-96	APPARATUS AND METHOD FOR AUTO-CONFIGURING A COMMUNICATION SYSTEM
5825826	20-Oct-98	08/724097	30-Sep-96	METHOD AND APPARATUS FOR FREQUENCY DOMAIN RIPPLE COMPENSATION FOR A COMMUNICATIONS TRANSMITTER
5742799	21-Apr-98	08/801648	18-Feb-97	METHOD AND APPARATUS FOR SYNCHRONIZING MULTIPLE CLOCKS
5829879	03-Nov-98	08/772710	23-Dec-96	TEMPERATURE SENSOR
6160305	12-Dec-00	08/777924	23-Dec-96	BETA DEPENDENT TEMPERATURE SENSOR FOR AN INTEGRATED CIRCUIT
6117759	12-Sep-00	08/775981	03-Jan-97	METHOD FOR MULTIPLEXED JOINING OF SOLDER BUMPS TO VARIOUS SUBSTRATES DURING ASSEMBLY OF AN INTEGRATED CIRCUIT PACKAGE
5904547	18-May-99	08/780119	26-Dec-96	APPARATUS FOR DICING A SEMICONDUCTOR DEVICE SUBSTRATE AND A PROCESSOR THEREFOR
5912562	15-Jun-99	08/795027	04-Feb-97	QUIESCENT CURRENT MONITOR CIRCUIT FOR WAFER LEVEL INTEGRATED CIRCUIT TESTING
5877654	02-Mar-99	08/758658	02-Dec-96	CLASS A AMPLIFIER WITH A DIGITALLY PROGRAMMABLE ▇▇▇▇▇▇ COMPENSATION NETWORK
5760728	02-Jun-98	08/794622	03-Feb-97	INPUT STAGE FOR AN ANALOG-TO-DIGITAL CONVERTER AND METHOD OF OPERATION THEREOF
5777522	07-Jul-98	08/775991	03-Jan-97	ELECTRONIC DEVICE FOR CONTROLLING A REACTANCE VALUE FOR A REACTIVE ELEMENT
5880687	09-Mar-99	08/806271	25-Feb-97	CASCADED INTEGRATOR-COMB INTERPOLATION FILTER
5924005	13-Jul-99	08/801328	18-Feb-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE [WITH A LOW K DIELECTRIC LAYER AND DEVICE MADE THEREBY]
5916011	29-Jun-99	08/780113	26-Dec-96	PROCESS FOR POLISHING A SEMICONDUCTOR DEVICE SUBSTRATE
6204169	20-Mar-01	08/822025	24-Mar-97	PROCESS FOR POLISHING DISSIMILAR CONDUCTIVE LAYERS IN A SEMICONDUCTOR DEVICE
5961791	05-Oct-99	08/804589	26-Feb-97	PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE
6068668	30-May-00	08/829297	31-Mar-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5963315	05-Oct-99	08/912726	18-Aug-97	METHOD AND APPARATUS FOR PROCESSING A SEMICONDUCTOR WAFER ON A ROBOTIC TRACK HAVING ACCESS TO IN SITU WAFER

112


Patent No.	Grant Date	Appl No.	Appl Date	Title
				BACKSIDE PARTICLE DETECTION
5904800	18-May-99	08/794706	03-Feb-97	SEMICONDUCTOR WAFER PROCESSING CHAMBER FOR REDUCING PARTICLES DEPOSITED ONTO THE SEMICONDUCTOR WAFER
5966635	12-Oct-99	08/791970	31-Jan-97	METHOD FOR REDUCING PARTICLES ON A SUBSTRATE USING ▇▇▇▇▇ CLEANING
5982166	09-Nov-99	08/790260	27-Jan-97	METHOD FOR MEASURING A CHARACTERISTIC OF A SEMICONDUCTOR WAFER USING CYLINDRICAL CONTROL
5920487	06-Jul-99	08/810561	03-Mar-97	TWO DIMENSIONAL LITHOGRAPHIC PROXIMITY CORRECTION USING DRC SHAPE FUNCTIONS
6044220	28-Mar-00	08/806880	25-Feb-97	METHOD AND APPARATUS FOR OPERATING A DATA PROCESSOR TO EXECUTE SOFTWARE WRITTEN USING A FOREIGN INSTRUCTION SET
5987086	16-Nov-99	08/740721	01-Nov-96	AUTOMATIC LAYOUT STANDARD CELL ROUTING
5893137	06-Apr-99	08/753752	29-Nov-96	APPARATUS AND METHOD FOR IMPLEMENTING A CONTENT ADDRESSABLE MEMORY CIRCUIT WITH TWO STAGE MATCHING
6169408	02-Jan-01	08/723033	30-Sep-96	METHOD AND APPARATUS FOR TESTING AN INTEGRATED CIRCUIT WITH A PULSED RADIATION BEAM
5801987	01-Sep-98	08/818273	17-Mar-97	AUTOMATIC TRANSITION CHARGE PUMP FOR NON-VOLATILE MEMORIES
5889788	30-Mar-99	08/794742	03-Feb-97	WRAPPER CELL ARCHITECTURE FOR PATH DELAY TESTING OF EMBEDDED CORE MICROPROCESSORS AND METHOD OF OPERATION
5893142	06-Apr-99	08/748855	14-Nov-96	DATA PROCESSING SYSTEM HAVING A CACHE AND METHOD THERFOR
5920890	06-Jul-99	08/748856	14-Nov-96	DISTRIBUTED TAG CACHE MEMORY SYSTEM AND METHOD FOR STORING DATA IN THE SAME
6054340	25-Apr-00	08/870286	06-Jun-97	METHOD FOR FORMING A CAVITY CAPABLE OF ACCESSING DEEP FUSE STRUCTURES AND DEVICE CONTAINING THE SAME
5961373	05-Oct-99	08/876461	16-Jun-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6143646	07-Nov-00	08/868332	03-Jun-97	DUAL IN-LAID INTEGRATED CIRCUIT STRUCTURE WITH SELECTIVELY POSITIONED LOW-K DIELECTRIC ISOLATION AND METHOD OF FORMATION
6054377	25-Apr-00	08/858109	19-May-97	METHOD FOR FORMING AN INLAID VIA IN A SEMICONDUCTOR DEVICE
5861347	19-Jan-99	08/887692	03-Jul-97	METHOD FOR FORMING A HIGH VOLTAGE GATE DIELECTRIC FOR USE IN INTEGRATED CIRCUITS
5882243	16-Mar-99	08/839996	24-Apr-97	METHOD FOR POLISHING A SEMICONDUCTOR WAFER USING DYNAMIC CONTROL
5963588	05-Oct-99	08/822966	21-Mar-97	APPARATUS FOR MODULATING DEMODULATING SIGNALS
5894423	13-Apr-99	08/780117	26-Dec-96	DATA PROCESSING SYSTEM HAVING AN AUTO-RANGING LOW VOLTAGE DETECTION CIRCUIT
5773314	30-Jun-98	08/845457	25-Apr-97	PLUG PROTECTION PROCESS FOR USE IN THE MANUFACTURE OF EMBEDDED DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELLS
5899745	04-May-99	08/887695	03-Jul-97	METHOD OF CHEMICAL MECHANICAL POLISHING (CMP) USING AN UNDER PAD WITH DIFFERENT COMPRESSION REGIONS AND POLISHING PAD THEREFOR
5930586	27-Jul-99	08/887696	03-Jul-97	METHOD AND APPARATUS FOR IN-LINE MEASURING BACKSIDE WAFER LEVEL CONTAMINATION OF A SEMICONDUCTOR WAFER
6045435	04-Apr-00	08/905757	04-Aug-97	LOW SELECTIVITY CHEMICAL MECHANICAL POLISHING (CMP) PROCESS FOR USE ON INTEGRATED CIRCUIT METAL INTERCONNECTS
6153519	28-Nov-00	08/829752	31-Mar-97	[METHOD FOR DEPOSITING A DIFFUSION BARRIER] Method of forming a barrier layer
6376371	23-Apr-02	09/570862	12-May-00	METHOD OF FORMING A SEMICONDUCTOR DEVICE
6127831	03-Oct-00	08/844577	21-Apr-97	METHOD OF TESTING A SEMICONDUCTOR DEVICE BY AUTOMATICALLY MEASURING PROBE TIP PARAMETERS
5851927	22-Dec-98	08/920656	29-Aug-97	METHOD OF FORMING A SEMICONDUCTOR DEVICE BY DUV RESIST PATTERNING
5905393	18-May-99	08/944777	06-Oct-97	UNBUFFERED LATCH RESISTANT TO BACKWRITING AND METHOD OF OPERATION THEREFOR
6157989	05-Dec-00	09/089721	03-Jun-98	DYNAMIC BUS ARBITRATION PRIORITY AND TASK SWITCHING BASED ON SHARED MEMORY FULLNESS IN A MULTI-PROCESSOR SYSTEM
6157999	05-Dec-00	08/868467	03-Jun-97	DATA PROCESSING SYSTEM HAVING A SYNCHRONIZING LINK STACK AND METHOD THEREOF

113


Patent No.	Grant Date	Appl No.	Appl Date	Title
5985682	16-Nov-99	08/917265	25-Aug-97	METHOD FOR TESTING A BUMPED SEMICONDUCTOR DIE
5892777	06-Apr-99	08/851287	05-May-97	APPARATUS AND METHOD FOR OBSERVING THE MODE OF A MEMORY DEVICE
5886556	23-Mar-99	08/791441	27-Jan-97	LOW POWER ▇▇▇▇▇▇▇ TRIGGER
6372638	16-Apr-02	09/599378	22-Jun-00	A METHOD FOR FORMING A CONDUCTIVE PLUG BETWEEN CONDUCTIVE LAYERS OF AN INTEGRATED CIRCUIT
6143648	07-Nov-00	08/802299	18-Feb-97	METHOD FOR FORMING AN INTEGRATED CIRCUIT
5935871	10-Aug-99	08/916297	22-Aug-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6020024	01-Feb-00	08/905755	04-Aug-97	METHOD FOR FORMING HIGH DIELECTRIC CONSTANT METAL OXIDES
5827625	27-Oct-98	08/912601	18-Aug-97	METHODS OF DESIGNING AND FORMING A RETICLE AND FORMING A SEMICONDUCTOR DEVICE THEREWITH
5859849	12-Jan-99	08/851731	06-May-97	MODULAR SWITCH ELEMENT FOR SHARED MEMORY SWITCH FABRIC
5896335	20-Apr-99	08/862662	23-May-97	METHOD AND APPARATUS FOR REDUCING POWER DISSIPATION IN A PRECHARGE/DISCHARGE MEMORY SYSTEM
5754454	19-May-98	08/808759	03-Mar-97	METHOD FOR DETERMINING FUNCTIONAL EQUIVALENCE BETWEEN DESIGN MODELS
5900340	04-May-99	08/805863	03-Mar-97	ONE-DIMENSIONAL LITHOGRAPHIC PROXIMITY CORRECTION USING DRC SHAPE FUNCTIONS
5854920	29-Dec-98	08/835371	07-Apr-97	METHOD AND APPARATUS FOR MANIPULATING A CARRY/BORROW BIT TO NUMERICALLY ADJUST AND IMMEDIATE VALUE OF AN INSTRUCTION DURING INSTRUCTION EXECUTION
5867053	02-Feb-99	08/822969	21-Mar-97	MULTIPLEXED OUTPUT CIRCUIT AND METHOD OF OPERATION THEREOF
6146970	14-Nov-00	09/084280	26-May-98	CAPPED SHALLOW TRENCH ISOLATION AND METHOD OF FORMATION
6063698	16-May-00	08/885433	30-Jun-97	A METHOD FOR MANUFACTURING A HIGH DIELECTRIC CONSTANT GATE OXIDE FOR USE IN SEMICONDUCTOR INTEGRATED CIRCUITS
5960270	28-Sep-99	08/907990	11-Aug-97	METHOD OF FORMING AN MOS TRANSISTOR HAVING A METALLIC GATE ELECTRODE THAT IS FORMED AFTER THE FORMATION OF SELF-ALIGNED SOURCE AND DRAIN REGIONS
6001726	14-Dec-99	08/822670	24-Mar-97	METHOD FOR USING A CONDUCTIVE TUNGSTEN NITRIDE ETCH STOP LAYER TO FORM CONDUCTIVE INTERCONNECTS AND TUNGSTEN NITRIDE CONTACT STRUCTURE
6100568	08-Aug-00	08/963580	06-Nov-97	SEMICONDUCTOR DEVICE INCLUDING A MEMORY CELL AND PERIPHERAL PORTION AND METHOD FOR FORMING SAME
6130102	10-Oct-00	08/963443	03-Nov-97	METHOD FOR FORMING A SEMICONDUCTOR DEVICE INCLUDING A DUAL INLAID STRUCTURE
6274424	14-Aug-01	09/602785	23-Jun-00	[SEMICONDUCTOR DEVICE INCLUDING A DUAL INLAID STRUCTURE] Method for forming a capacitor electrode
5903471	11-May-99	08/805862	03-Mar-97	METHOD FOR OPTIMIZING ELEMENT SIZES IN A SEMICONDUCTOR DEVICE
5761215	02-Jun-98	08/888384	07-Jul-97	SCAN BASED PATH DELAY TESTING OF INTEGRATED CIRCUITS CONTAINING EMBEDDED MEMORY ELEMENTS
5764024	09-Jun-98	08/835370	07-Apr-97	PULSE WIDTH MODULATOR (PWM) SYSTEM WITH LOW COST DEAD TIME DISTORTION CORRECTION
6492686	10-Dec-02	09/479093	07-Jan-00	INTEGRATED CIRCUIT HAVING BUFFERING CIRCUITRY WITH SLEW RATE CONTROL
6066971	23-May-00	08/942740	02-Oct-97	INTEGRATED CIRCUIT HAVING BUFFERING CIRCUITRY WITH SLEW RATE CONTROL
6096652	01-Aug-00	08/963438	03-Nov-97	METHOD OF CHEMICAL MECHANICAL PLANARIZATION USING COPPER COORDINATING LIGANDS
6284633	04-Sep-01	08/976469	24-Nov-97	METHOD FOR FORMING A TENSILE PLASMA ENHANCED NITRIDE CAPPING LAYER OVER A GATE ELECTRODE
6344413	05-Feb-02	09/022756	12-Feb-98	METHOD OF FORMING A SEMICONDUCTOR DEVICE
5764577	09-Jun-98	08/834960	07-Apr-97	FUSELESS MEMORY REPAIR SYSTEM AND METHOD OF OPERATION
6075934	13-Jun-00	08/848907	01-May-97	METHOD FOR OPTIMIZING CONTACT PIN PLACEMENT IN AN INTEGRATED CIRCUIT
6088782	11-Jul-00	08/891228	10-Jul-97	METHOD AND APPARATUS FOR MOVING DATA IN A PARALLEL PROCESSOR USING SOURCE AND DESTINATION VECTOR REGISTERS
5896045	20-Apr-99	08/851261	05-May-97	A STATIC PULSED CROSS-COUPLED LEVEL SHIFTER AND METHOD THEREFOR
5848025	08-Dec-98	08/885434	30-Jun-97	METHOD AND APPARATUS FOR CONTROLLING A MEMORY DEVICE

114


Patent No.	Grant Date	Appl No.	Appl Date	Title
				IN A PAGE MODE
5905453	18-May-99	08/905700	04-Aug-97	DITHERED SIGMA DELTA MODULATOR HAVING PROGRAMMABLE FULL SCALE RANGE ADJUSTMENT
5777935	07-Jul-98	08/815527	12-Mar-97	MEMORY DEVICE WITH FAST WRITE RECOVERY AND RELATED WRITE RECOVERY METHOD
5963818	05-Oct-99	08/932398	17-Sep-97	A COMBINED TRENCH ISOLATION AND INLAID PROCESS FOR INTEGRATED CIRCUIT FORMATION
6174810	16-Jan-01	09/055510	06-Apr-98	COPPER INTERCONNECT STRUCTURE AND METHOD OF FORMATION
5981340	09-Nov-99	08/939397	29-Sep-97	METHOD OF BUILDING AN EPROM CELL WITHOUT DRAIN DISTURB AND REDUCED SELECT GATE RESISTANCE
6295229	25-Sep-01	09/351742	08-Jul-99	SEMICONDUCTOR DEVICE AND METHODS OF FORMING AND OPERATING IT
6136682	24-Oct-00	08/954149	20-Oct-97	METHOD FOR FORMING A CONDUCTIVE STRUCTURE HAVING A COMPOSITE OR AMORPHOUS BARRIER LAYER
6133093	17-Oct-00	09/015957	30-Jan-98	METHOD FOR FORMING AN INTEGRATED CIRCUIT
5824584	20-Oct-98	08/876326	16-Jun-97	METHOD OF MAKING AND ACCESSING SPLIT GATE MEMORY DEVICE
6084279	04-Jul-00	08/831287	31-Mar-97	SEMICONDUCTOR DEVICE [AND A PROCESS FOR FORMING THE DEVICE] having a metal containing layer overlying a gate dielectric
5999017	07-Dec-99	08/887827	03-Jul-97	CMOS IMPLEMENTED OUTPUT BUFFER CIRCUIT FOR PROVIDING ECL LEVEL SIGNALS
6294820	25-Sep-01	09/420600	19-Oct-99	A METALLIC OXIDE GATE ELECTRODE STACK HAVING A METALLIC GATE DIELECTRIC, METALLIC GATE ELECTRODE AND A METALLIC ARC LAYER
6004850	21-Dec-99	09/028101	23-Feb-98	A TANTALUM OXIDE ANTI-REFLECTIVE COATING (ARC) INTEGRATED WITH A METALLIC TRANSISTOR GATE ELECTRODE AND METHOD OF FORMATION
6065140	16-May-00	08/846694	30-Apr-97	OPTIMIZED COMPUTATION OF FIRST AND SECOND DIVIDER VALUES FOR A PHASE LOCKED LOOP SYSTEM
5963068	05-Oct-99	08/901645	28-Jul-97	FAST START-UP PROCESSOR CLOCK GENERATION METHOD AND SYSTEM
6272588	07-Aug-01	08/865510	30-May-97	METHOD AND APPARATUS FOR VERIFYING AND CHARACTERIZING DATA RETENTION TIME IN A DRAM USING BUILT-IN TEST CIRCUITRY
6040729	21-Mar-00	08/917306	25-Aug-97	DIGITAL OUTPUT BUFFER FOR MULTIPLE VOLTAGE SYSTEM
6500324	31-Dec-02	09/561776	01-May-00	PROCESS FOR DEPOSITING A LAYER OF MATERIAL ON A SUBSTRATE
6174425	16-Jan-01	08/856459	14-May-97	PROCESS FOR DEPOSITING A LAYER OF MATERIAL [ON A SUBSTRATE AND A PLATING SYSTEM] over a subtrate
7323094	29-Jan-08	10/218810	14-Aug-02	PROCESS FOR DEPOSITING A LAYER OF MATERIAL [ON A SUBSTRATE AND A PLATING SYSTEM] over a subtrate
5909558	01-Jun-99	08/904156	31-Jul-97	LOW POWER SERIAL ARBITRATION SYSTEM
6058449	02-May-00	08/904029	31-Jul-97	FAULT TOLERANT SERIAL ARBITRATION SYSTEM
6107180	22-Aug-00	09/015956	30-Jan-98	METHOD FOR FORMING INTERCONNECT BUMPS ON A SEMICONDUCTOR DIE
5985694	16-Nov-99	08/939641	29-Sep-97	SEMICONDUCTOR DIE BUMPING METHOD UTILIZING VACUUM STENCIL
5898213	27-Apr-99	08/888392	07-Jul-97	SEMICONDUCTOR PACKAGE BOND POST CONFIGURATION
6297173	02-Oct-01	09/383238	26-Aug-99	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5972804	26-Oct-99	08/963436	03-Nov-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5821168	13-Oct-98	08/895017	16-Jul-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
5928371	27-Jul-99	08/910475	25-Jul-97	SYSTEM FOR PROGRAMMABLY INTERLEAVING AND DE-INTERLEAVING DATA AND METHOD THEREOF
6076177	13-Jun-00	08/935572	23-Sep-97	METHOD AND APPARATUS FOR TESTING A CIRCUIT MODULE CONCURRENTLY WITH A NON-VOLATILE MEMORY OPERATION IN A MULT-MODULE DATA PROCESSING SYSTEM
6011734	04-Jan-00	09/038752	12-Mar-98	A FUSELESS MEMORY REPAIR SYSTEM AND METHOD OF OPERATION
5966306	12-Oct-99	08/888588	07-Jul-97	METHOD FOR VERIFYING PROTOCOL CONFORMANCE OF AN ELECTRICAL INTERFACE
5828612	27-Oct-98	08/958646	27-Oct-97	METHOD AND CIRCUIT FOR CONTROLLING A PRECHARGE CYCLE OF A MEMORY DEVICE
5917336	29-Jun-99	08/939764	29-Sep-97	CIRCUIT FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION

115


Patent No.	Grant Date	Appl No.	Appl Date	Title
5903419	11-May-99	08/939637	29-Sep-97	CIRCUIT FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION
6130882	10-Oct-00	08/937759	25-Sep-97	METHOD AND APPARATUS FOR CONFIGURING A COMMUNICATION SYSTEM
6775241	10-Aug-04	09/451532	01-Dec-99	METHOD AND APPARATUS FOR CONFIGURING A COMMUNICATION SYSTEM
6226724	01-May-01	08/929128	03-Sep-97	MEMORY CONTROLLER AND METHOD FOR GENERATING COMMANDS TO A MEMORY
6215834	10-Apr-01	08/905336	04-Aug-97	DUAL BANDWIDTH PHASE LOCKED LOOP FREQUENCY LOCK DETECTION SYSTEM AND METHOD
5903748	11-May-99	08/916733	18-Aug-97	METHOD AND APPARATUS FOR MANAGING FAILURE OF A SYSTEM CLOCK IN A DATA PROCESSING SYSTEM
5995731	30-Nov-99	08/998564	29-Dec-97	MULTIPLE BITS CONTROLLERS FOR TESTING MULTIPLE EMBEDDED MEMORY ARRAYS
6044392	28-Mar-00	08/905764	04-Aug-97	METHOD AND APPARATUS FOR PERFORMING ROUNDING IN A DATA PROCESSOR
5977632	02-Nov-99	09/017562	02-Feb-98	FLIP CHIP BUMP STRUCTURE AND METHOD OF MAKING
5990547	23-Nov-99	09/033048	02-Mar-98	SEMICONDUCTOR DEVICE HAVING PLATED CONTACTS AND METHOD THEREOF
6294405	25-Sep-01	09/550482	14-Apr-00	METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING A SUB-CHIP-SCALE PACKAGE STRUCTURE
6064114	16-May-00	08/980783	01-Dec-97	SEMICONDUCTOR DEVICE HAVING A SUB-CHIP-SCALE PACKAGE STRUCTURE AND METHOD FOR FORMING SAME
5920790	06-Jul-99	08/921293	29-Aug-97	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING DUAL INLAID STRUCTURE
6128317	03-Oct-00	08/996165	22-Dec-97	TRANSMITTER AND RECEIVER SUPPORTING DIFFERING SPEED CODECS OVER SINGLE LINKS
5961622	05-Oct-99	08/956966	23-Oct-97	SYSTEM AND METHOD FOR RECOVERING A MICROPROCESSOR FROM A LOCKED BUS STATE
6073252	06-Jun-00	08/937451	25-Sep-97	DATA PROCESSING SYSTEM WITH MEMORY PATCHING AND METHOD THEREOF
5920690	06-Jul-99	08/907980	11-Aug-97	METHOD AND APPARATUS FOR PROVIDING ACCESS PROTECTION IN AN INTEGRATED CIRCUIT
5951678	14-Sep-99	08/900796	25-Jul-97	METHOD AND APPARATUS FOR CONTROLLING CONDITIONAL BRANCH EXECUTION IN A DATA PROCESSOR
5983338	09-Nov-99	08/924508	05-Sep-97	METHOD AND APPARATUS FOR INTERFACING A PROCESSOR TO A COPROCESSOR FOR COMMUNICATING REGISTER WRITE INFORMATION
6171959	09-Jan-01	09/009396	20-Jan-98	METHOD FOR MAKING A SEMICONDUCTOR DEVICE
5956606	21-Sep-99	08/962008	31-Oct-97	METHOD FOR BUMPING AND PACKAGING SEMICONDUCTOR DIE
5962926	05-Oct-99	08/940605	30-Sep-97	SEMICONDUCTOR DEVICE HAVING MULTIPLE OVERLAPPING ROWS OF BOND PADS WITH CONDUCTIVE INTERCONNECTS AND METHOD OF PAD PLACE
5781480	14-Jul-98	08/902009	29-Jul-97	PIPELINED DUAL PORT INTEGRATED CIRCUIT MEMORY
6078527	20-Jun-00	09/103633	23-Jun-98	PIPELINED DUAL PORT INTEGRATED CIRCUIT MEMORY
5973955	26-Oct-99	09/016940	02-Feb-98	COMPARISON CIRCUIT UTILIZING A DIFFERENTIAL AMPLIFIER
5943274	24-Aug-99	09/016914	02-Feb-98	METHOD AND APPARATUS FOR AMPLIFYING A SIGNAL TO PRODUCE A LATCHED DIGITAL SIGNAL
6044036	28-Mar-00	09/078159	13-May-98	BUFFER CIRCUIT MEMORY DEVICE, AND INTEGRATED CIRCUIT FOR RECEIVING DIGITAL SIGNALS
6071816	06-Jun-00	08/921131	29-Aug-97	METHOD OF CHEMICAL MECHANICAL PLANARIZATION USING A WATER RINSE TO PREVENT PARTICLE CONTAMINATION
6039765	21-Mar-00	08/990780	15-Dec-97	COMPUTER INSTRUCTION WHICH GENERATES MULTIPLE RESULTS OF DIFFERENT DATA TYPES TO IMPROVE SOFTWARE EMULATION
6145104	07-Nov-00	09/022396	12-Feb-98	DATA PROCESSING SYSTEM EXTERNAL PIN CONNECTIVITY TO COMPLEX FUNCTIONS
6001730	14-Dec-99	08/954191	20-Oct-97	A CHEMICAL MECHANICAL POLISHING (CMP) SLURRY FOR POLISHING COPPER INTERCONNECTS WHICH USE TANTALUM-BASED BARRIER LAYERS
6259746	10-Jul-01	09/007218	14-Jan-98	METHOD FOR ALLOCATING DATA AND POWER IN A DISCRETE MULTI-TONE COMMUNICATION SYSTEM
6275522	14-Aug-01	09/007390	14-Jan-98	METHOD FOR ALLOCATING DATA AND POWER IN A DISCRETE MULTI-TONE COMMUNICATION SYSTEM
6145097	07-Nov-00	08/924117	05-Sep-97	METHOD AND APPARATUS FOR PROVIDING OPERAND FEED FORWARD SUPPORT IN A DATA PROCESSING SYSTEM
6505290	07-Jan-03	08/924518	05-Sep-97	METHOD AND APPARATUS FOR INTER FACING A PROCESSOR TO A

116


Patent No.	Grant Date	Appl No.	Appl Date	Title
				COPROCESSOR
6327647	04-Dec-01	09/609260	30-Jun-00	METHOD AND APPARATUS FOR INTERFACING A PROCESSOR TO A COPROCESSOR
7007154	28-Feb-06	10/007836	05-Nov-01	METHOD AND APPARATUS FOR INTERFACING A PROCESSOR TO A COPROCESSOR
5970246	19-Oct-99	08/927524	11-Sep-97	DATA PROCESSING SYSTEM HAVING A TRACE MECHANISM AND METHOD THEREFOR
6167484	26-Dec-00	09/076149	12-May-98	METHOD AND APPARATUS FOR LEVERAGING HISTORY BITS TO OPTIMIZE MEMORY REFRESH PERFORMANCE
5932924	03-Aug-99	09/016988	02-Feb-98	LEADFRAME HAVING CONTINUOUSLY REDUCING WIDTH AND SEMICONDUCTOR DEVICE INCLUDING SUCH A LEAD FRAME
5903919	11-May-99	08/946148	07-Oct-97	METHOD AND APPARATUS FOR SELECTING A REGISTER BANK
▇▇▇▇▇▇▇	13-Apr-99	08/996000	22-Dec-97	SEMICONDUCTOR DEVICE AND A PROCESS FOR FORMING THE DEVICE
5897375	27-Apr-99	08/954190	20-Oct-97	CHEMICAL MECHANICAL POLISHING (CMP) SLURRY FOR COPPER AND METHOD OF USE IN INTEGRATED CIRCUIT MANUFACTURE
5999717	07-Dec-99	09/001751	31-Dec-97	METHOD FOR PERFORMING MODEL CHECKING IN INTEGRATED CIRCUIT DESIGN
6184073	06-Feb-01	08/997714	23-Dec-97	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE HAVING AN INTERCONNECT OR CONDUCTIVE FILM ELECTRICALLY INSULATED FROM A CONDUCTIVE MEMBER OR REGION
6686633	03-Feb-04	09/653338	31-Aug-00	SEMICONDUCTOR DEVICE, MEMORY CELL AND PROCESSES FOR FORMING THEM
6093966	25-Jul-00	09/044852	20-Mar-98	A SEMICONDUCTOR DEVICE WITH A COPPER BARRIER LAYER AND FORMATION THEREOF
6091287	18-Jul-00	09/012414	23-Jan-98	VOLTAGE REGULATOR WITH AUTOMATIC ACCELERATED AGING CIRCUIT
6122247	19-Sep-00	08/976472	24-Nov-97	METHOD FOR REALLOCATING DATA IN A DISCRETE MULTI-TONE COMMUNICATION SYSTEM
5917761	29-Jun-99	08/965640	06-Nov-97	SYNCHRONOUS MEMORY INTERFACE
6237089	22-May-01	09/425469	22-Oct-99	METHOD AND APPARATUS FOR AFFECTING SUBSEQUENT INSTRUCTION PROCESSING IN A DATA PROCESSOR
6000029	07-Dec-99	08/963321	03-Nov-97	METHOD AND APPARATUS FOR AFFECTING SUBSEQUENT INSTRUCTION PROCESSING IN A DATA PROCESSOR
6049876	11-Apr-00	09/032015	09-Feb-98	DATA PROCESSING SYSTEM AND METHOD WHICH DETECT UNAUTHORIZED MEMORY ACCESSES
5958635	28-Sep-99	08/954160	20-Oct-97	LITHOGRAPHIC PROXIMITY CORRECTION THROUGH SUBSET FEATURE MODIFICATION
6560623	06-May-03	09/397267	16-Sep-99	METHOD AND APPARATUS FOR PRODUCING CORRECTLY ROUNDED VALUES OF FUNCTIONS USING DOUBLE PRECISION OPERANDS
6046897	04-Apr-00	08/939284	29-Sep-97	SEGMENTED BUS ARCHITECTURE (SBA) FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION
5923893	13-Jul-99	08/924137	05-Sep-97	METHOD AND APPARATUS FOR INTER FACING A PROCESSOR TO A COPROCESSOR
6316359	13-Nov-01	09/498613	04-Feb-00	INTERCONNECT STRUCTURE IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6197688	06-Mar-01	09/022933	12-Feb-98	INTERCONNECT STRUCTURE IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6003133	14-Dec-99	08/972069	17-Nov-97	DATA PROCESSOR WITH A PRIVILEGED STATE FIREWALL AND METHOD THEREFORE
6049865	11-Apr-00	08/993514	18-Dec-97	METHOD AND APPARATUS FOR IMPLEMENTING FLOATING POINT PROJECTION INSTRUCTIONS
6058405	02-May-00	08/965686	06-Nov-97	SIMD COMPUTATION OF RANK BASED FILTERS FOR M X N GRIDS
5917358	29-Jun-99	08/987361	09-Dec-97	METHOD AND OUTPUT BUFFER WITH PROGRAMMABLE BIAS TO ACCOMMODATE MULTIPLE SUPPLY VOLTAGES
6477640	05-Nov-02	09/659401	11-Sep-00	[APPARATUS FOR PERFORMING BRANCH PREDICTION AND RESOLUTION OF TWO OR MORE BRANCH INSTRUCTIONS WITHIN TWO OR MORE BRANCH PREDICTION BUFFERS] Apparatus and method for predicting multiple branches and performing out-of-order branch resolution
6157998	05-Dec-00	09/054810	03-Apr-98	METHOD FOR PERFORMING BRANCH PREDICTION AND RESOLUTION OF TWO OR MORE BRANCH INSTRUCTIONS WITHIN TWO OR MORE BRANCH PREDICTION BUFFERS
5822244	13-Oct-98	08/936373	24-Sep-97	METHOD AND APPARATUS FOR SUSPENDING A PROGRAM/ERASE OPERATION IN A FLASH MEMORY
6085282	04-Jul-00	08/936371	24-Sep-97	METHOD AND APPARATUS FOR DISTINGUISHING REGISTER READS

117


Patent No.	Grant Date	Appl No.	Appl Date	Title
				FROM MEMORY READS IN A FLASH MEMORY
6057713	02-May-00	09/038751	12-Mar-98	METHOD AND APPARATUS FOR PERFORMING VOLTAGE SAMPLING
5945878	31-Aug-99	09/024482	17-Feb-98	SINGLE-ENDED TO DIFFERENTIAL CONVERTER
5985748	16-Nov-99	08/980782	01-Dec-97	METHOD OF MAKING A SEMICONDUCTOR DEVICE USING CHEMICAL-MECHANICAL POLISHING HAVING A COMBINATION-STEP PROCESS
6027961	22-Feb-00	09/107963	30-Jun-98	CMOS SEMICONDUCTOR DEVICES AND METHOD OF FORMATION
6221537	24-Apr-01	08/994389	19-Dec-97	SEMICONDUCTOR DEVICE AND METHOD OF FORMATION
6012076	04-Jan-00	08/998562	29-Dec-97	ARITHMETIC LOGIC UNIT HAVING PRESHIFT AND PREROUND CIRCUITS
6463453	08-Oct-02	09/006054	12-Jan-98	LOW POWER PIPELINED MULTIPLY/ACCUMULATOR WITH MODIFIED BOOTH’S RECODER
6252814	26-Jun-01	09/303347	29-Apr-99	DUMMY WORDLINE CIRCUITRY
6150724	21-Nov-00	09/032860	02-Mar-98	MULTI-CHIP SEMICONDUCTOR DEVICE AND METHOD FOR MAKING THE DEVICE BY USING MULTIPLE FLIP CHIP INTERFACES
5898217	27-Apr-99	09/002610	05-Jan-98	SEMICONDUCTOR DEVICE INCLUDING A SUBSTRATE HAVING CLUSTERED INTERCONNECTS
6054825	25-Apr-00	09/010044	20-Jan-98	METHOD AND APPARATUS FOR HIGH VOLTAGE GENERATION
6058463	02-May-00	09/009509	20-Jan-98	PAGED MEMORY DATA PROCESSING SYSTEM WITH OVERLAID MEMORY CONTROL REGISTERS
5966054	12-Oct-99	09/015846	29-Jan-98	METHOD AND APPARATUS FOR PROVIDING A CLOCKING SIGNAL
6125404	26-Sep-00	09/061958	17-Apr-98	[COMMUNICATIONS SYSTEM HAVING A PROTOCOL TIMER] Data processing system having a protocol timer for autonomously providing time based interrupts
6134675	17-Oct-00	09/006876	14-Jan-98	METHOD OF TESTING MULTI-CORE PROCESSORS AND MULTI-CORE PROCESSOR TESTING DEVICE
6381224	30-Apr-02	09/282914	31-Mar-99	METHOD AND APPARATUS FOR CONTROLLING A FULL-DUPLEX COMMUNICATION SYSTEM
6569740	27-May-03	09/593103	13-Jun-00	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A BUFFER
6075271	13-Jun-00	09/033752	03-Mar-98	SEMICONDUCTOR DEVICE INHIBITING PARASITIC EFFECTS DURING ELECTROSTATIC DISCHARGE
6049119	11-Apr-00	09/071323	01-May-98	PROTECTION CIRCUIT FOR A SEMICONDUCTOR DEVICE
5985731	16-Nov-99	09/135634	17-Aug-98	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A CAPACITOR STRUCTURE
6566264	20-May-03	09/583970	31-May-00	METHOD FOR FORMING AN OPENING IN A SEMICONDUCTOR DEVICE SUBSTRATE
6047025	04-Apr-00	09/023061	13-Feb-98	METHOD AND APPARATUS FOR EQUALIZATION IN AN ASYMMETRIC DIGITAL SUBSCRIBER LINE (ADSL) communications system
6297757	02-Oct-01	09/248551	11-Feb-99	METHOD AND CIRCUIT FOR TESTING AN ANALOG-TO-DIGITAL CONVERTER module on a data processing system having an intermodule bus
5998258	07-Dec-99	09/064076	22-Apr-98	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A STACKED CAPACITOR STRUCTURE
6187682	13-Feb-01	09/084276	26-May-98	INERT PLASMA GAS SURFACE CLEANING PROCESS PERFORMED INSITU WITH PHYSICAL VAPOR DEPOSITION (PVD) OF A LAYER OF MATERIAL
6134689	17-Oct-00	09/022397	12-Feb-98	METHOD OF MAKING AND TESTING LOGIC DEVICES
6662328	09-Dec-03	09/598560	21-Jun-00	METHOD OF MAKING LOGIC DEVICES
5928962	27-Jul-99	09/088013	01-Jun-98	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6085334	04-Jul-00	09/061983	17-Apr-98	METHOD AND APPARATUS FOR TESTING AN INTEGRATED MEMORY DEVICE
6380760	30-Apr-02	09/636493	11-Aug-00	INTEGRATED CIRCUIT FOR HANDLING BUFFER CONTENTION AND METHOD THEREOF
6147510	14-Nov-00	09/114119	13-Jul-98	INTEGRATED CIRCUIT FOR HANDLING BUFFER CONTENTION AND METHOD THEREOF
6106567	22-Aug-00	09/069028	28-Apr-98	CIRCUIT DESIGN VERIFICATION TOOL AND METHOD THEREFOR using ▇▇▇▇▇▇▇’▇ equations
5946177	31-Aug-99	09/134943	17-Aug-98	CIRCUIT FOR ELECTROSTATIC DISCHARGE PROTECTION
6346908	12-Feb-02	09/574754	18-May-00	APPARATUS FOR CONVERTING AN ANALOG SIGNAL UTILIZING RESISTOR D/A CONVERTER PRECHARGING
6128716	03-Oct-00	09/010976	23-Jan-98	MEMORY CONTROLLER WITH CONTINUOUS PAGE MODE AND METHOD THEREFOR

118


Patent No.	Grant Date	Appl No.	Appl Date	Title
6218302	17-Apr-01	09/121068	21-Jul-98	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6372665	16-Apr-02	09/611412	06-Jul-00	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6127258	03-Oct-00	09/104849	25-Jun-98	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6321186	20-Nov-01	09/303995	03-May-99	METHOD AND APPARATUS FOR INTEGRATED CIRCUIT DESIGN VERIFICATION
6009012	28-Dec-99	09/089719	03-Jun-98	MICROCONTROLLER HAVING A NON-VOLATILE MEMORY AND A METHOD FOR SELECTING AN OPERATIONAL MODE
6137429	24-Oct-00	09/265238	08-Mar-99	CIRCUIT AND METHOD FOR ATTENUATING NOISE IN A DATA CONVERTER
5960289	28-Sep-99	09/102267	22-Jun-98	A METHOD FOR MAKING A DUAL-THICKNESS GATE OXIDE LAYER USING A NITRIDE/OXIDE COMPOSITE REGION
6171910	09-Jan-01	09/358213	21-Jul-99	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6185657	06-Feb-01	09/062571	20-Apr-98	MULTI-WAY CACHE APPARATUS AND METHOD
6052746	18-Apr-00	09/059818	14-Apr-98	INTEGRATED CIRCUIT HAVING [SINGLE] PROGRAMMABLE PULL DEVICE CONFIGURED TO ENABLE/DISABLE FIRST FUNCTION IN FAVOR OF SECOND FUNCTION ACCORDING TO PREDETERMINED SCHEME BEFORE/AFTER RESET
6499092	24-Dec-02	09/593216	14-Jun-00	METHOD AND APPARATUS FOR PERFORMING ACCESS CENSORSHIP IN A DATA PROCESSING SYSTEM
6240493	29-May-01	09/061974	17-Apr-98	METHOD AND APPARATUS FOR PERFORMING ACCESS CENSORSHIP IN A DATA PROCESSING SYSTEM
6079015	20-Jun-00	09/062952	20-Apr-98	DATA PROCESSING SYSTEM HAVING SELECTABLE EXCEPTION[AL] TABLE RELOCATION AND METHOD THEREFOR
6128224	03-Oct-00	09/289699	09-Apr-99	METHOD AND APPARATUS FOR WRITING AN ERASABLE NON-VOLATILE MEMORY
6075727	13-Jun-00	09/124466	29-Jul-98	[PROCESS FOR FORMING A SEMICONDUCTOR DEVICE] Method and apparatus for writing an erasable non-volatile memory
6008677	28-Dec-99	09/053896	02-Apr-98	VOLTAGE RECOVERY CIRCUIT AND METHOD THEREFOR
5991201	23-Nov-99	09/067026	27-Apr-98	NON-VOLATILE MEMORY WITH OVER-PROGRAM PROTECTION AND METHOD THEREFOR
6077726	20-Jun-00	09/124720	30-Jul-98	METHOD AND APPARATUS FOR STRESS RELIEF IN SOLDER BUMP FORMATION ON A SEMICONDUCTOR DEVICE
6271143	07-Aug-01	09/306029	06-May-99	METHOD FOR PREVENTING TRENCH FILL EROSION
6232634	15-May-01	09/124592	29-Jul-98	NONVOLATILE MEMORY CELL AND METHOD FOR MANUFACTURING SAME
6011749	04-Jan-00	09/049221	27-Mar-98	INTEGRATED CIRCUIT HAVING OUTPUT TIMING CONTROL CIRCUIT AND METHOD THEREOF
6145122	07-Nov-00	09/067102	27-Apr-98	DEVELOPMENT INTERFACE FOR A DATA PROCESSOR
6519287	11-Feb-03	09/114568	13-Jul-98	METHOD AND APPARATUS FOR ENCODING AND DECODING VIDEO SIGNALS by using storage and retrieval of motion vectors
6166653	26-Dec-00	09/133226	13-Aug-98	SYSTEM FOR ADDRESS INITIALIZATION OF GENERIC NODES IN A DISTRIBUTED COMMAND AND CONTROL SYSTEM AND METHOD THEREFOR
6392558	21-May-02	09/677571	29-Sep-00	SYSTEM FOR ADDRESS INITIALIZATION OF GENERIC NODES IN A DISTRIBUTED COMMAND AND CONTROL SYSTEM AND METHOD THEREFOR
6493854	10-Dec-02	09/411725	01-Oct-99	METHOD AND APPARATUS FOR PLACING REPEATERS IN A NETWORK OF AN INTEGRATED CIRCUIT
6240479	29-May-01	09/127459	31-Jul-98	METHOD AND APPARATUS FOR TRANSFERRING DATA ON A SPLIT BUS IN A DATA PROCESSING SYSTEM
6073215	06-Jun-00	09/127884	03-Aug-98	DATA PROCESSING SYSTEM HAVING A DATA PREFETCH MECHANISM AND METHOD THEREFOR
6321303	20-Nov-01	09/271492	18-Mar-99	DYNAMICALLY MODIFYING QUEUED TRANSACTIONS IN A CACHE MEMORY SYSTEM
6163835	19-Dec-00	09/110351	06-Jul-98	METHOD AND APPARATUS FOR TRANSFERRING DATA OVER A PROCESSOR INTERFACE BUS
6001513	14-Dec-99	09/097801	16-Jun-98	METHOD FOR FORMING A LITHOGRAPHIC MASK USED FOR PATTERNING SEMICONDUCTOR DIE
6452907	17-Sep-02	09/173380	15-Oct-98	METHOD FOR MONITORING UNUSED BINS IN A DISCRETE MULTI-TONE COMMUNICATION SYSTEM
6268289	31-Jul-01	09/080809	18-May-98	METHOD FOR PROTECTING THE EDGE EXCLUSION OF A SEMICONDUCTOR WAFER FROM COPPER PLATING THROUGH USE OF AN EDGE EXCLUSION MASKING LAYER
5943597	24-Aug-99	09/094974	15-Jun-98	BUMPED SEMICONDUCTOR DEVICE HAVING A TRENCH FOR STRESS RELIEF

119


Patent No.	Grant Date	Appl No.	Appl Date	Title
5923615	13-Jul-99	09/061953	17-Apr-98	SYNCHRONOUS PIPELINED BURST MEMORY AND METHOD FOR OPERATING SAME
6081216	27-Jun-00	09/096049	11-Jun-98	LOW-POWER DECIMATOR FOR AN OVERSAMPLED ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREFOR
6235603	22-May-01	09/351442	12-Jul-99	METHOD FOR FORMING A SEMICONDUCTOR DEVICE USING AN ETCH STOP LAYER
6021072	01-Feb-00	09/123927	27-Jul-98	METHOD AND APPARATUS FOR PRECHARGING BITLINES IN A NONVOLATILE MEMORY
6401196	04-Jun-02	09/100669	19-Jun-98	DATA PROCESSING SYSTEM HAVING BRANCH CONTROL AND METHOD THEREOF
6043146	28-Mar-00	09/122709	27-Jul-98	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE
6037668	14-Mar-00	09/191353	13-Nov-98	INTEGRATED CIRCUIT HAVING A SUPPORT STRUCTURE
6313024	06-Nov-01	09/394190	10-Sep-99	METHOD FOR FORMING a semiconductor device [AN INTEGRATED CIRCUIT ]
6215423	10-Apr-01	09/145778	26-Aug-98	METHOD AND SYSTEM FOR A SYNCHRONOUS SAMPLE RATE CONVERSION USING A NOISE-SHAPED NUMERICALLY CONTROL OSCILLATOR
6677226	13-Jan-04	09/075767	11-May-98	METHOD FOR FORMING AN INTEGRATED CIRCUIT having a bonding pad and a fuse
6121849	19-Sep-00	09/121700	24-Jul-98	OSCILLATOR AMPLIFIER WITH FREQUENCY BASED DIGITAL MULTI-DISCRETE-LEVEL GAIN CONTROL AND METHOD OF OPERATION
6049114	11-Apr-00	09/118877	20-Jul-98	[METHOD FOR FORMING A] SEMICONDUCTOR DEVICE [AND A SEMICONDUCTOR DEVICE FORMED THEREBY ] having a metail containing layer overlying a gate dielectric
6107136	22-Aug-00	09/134974	17-Aug-98	METHOD FOR FORMING A CAPACITOR STRUCTURE
6274899	14-Aug-01	09/574952	19-May-00	Capacitor electrode having conductive regions adjacent a dielectric post [SEMICONDUCTOR DEVICE CAPACITOR ELECTRODE]
6430666	06-Aug-02	09/138909	24-Aug-98	LINKED LIST MEMORY AND METHOD THEREFOR
6326811	04-Dec-01	09/659400	11-Sep-00	OUTPUT BUFFER AND METHOD THEREFOR
6169420	02-Jan-01	09/131515	10-Aug-98	OUTPUT BUFFER [AND METHOD THEREFOR ]
6288599	11-Sep-01	09/634561	09-Aug-00	DATA PROCESSING SYSTEM HAVING AN INPUT BUFFER WHICH INTERFACES UNDER ADDRESS CONTROL WITH CIRCUITRY OPERATING WITH A DIFFERENT SUPPLY VOLTAGE VALUE
6346829	12-Feb-02	09/634921	09-Aug-00	HIGH VOLTAGE INPUT BUFFER MADE BY A LOW VOLTAGE PROCESS AND HAVING A SELF-ADJUSTING TRIGGER POINT
6287951	11-Sep-01	09/206715	07-Dec-98	PROCESS FOR FORMING A COMBINATION HARDMASK AND ANTIREFLECTIVE LAYER
6444398	03-Sep-02	09/614828	12-Jul-00	METHOD FOR MANUFACTURING A SEMICONDUCTOR WAFER USING A MASK THAT HAS SEVERAL REGIONS WITH DIFFERENT SCATTERING ABILITY
6310856	30-Oct-01	09/131213	07-Aug-98	CDMA COMMUNICATIONS SYSTEM HAVING A SEARCHER RECEIVER AND METHOD THEREFOR
6487670	26-Nov-02	09/261875	02-Mar-99	METHOD and systems FOR DETECTING AND FOR RESPONDING TO connection [DETECTION] OF A BATTERY TO A LOGIC DEVICE [AND SYSTEMS RELATING THERETO ]
6294938	25-Sep-01	09/552824	20-Apr-00	SYSTEM WITH DLL
6434707	13-Aug-02	09/327289	07-Jun-99	LOW JITTER CLOCK signal GENERATION circuit [WITHOUT SINE LOOK-UP TABLES ]
6081091	27-Jun-00	09/263561	08-Mar-99	MOTOR CONTROLLER, INTEGRATED CIRCUIT, AND METHOD OF CONTROLLING A MOTOR
6130821	10-Oct-00	09/204818	03-Dec-98	MULTI-CHIP ASSEMBLY HAVING A HEAT SINK AND METHOD THEREOF
7149674	12-Dec-06	09/580854	30-May-00	METHODS FOR ANALYZING INTEGRATED CIRCUITS AND APPARATUS THEREFOR
6327182	04-Dec-01	09/472920	27-Dec-99	SEMICONDUCTOR DEVICE AND A METHOD OF OPERATING THE SAME
6373104	16-Apr-02	09/559354	27-Apr-00	CIRCUIT AND METHOD FOR REDUCING PARASITIC BIPOLAR EFFECTS DURING ELECTROSTATIC DISCHARGES
6329692	11-Dec-01	09/201392	30-Nov-98	CIRCUIT AND METHOD FOR REDUCING PARASITIC BIPOLAR EFFECTS DURING ELECTROSTATIC DISCHARGES
6284616	04-Sep-01	09/560501	27-Apr-00	CIRCUIT AND METHOD FOR REDUCING PARASITIC BIPOLAR EFFECTS DURING ELECTROSTATIC DISCHARGES
6311254	30-Oct-01	09/271494	18-Mar-99	MULTIPLE STORE MISS HANDLING IN A CACHE MEMORY SYSTEM
6150190	21-Nov-00	09/320866	27-May-99	METHOD OF FORMATION OF BURIED MIRROR SEMICONDUCTIVE

120


Patent No.	Grant Date	Appl No.	Appl Date	Title
				DEVICE
6049501	11-Apr-00	09/210827	14-Dec-98	MEMORY DATA BUS ARCHITECTURE AND METHOD OF CONFIGURING MULTI-WIDE WORD MEMORIES
6100717	08-Aug-00	09/▇▇▇▇▇▇	16-Oct-98	LINE DRIVER CIRCUIT WITH REDUCED POWER CONSUMPTION
▇▇▇▇▇▇▇	24-Jun-03	09/211165	14-Dec-98	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A LAYER DEPOSITED BY VARYING FLOW OF REACTANTS
6230238	08-May-01	09/261877	02-Mar-99	METHOD AND APPARATUS FOR ACCESSING MISALIGNED DATA FROM MEMORY IN AN EFFICIENT MANNER
6261978	17-Jul-01	09/253875	22-Feb-99	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE WITH THICK AND THIN FILMS
6157583	05-Dec-00	09/261876	02-Mar-99	INTEGRATED CIRCUIT MEMORY HAVING A FUSE DETECT CIRCUIT AND METHOD THEREFOR
6444563	03-Sep-02	09/253876	22-Feb-99	METHOD AND APPARATUS FOR EXTENDING FATIGUE LIFE OF SOLDER JOINTS IN A SEMICONDUCTOR DEVICE
6165567	26-Dec-00	09/290385	12-Apr-99	PROCESS OF FORMING A SEMICONDUCTOR DEVICE
6198314	06-Mar-01	09/236064	25-Jan-99	SAMPLE AND HOLD CIRCUIT AND METHOD THEREFOR
6389489	14-May-02	09/271215	17-Mar-99	DATA PROCESSING SYSTEM HAVING A FIFO BUFFER WITH VARIABLE THRESHOLD VALUE BASED ON INPUT AND OUTPUT DATA RATES AND DATA BLOCK SIZE
6593226	15-Jul-03	09/906874	17-Jul-01	METHOD FOR ADDING FEATURES TO A DESIGN LAYOUT AND PROCESS FOR DESIGNING A MASK
6396158	28-May-02	09/340697	29-Jun-99	SEMICONDUCTOR DEVICE AND A PROCESS FOR DESIGNING A MASK
6496946	17-Dec-02	09/309383	10-May-99	ELECTRONIC CONTROL APPARATUS WITH MEMORY VALIDATION AND METHOD
6713381	30-Mar-04	10/051262	18-Jan-02	METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING INTERCONNECT BARRIER LAYERS
6438030	20-Aug-02	09/639195	15-Aug-00	NON-VOLATILE MEMORY, METHOD OF MANUFACTURE, AND METHOD OF PROGRAMMING
5978286	02-Nov-99	09/259455	01-Mar-99	TIMING CONTROL OF AMPLIFIERS IN A MEMORY
6674304	06-Jan-04	09/258378	26-Feb-99	OUTPUT BUFFER CIRCUIT AND METHOD OF OPERATION
6238967	29-May-01	09/289915	12-Apr-99	METHOD OF FORMING EMBEDDED DRAM STRUCTURE
6451181	17-Sep-02	09/261879	02-Mar-99	METHOD FOR FORMING A SEMICONDUCTOR DEVICE BARRIER LAYER
6297155	02-Oct-01	09/305093	03-May-99	METHOD OF FORMING A COPPER LAYER OVER A SEMICONDUCTOR LAYER
6378022	23-Apr-02	09/335105	17-Jun-99	METHOD AND APPARATUS FOR PROCESSING INTERRUPTIBLE MULTI-CYCLE INSTRUCTIONS
6449675	10-Sep-02	09/342519	29-Jun-99	MULTIFIELD REGISTER HAVING A SELECTION FIELD FOR SELECTING A SOURCE OF AN INFORMATION FIELD
6385101	07-May-02	09/543532	06-Apr-00	PROGRAMMABLE DELAY CONTROL FOR SENSE AMPLIFIERS IN A MEMORY
6111796	29-Aug-00	09/259454	01-Mar-99	PROGRAMMABLE DELAY CONTROL for sense amplifiers IN A MEMORY
6031775	29-Feb-00	09/259453	01-Mar-99	DYNAMIC SENSE AMPLIFIER IN A MEMORY CAPABLE OF LIMITING THE VOLTAGE SWING ON HIGH-CAPACITANCE GLOBAL DATA LINES
6473457	29-Oct-02	09/307453	07-May-99	METHOD AND APPARATUS FOR PRODUCING A PULSE WIDTH MODULATED SIGNAL
6510444	21-Jan-03	09/333903	16-Jun-99	DATA PROCESSOR ARCHITECTURE AND INSTRUCTION FORMAT FOR INCREASED EFFICIENCY
6518070	11-Feb-03	09/571586	17-May-00	PROCESS FOR FORMING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
6434721	13-Aug-02	09/541642	03-Apr-00	METHOD AND APPARATUS FOR CONSTRAINT GRAPH BASED LAYOUT COMPACTION FOR INTEGRATED CIRCUITS
6269427	31-Jul-01	09/271493	18-Mar-99	MULTIPLE LOAD MISS HANDLING IN A CACHE MEMORY SYSTEM
6378112	23-Apr-02	09/332817	14-Jun-99	VERIFICATION OF DESIGN BLOCKS AND METHOD OF EQUIVALENCE CHECKING OF MULTIPLE DESIGN VIEWS
6278394	21-Aug-01	09/400257	21-Sep-99	A SIGNAL PROCESSING CIRCUIT AND METHOD OF OPERATION
6839381	04-Jan-05	09/481858	12-Jan-00	METHOD AND APPARATUS FOR COHERENT DETECTION IN A TELECOMMUNICATIONS SYSTEM
6444569	03-Sep-02	09/835276	16-Apr-01	A METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
6573173	03-Jun-03	10/175637	20-Jun-02	A METHOD FOR FORMING A COPPER INTERCONNECT USING A

121


Patent No.	Grant Date	Appl No.	Appl Date	Title
				MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
6274478	14-Aug-01	09/352136	13-Jul-99	A METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
6551919	22-Apr-03	09/970284	03-Oct-01	A METHOD FOR FORMING A DUAL INLAID COPPER INTERCONNECT STRUCTURE
6326301	04-Dec-01	09/352134	13-Jul-99	[A] METHOD FOR FORMING A DUAL INLAID COPPER INTERCONNECT STRUCTURE
6499116	24-Dec-02	09/282694	31-Mar-99	PERFORMANCE OF DATA STREAM TOUCH EVENTS
6317806	13-Nov-01	09/315612	20-May-99	Static queue and index queue for storing values identifying static queue locations [APPARATUS AND METHOD FOR QUEUING INFORMATION IN A PROCESSOR ]
6272604	07-Aug-01	09/315613	20-May-99	CONTINGENT RESPONSE APPARATUS AND METHOD FOR MAINTAINING CACHE COHERENCY
6636980	21-Oct-03	09/377632	19-Aug-99	BUS INTERFACE APPARATUS AND METHOD THEREFOR
6330184	11-Dec-01	09/659105	11-Sep-00	METHOD OF OPERATING A SEMICONDUCTOR DEVICE
6320784	20-Nov-01	09/524916	14-Mar-00	MEMORY CELL AND METHOD FOR PROGRAMMING THEREOF
6451681	17-Sep-2002 [29-Aug-2002]	09/411266	04-Oct-99	METHOD OF FORMING COPPER INTERCONNECTION UTILIZING ALUMINUM CAPPING FILM
6255204	03-Jul-01	09/316012	21-May-99	METHOD FOR FORMING A SEMICONDUCTOR DEVICE
6535552	18-Mar-03	09/314587	19-May-99	FAST TRAINING OF EQUALIZERS IN DISCRETE MULTI-TONE (DMT) SYSTEMS
6415362	02-Jul-02	09/303364	29-Apr-99	METHOD AND SYSTEM FOR WRITE-THROUGH STORES OF VARYING SIZES
7123647	17-Oct-06	09/438288	12-Nov-99	CHIP RATE BASE BAND RECEIVER PROCESSOR WHICH RECEIVES DIGITAL INFORMATION CONTAINING SYMBOL INFORMATION
6226200	01-May-01	09/441865	17-Nov-99	IN-CIRCUIT MEMORY ARRAY BIT CELL THRESHOLD VOLTAGE DISTRIBUTION MEASUREMENT
6256713	03-Jul-01	09/303365	29-Apr-99	BUS UTILIZATION OPTIMIZATION WITH READ/WRITE COHERENCE including ordering responsive to collisions
6580795	17-Jun-03	09/418301	14-Oct-99	ECHO CANCELLER FOR A FULL-DUPLEX COMMUNICATION SYSTEM AND METHOD THEREFOR
6185139	06-Feb-01	09/481864	12-Jan-00	CIRCUIT AND METHOD FOR ENABLING SEMICONDUCTOR DEVICE BURN-IN
6683859	27-Jan-04	09/438619	12-Nov-99	METHOD AND APPARATUS FOR ECHO CANCELLATION UPDATES IN A MULTICARRIER TRANSCEIVER SYSTEM
6781965	24-Aug-04	09/543866	05-Apr-00	METHOD AND APPARATUS FOR ECHO CANCELLATION UPDATES IN A MULTICARRIER TRANSCEIVER SYSTEM
6567934	20-May-03	09/422312	21-Oct-99	METHOD AND APPARATUS FOR VERIFYING MULTIPROCESSING DESIGN IN A UNIT SIMULATION ENVIRONMENT
6625777	23-Sep-03	09/420471	19-Oct-99	METHOD OF IDENTIFYING AN IMPROVED CONFIGURATION FOR A COMMUNICATION SYSTEM USING CODING GAIN AND AN APPARATUS THEREFOR
6477681	05-Nov-02	09/498852	07-Feb-00	METHODS FOR DECODING DATA IN DIGITAL COMMUNICATION SYSTEMS
6160861	12-Dec-00	09/425881	22-Oct-99	METHOD AND APPARATUS FOR A FREQUENCY MODULATION PHASE LOCKED LOOP
6242956	05-Jun-01	09/425880	22-Oct-99	PHASE LOCKED LOOP
6500315	31-Dec-02	09/631400	03-Aug-00	METHOD AND APPARATUS FOR FORMING A LAYER ON A SUBSTRATE
6842895	11-Jan-05	09/746978	21-Dec-00	SINGLE INSTRUCTION FOR MULTIPLE LOOP
6108266	22-Aug-00	09/428440	28-Oct-99	MEMORY UTILIZING A PROGRAMMABLE DELAY TO CONTROL ADDRESS BUFFERS
6389516	14-May-02	09/315542	20-May-99	INTERVENTION ORDERING IN A MULTIPROCESSOR SYSTEM
6052302	18-Apr-00	09/406425	27-Sep-99	BIT-WISE CONDITIONAL WRITE METHOD AND SYSTEM FOR AN MRAM
6516420	04-Feb-03	09/426265	25-Oct-99	DATA SYNCHRONIZER USING A PARALLEL HANDSHAKE PIPELINE WHEREIN VALIDITY INDICATORS GENERATE AND SEND ACKNOWLEDGEMENT SIGNALS TO A DIFFERENT CLOCK DOMAIN
6351020	26-Feb-02	09/438618	12-Nov-99	LINEAR CAPACITOR STRUCTURE IN A CMOS PROCESS
6505149	07-Jan-03	09/365387	02-Aug-99	METHOD AND SYSTEM FOR VERIFYING A SOURCE-SYNCHRONOUS COMMUNICATION INTERFACE OF A DEVICE

122


Patent No.	Grant Date	Appl No.	Appl Date	Title
6477679	05-Nov-02	09/499402	07-Feb-00	METHODS FOR DECODING DATA IN DIGITAL COMMUNICATION SYSTEMS
6519684	11-Feb-03	09/447254	23-Nov-99	LOW OVERHEAD METHOD FOR SELECTING AND UPDATING AN ENTRY IN A CACHE MEMORY
7188262	06-Mar-07	10/376816	28-Feb-03	BUS ARBITRATION IN LOW POWER SYSTEM
6560712	06-May-03	09/440857	16-Nov-99	BUS ARBITRATION IN LOW POWER SYSTEM
6775765	10-Aug-04	09/498814	07-Feb-00	DATA PROCESSING SYSTEM HAVING INSTRUCTION FOLDING AND METHOD THEREOF
6665656	16-Dec-03	09/413089	05-Oct-99	METHOD AND APPARATUS FOR EVALUATING DOCUMENTS WITH CORRELATING INFORMATION
6229400	08-May-01	09/426934	22-Oct-99	METHOD AND APPARATUS FOR A CALIBRATED FREQUENCY MODULATION PHASE LOCKED LOOP
7441262	21-Oct-08	10/192802	11-Jul-02	INTEGRATED VPN/FIREWALL SYSTEM
5410181	25-Apr-95	08/262180	20-Jun-94	METHOD AND ASSEMBLY FOR MOUNTING AN ELECTRONIC DEVICE HAVING AN OPTICALLY ERASABLE SURFACE
5381114	10-Jan-95	08/223416	04-Apr-94	A CONTINUOUS TIME COMMON MODE FEEDBACK AMPLIFIER
5625316	29-Apr-97	08/269509	01-Jul-94	TUNING CIRCUIT FOR AN RC FILTER
5530399	25-Jun-96	08/363786	27-Dec-94	TRANS CONDUCTANCE SCALING CIRCUIT AND METHOD RESPONSIVE TO A RECEIVED DIGITAL CODE WORD FOR USE WITH AN OPERATIONAL TRANS CONDUCTANCE CIRCUIT
7637160	29-Dec-09	11/479792	30-Jun-06	MEMS SUSPENSION AND ANCHORING DESIGN
7414384	19-Aug-08	11/689504	21-Mar-07	SERIES REGULATOR CIRCUIT
7391278	24-Jun-08	11/461120	31-Jul-06	OSCILLATOR WITH STACKED AMPLIFIER
7632698	15-Dec-09	11/383649	16-May-06	INTEGRATED CIRCUIT ENCAPSULATION AND METHOD THEREFOR
7439787	21-Oct-08	11/495265	27-Jul-06	METHODS AND APPARATUS FOR A DIGITAL PULSE WIDTH MODULATOR USING MULTIPLE DELAY LOCKED LOOPS
7434464	14-Oct-08	11/529983	29-Sep-06	METHODS AND APPARATUS FOR A MEMS GYRO SENSOR
7466146	16-Dec-08	11/373071	10-Mar-06	FROZEN MATERIAL DETECTION USING ELECTRIC FIELD SENSOR
7487661	10-Feb-09	11/580419	11-Oct-06	SENSOR HAVING FREE FALL SELF-TEST CAPABILITY AND METHOD THEREFOR
7365584	29-Apr-08	11/445652	02-Jun-06	SLEW-RATE CONTROL APPARATUS AND METHODS FOR A POWER TRANSISTOR TO REDUCE VOLTAGE TRANSIENTS DURING INDUCTIVE FLYBACK
7538559	26-May-09	11/733079	09-Apr-07	SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
7218119	15-May-07	11/444087	31-May-06	SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
7401201	15-Jul-08	11/413422	28-Apr-06	PROCESSOR AND METHOD FOR ALTERING ADDRESS TRANSLATION
7586367	08-Sep-09	11/739933	25-Apr-07	CURRENT SENSOR DEVICE
7595623	29-Sep-09	11/603409	20-Nov-06	METHODS AND APPARATUS FOR A SPREAD SPECTRUM SWITCHING REGULATOR
7583088	01-Sep-09	11/627633	26-Jan-07	SYSTEM AND METHOD FOR REDUCING NOISE IN SENSORS WITH CAPACITIVE PICKUP
7486129	03-Feb-09	11/681067	01-Mar-07	LOW POWER VOLTAGE REFERENCE
7358871	15-Apr-08	11/510542	25-Aug-06	METHOD AND SYSTEM FOR DECODING DATA
7579860	25-Aug-09	11/592411	02-Nov-06	DIGITAL BANDGAP REFERENCE AND METHOD FOR PRODUCING REFERENCE SIGNAL
7372342	13-May-08	11/461155	31-Jul-06	OSCILLATOR
7447867	04-Nov-08	11/413430	28-Apr-06	NON-INTRUSIVE ADDRESS MAPPING HAVING A MODIFIED ADDRESS SPACE IDENTIFIER AND CIRCUITRY THEREFOR
7579898	25-Aug-09	11/496359	31-Jul-06	TEMPERATURE SENSOR DEVICE AND METHODS THEREOF
7610809	03-Nov-09	11/655557	18-Jan-07	DIFFERENTIAL CAPACITIVE SENSOR AND METHOD OF MAKING SAME
7528468	05-May-09	11/526971	25-Sep-06	CAPACITOR ASSEMBLY WITH SHIELDED CONNECTIONS AND METHOD FOR FORMING THE SAME
7495987	24-Feb-09	11/811547	11-Jun-07	CURRENT-MODE MEMORY CELL
7378993	27-May-08	11/619932	04-Jan-07	METHOD AND SYSTEM FOR TRANSMITTING DATA
7602233	13-Oct-09	12/040277	29-Feb-08	A VOLTAGE MULTIPLIER WITH IMPROVED EFFICIENCY
7589658	15-Sep-09	12/026205	05-Feb-08	ANALOG-TO-DIGITAL CONVERTER WITH VARIABLE GAIN AND METHOD THEREOF
7542365	02-Jun-09	11/862856	27-Sep-07	APPARATUS AND METHOD FOR ACCESSING A SYNCHRONOUS SERIAL MEMORY HAVING UNKNOWN ADDRESS BIT FIELD SIZE

123


Patent No.	Grant Date	Appl No.	Appl Date	Title
7518352	14-Apr-09	11/747414	11-May-07	BOOTSTRAP CLAMPING CIRCUIT FOR DC/DC REGULATORS AND METHOD THEREOF
7578190	25-Aug-09	11/833476	03-Aug-07	SYMMETRICAL DIFFERENTIAL CAPACITIVE SENSOR AND METHOD OF MAKING SAME
7520170	21-Apr-09	11/775853	10-Jul-07	OUTPUT CORRECTION CIRCUIT FOR THREE-AXIS ACCELEROMETER
7603902	20-Oct-09	12/120246	14-May-08	TEMPERATURE COMPENSATION CIRCUIT, TRIMMING CIRCUIT, AND ACCELERATION DETECTOR
7594423	29-Sep-09	11/936250	07-Nov-07	KNOCK SIGNAL DETECTION IN AUTOMOTIVE SYSTEMS
7423416	09-Sep-08	11/853939	12-Sep-07	VOLTAGE REGULATOR AND METHOD FOR PROVIDING A REGULATED OUTPUT
7573416	11-Aug-09	12/112060	30-Apr-08	ANALOG TO DIGITAL CONVERTER WITH LOW POWER CONTROL
7486535	03-Feb-09	11/692332	28-Mar-07	METHOD AND DEVICE FOR PROGRAMMING ANTI-FUSES
7432754	07-Oct-08	11/460349	27-Jul-06	VOLTAGE CONTROL CIRCUIT HAVING A POWER SWITCH
7323931	29-Jan-08	11/389223	27-Mar-06	SYSTEM AND METHOD FOR OPERATING A FEEDBACK NETWORK
7489202	10-Feb-09	11/841497	20-Aug-07	RF AMPLIFIER WITH STACKED TRANSISTORS, TRANSMITTING DEVICE, AND METHOD THEREFOR
7352311	01-Apr-08	11/507919	22-Aug-06	CONTINUOUS TIME NOISE SHAPING ANALOG-TO-DIGITAL CONVERTER
7498848	03-Mar-09	11/851380	06-Sep-07	SYSTEM AND METHOD FOR MONITORING CLOCK SIGNAL IN AN INTEGRATED CIRCUIT
7627325	01-Dec-09	11/412865	28-Apr-06	SYSTEM AND METHOD FOR CONTROLLING A WIRELESS DEVICE
7613981	03-Nov-09	11/851383	06-Sep-07	SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN A LOW-DENSITY PARITY-CHECK (LDPC) DECODER
7508246	24-Mar-09	11/532295	15-Sep-06	PERFORMANCE VARIATION COMPENSATING CIRCUIT AND METHOD
7612577	03-Nov-09	11/829153	27-Jul-07	SPEEDPATH REPAIR IN AN INTEGRATED CIRCUIT
7379002	27-May-08	11/639676	15-Dec-06	METHODS AND APPARATUS FOR A MULTI-MODE ANALOG-TO-DIGITAL CONVERTER
7479824	20-Jan-09	11/457312	13-Jul-06	A DUAL MODE VOLTAGE SUPPLY CIRCUIT
7495515	24-Feb-09	11/895427	24-Aug-07	LOW-NOISE AMPLIFIER
7358796	15-Apr-08	11/530181	08-Sep-06	INPUT CIRCUIT FOR RECEIVING A VARIABLE VOLTAGE INPUT SIGNAL AND METHOD
7420394	02-Sep-08	11/561209	17-Nov-06	LATCHING INPUT BUFFER CIRCUIT WITH VARIABLE HYSTERESIS
7443333	28-Oct-08	11/674435	13-Feb-07	SINGLE STAGE CYCLIC ANALOG TO DIGITAL CONVERTER WITH VARIABLE RESOLUTION
7598716	06-Oct-09	11/759463	07-Jun-07	LOW PASS FILTER LOW DROP-OUT VOLTAGE REGULATOR
7554391	30-Jun-09	12/013070	11-Jan-08	AMPLIFIER HAVING A VIRTUAL GROUND AND METHOD THEREOF
7619440	17-Nov-09	12/022199	30-Jan-08	CIRCUIT HAVING LOGIC STATE RETENTION DURING POWER-DOWN AND METHOD THEREFOR
7443323	28-Oct-08	11/651858	10-Jan-07	CALIBRATING A DIGITAL-TO-ANALOG CONVERTER
7397291	08-Jul-08	11/621844	09-Jan-07	CLOCK JITTER MINIMIZATION IN A CONTINUOUS TIME SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER
7542360	02-Jun-09	11/780251	19-Jul-07	PROGRAMMABLE BIAS FOR A MEMORY ARRAY
7639097	29-Dec-09	11/870733	11-Oct-07	CRYSTAL OSCILLATOR CIRCUIT HAVING FAST START-UP AND METHOD THEREFOR
7583121	01-Sep-09	11/847424	30-Aug-07	FLIP-FLOP HAVING LOGIC STATE RETENTION DURING A POWER DOWN MODE AND METHOD THEREFOR
7629711	08-Dec-09	11/690596	23-Mar-07	LOAD INDEPENDENT VOLTAGE REGULATOR
7657682	02-Feb-10	11/855706	14-Sep-07	BUS INTERCONNECT WITH FLOW CONTROL
7629840	08-Dec-09	11/875998	22-Oct-07	DIGITAL PULSE WIDTH MODULATED FEEDBACK SYSTEM FOR A SWITCHING AMPLIFIER AND METHOD THEREFOR
7612613	03-Nov-09	12/026394	05-Feb-08	SELF REGULATING BIASING CIRCUIT
7598805	06-Oct-09	12/013149	11-Jan-08	LOAD INSENSITIVE BALANCED POWER AMPLIFIER AND RELATED OPERATING METHOD
7579908	25-Aug-09	11/845035	25-Aug-07	DIGITAL AUDIO AMPLIFIERS, ELECTRONIC SYSTEMS, AND METHODS
7548093	16-Jun-09	12/042351	05-Mar-08	SCHEME OF LEVEL SHIFTER CELL
7595699	29-Sep-09	12/042228	04-Mar-08	LOCK LOOP CIRCUIT AND METHOD HAVING IMPROVED LOCK TIME
7535391	19-May-09	11/969982	07-Jan-08	ANALOG-TO-DIGITAL CONVERTER HAVING RANDOM CAPACITOR ASSIGNMENT AND METHOD THEREOF
7573332	11-Aug-09	12/039377	28-Feb-08	AMPLIFIER WITH ACTIVE INDUCTOR

124


Patent No.	Grant Date	Appl No.	Appl Date	Title
6931078	16-Aug-05	10/259888	30-Sep-02	ULTRA WIDE BANDWIDTH SPREAD-SPECTRUM COMMUNICATIONS SYSTEM
6901112	31-May-05	10/259736	30-Sep-02	ULTRA WIDE BANDWIDTH SPREAD-SPECTRUM COMMUNICATIONS SYSTEM
7408973	05-Aug-08	11/165519	24-Jun-05	ULTRA WIDE BANDWIDTH SPREAD-SPECTRUM COMMUNICATIONS SYSTEM
6700939	02-Mar-04	09/209460	11-Dec-98	ULTRA WIDE BANDWIDTH SPREAD-SPECTRUM COMMUNICATIONS SYSTEM
6351246	26-Feb-02	09/563292	03-May-00	PLANAR ULTRA WIDE BAND ANTENNA WITH INTEGRATED ELECTRONICS
6559810	06-May-03	10/014668	14-Dec-01	PLANAR ULTRA WIDE BAND ANTENNA WITH INTEGRATED ELECTRONICS
6914573	05-Jul-05	10/601308	23-Jun-03	ELECTRICALLY SMALL PLANAR UWB ANTENNA APPARATUS AND RELATED SYSTEM
6590545	08-Jul-03	10/054790	25-Jan-02	ELECTRICALLY SMALL PLANAR UWB ANTENNA APPARATUS AND RELATED SYSTEM
7400669	15-Jul-08	11/165541	24-Jun-05	LEAKAGE NULLING RECEIVER CORRELATOR STRUCTURE AND METHOD FOR ULTRA WIDE BANDWIDTH COMMUNICATION SYSTEM
6937646	30-Aug-05	09/685200	10-Oct-00	LEAKAGE NULLING RECEIVER CORRELATOR STRUCTURE AND METHOD FOR ULTRA WIDE BANDWIDTH COMMUNICATION SYSTEM
7177341	13-Feb-07	09/972966	10-Oct-01	ULTRA WIDE BANDWIDTH NOISE CANCELLATION MECHANISM AND METHOD
7394866	01-Jul-08	10/705120	12-Nov-03	ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE PULSE FORMATION
6735238	11-May-04	09/684400	10-Oct-00	ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE PULSE FORMATION
7505538	17-Mar-09	11/045373	31-Jan-05	ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE RECEPTION
6859506	12-Feb-05	09/684782	10-Oct-00	ULTRA WIDEBAND COMMUNICATION SYSTEM, METHOD, AND DEVICE WITH LOW NOISE RECEPTION
7508865	24-Mar-09	11/098419	05-Apr-05	SYSTEM AND METHOD FOR TRACKING AN ULTRAWIDE BANDWIDTH SIGNAL
6925108	02-Aug-05	09/685195	10-Oct-00	ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION
7079604	18-Jul-06	09/685196	10-Oct-00	ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION USING MULTIPLE DETECTION ARMS
6965630	15-Nov-05	09/685197	10-Oct-00	MODE CONTROLLER FOR SIGNAL ACQUISITION AND TRACKING IN AN ULTRA WIDEBAND COMMUNICATION SYSTEM
7315564	01-Jan-08	11/214741	31-Aug-05	ANALOG SIGNAL SEPARATOR FOR UWB VERSUS NARROWBAND SIGNALS
7006553	28-Feb-06	09/685198	10-Oct-00	ANALOG SIGNAL SEPARATOR FOR UWB VERSUS NARROWBAND SIGNALS
6975665	13-Dec-05	09/685199	10-Oct-00	LOW POWER, HIGH RESOLUTION TIMING GENERATOR FOR ULTRA-WIDE BANDWIDTH COMMUNICATION SYSTEMS
6505032	07-Jan-03	09/685201	10-Oct-00	CARRIERLESS ULTRA WIDEBAND WIRELESS SIGNALS FOR CONVEYING APPLICATION DATA
6909877	21-Jun-05	10/295858	18-Nov-02	CARRIERLESS ULTRA WIDEBAND WIRELESS SIGNALS FOR CONVEYING DATA
6850733	01-Feb-05	10/268666	11-Oct-02	Method for conveying application data with CARRIERLESS ULTRA WIDEBAND WIRELESS SIGNALS [FOR CONVEYING DATA]
6912372	28-Jun-05	10/295926	18-Nov-02	ULTRA WIDEBAND SIGNALS FOR CONVEYING DATA
7574219	11-Aug-09	11/103521	12-Apr-05	METHOD AND SYSTEM FOR ENABLING DEVICE FUNCTIONS BASED ON DISTANCE INFORMATION
7058414	06-Jun-06	09/685202	10-Oct-02	METHOD AND SYSTEM FOR ENABLING DEVICE FUNCTIONS BASED ON DISTANCE INFORMATION
6834073	21-Dec-04	09/685203	10-Oct-00	SYSTEM AND METHOD FOR BASEBAND REMOVAL OF NARROWBAND INTERFERENCE IN ULTRA WIDEBAND SIGNALS
7010056	07-Mar-06	09/685205	10-Oct-00	SYSTEM AND METHOD FOR GENERATING ULTRA WIDEBAND PULSES
6967993	22-Nov-05	09/684401	10-Oct-00	ULTRAWIDE BANDWIDTH SYSTEM AND METHOD FOR FAST SYNCHRONIZATION USING SUB-CODE SPINS
7110380	19-Sep-06	10/067423	07-Feb-02	SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR SHARING BANDWIDTH IN A WIRELESS PERSONAL AREA NETWORK OR A WIRELESS LOCAL AREA NETWORK

125


Patent No.	Grant Date	Appl No.	Appl Date	Title
7030663	18-Apr-06	10/233534	04-Sep-02	[MONOCYCLE GENERATOR] Method and apparatus for generating narrow pulse width monocycles
6812762	02-Nov-04	10/235845	06-Sep-02	FAST MONO-CYCLE GENERATING CIRCUIT USING FULL RAIL SWING LOGIC CIRCUITS
7088162	08-Aug-06	11/063889	24-Feb-05	CIRCUIT GENERATING CONSTANT NARROW-PULSE-WIDTH BIPOLARITY MONOCYCLES
6927613	09-Aug-05	10/235844	06-Sep-02	CIRCUIT GENERATING CONSTANT NARROW-PULSE-WIDTH BOPOLARITY CYCE MONOCYCLES USING CMOS CIRCUITS
6838930	04-Jan-05	10/305067	27-Nov-02	SWITCHED CAPACITOR AMPLIFIER WITH HIGH THROUGHPUT ARCHITECTURE
7110473	19-Sep-06	10/214183	08-Aug-02	MODE CONTROLLER FOR SIGNAL ACQUISITION AND TRACKING IN AN ULTRA WIDEBAND COMMUNICATION SYSTEM
7616676	10-Nov-09	12/068676	11-Feb-08	METHOD AND SYSTEM FOR PERFORMING DISTANCE MEASURING AND DIRECTION FINDING USING ULTRAWIDE BANDWIDTH TRANSMISSIONS
7346120	18-Mar-08	10/318371	13-Dec-02	METHOD AND SYSTEM FOR PERFORMING DISTANCE MEASURING AND DIRECTION FINDING USING ULTRAWIDE BANDWIDTH TRANSMISSIONS
7280518	09-Oct-07	10/262946	03-Oct-02	METHOD OF OPERATING A MEDIA ACCESS CONTROLLER
7039392	02-May-06	10/318372	13-Dec-02	SYSTEM AND METHOD FOR PROVIDING DEVICE AUTHENTICATION IN A WIRELESS NETWORK
7289790	30-Oct-07	11/389313	27-Mar-06	SYSTEM FOR PROVIDING DEVICE AUTHENTICATION IN A WIRELESS NETWORK
7184767	27-Feb-07	10/305066	27-Nov-02	SYSTEM AND METHOD OF COMMUNICATION BETWEEN MULTIPLE POINT-COORDINATED WIRELESS NETWORKS
7289535	30-Oct-07	10/388168	14-Mar-03	METHOD OF ACCOMMODATING FRAGMENTATION AND BURST IN A WIRELESS PROTOCOL
7120126	10-Oct-06	10/348012	22-Jan-03	METHOD FOR IMPROVED MEDIA QUALITY FEEDBACK
7280615	09-Oct-07	10/677753	03-Oct-03	METHOD FOR MAKING A CLEAR CHANNEL ASSESSMENT IN A WIRELESS NETWORK
7248659	24-Jul-07	10/623719	22-Jul-03	METHOD FOR ADJUSTING ACQUISITION SPEED IN A WIRELESS NETWORK
7184719	27-Feb-07	10/623798	22-Jul-03	METHOD FOR OPERATING MULTIPLE OVERLAPPING WIRELESS NETWORKS
7280601	09-Oct-07	10/623804	22-Jul-03	METHOD FOR OPERATING MULTIPLE OVERLAPPING WIRELESS NETWORKS
6788117	07-Sep-04	10/379587	06-Mar-03	METHOD AND APPARATUS FOR GENERATING FREQUENCY-STABLE WAVELETS
7333814	19-Feb-08	10/379998	06-Mar-03	METHOD OF ACCOMMODATING OVERLAPPING ADJACENT NETWORKS
7209469	24-Apr-07	11/409984	25-Apr-06	METHOD AND SYSTEM FOR PERFORMING RANGING FUNCTIONS IN AN ULTRAWIDE BANDWIDTH SYSTEM
7042868	09-May-06	10/383256	07-Mar-03	METHOD AND SYSTEM FOR PERFORMING RANGING FUNCTIONS IN AN ULTRAWIDE BANDWIDTH SYSTEM
7127254	24-Oct-06	10/384801	11-Mar-03	METHOD OF USING SUB-RATE SLOTS IN AN ULTRAWIDE BANDWIDTH SYSTEM
7634275	15-Dec-09	10/609667	01-Jul-03	METHOD OF ACCOMMODATING PERIODIC INTERFACING SIGNALS IN A WIRELESS NETWORK
6980541	27-Dec-05	10/197910	19-Jul-02	MEDIA ACCESS CONTROLLER HAVING PSEUDO-STATIC GUARANTEED TIME SLOTS
7450558	11-Nov-08	11/261643	31-Oct-05	METHOD FOR CONTROLLING OPERATION OF A CHILD OR NEIGHBOR NETWORK
7593422	22-Sep-09	10/639778	13-Aug-03	METHOD OF OPERATING A MEDIA ACCESS CONTROLLER HAVING PSEUDO-STATIC GUARANTEED TIME SLOTS
7212799	01-May-07	10/654922	05-Sep-03	METHOD AND APPARATUS FOR ACQUIRING AND TRACKING ULTRAWIDE BANDWIDTH SIGNALS
7292622	06-Nov-07	10/680492	08-Oct-03	METHOD AND APPARATUS FOR RAKING IN A WIRELESS NETWORK
7072635	04-Jul-06	10/680491	08-Oct-03	METHOD FOR COMBINING DATA FROM PHASE INDETERMINATE DATA STREAMS FOR RAKING
7088702	08-Aug-06	10/680489	08-Oct-03	METHOD FOR CONTROLLING A DATA STREAM IN A WIRELESS NETWORK
7280607	09-Oct-07	10/305109	27-Nov-02	ULTRA WIDE BANDWIDTH COMMUNICATIONS METHOD AND SYSTEM
7450634	11-Nov-08	10/538174	09-Dec-03	DECISION FEED FORWARD EQUALIZER SYSTEM AND METHOD
7570712	04-Aug-09	10/546219	27-Feb-04	SYSTEM AND METHOD FOR TRANSMITTING ULTRAWIDE BANDWIDTH SIGNALS

126


Patent No.	Grant Date	Appl No.	Appl Date	Title
7492789	17-Feb-09	10/546218	27-Feb-04	METHOD AND SYSTEM FOR DYNAMIC PACKET AGGREGATION IN A WIRELESS NETWORK
7359459	15-Apr-08	10/873422	23-Jun-04	SYSTEM AND METHOD FOR LOW POWER CLEAR CHANNEL ASSESSMENT
7002940	21-Feb-06	10/868948	17-Jun-04	MULTIPLE-STAGE FILTERING DEVICE AND METHOD
7324790	29-Jan-08	10/834024	29-Apr-04	WIRELESS TRANSCEIVER AND METHOD OF OPERATING THE SAME
7224711	29-May-07	10/902021	30-Jul-04	SYSTEM AND METHOD FOR THE MITIGATION OF SPECTRAL LINES IN AN ULTRAWIDE BANDWIDTH TRANSCEIVER
7292827	06-Nov-07	10/975375	29-Oct-04	SYSTEM AND METHOD FOR PROVIDING A SINGLE-ENDED RECEIVE PORTION AND A DIFFERENTIAL TRANSMIT PORTION IN A WIRELESS TRANSCEIVER
7352793	01-Apr-08	10/952813	30-Sep-04	SYSTEM AND METHOD FOR ULTRA WIDEBAND COMMUNICATIONS USING MULTIPLE CODE WORDS
7376177	20-May-08	11/045362	31-Jan-05	CIRCUIT AND METHOD FOR RAKE TRAINING DURING ACQUISITION
7304975	04-Dec-07	10/918457	16-Aug-04	METHOD FOR PROVIDING RAPID DELAYED FRAME ACKNOWLEDGMENT IN A WIRELESS TRANSCEIVER
7434148	07-Oct-08	11/024805	30-Dec-04	TRACK BUFFER IN A PARALLEL DECODER
7458008	25-Nov-08	11/024803	30-Dec-04	DECISION VOTING IN A PARALLEL DECODER
7409198	05-Aug-08	11/214061	30-Aug-05	WIDEBAND VARIABLE GAIN AMPLIFIER IN AN ULTRA WIDEBAND RECEIVER
7508896	24-Mar-09	11/022883	28-Dec-04	CIRCUIT AND METHOD FOR DYNAMICALLY ADJUSTING A FILTER BANDWIDTH
7573865	11-Aug-09	11/229598	20-Sep-05	METHOD OF SYNCHRONIZING A WIRELESS DEVICE USING AN EXTERNAL CLOCK
7228120	05-Jun-07	10/990400	18-Nov-04	CIRCUIT AND METHOD FOR REDUCING DIRECT CURRENT BIASES
7532687	12-May-09	11/036132	18-Jan-05	DUAL STAGE AUTOMATIC GAIN CONTROL IN AN ULTRA WIDEBAND RECEIVER
7444556	28-Oct-08	11/128268	13-May-05	SYSTEM AND METHOD OF INTERLEAVING TRANSMITTED DATA
7548561	16-Jun-09	11/128267	13-May-05	METHOD OF TRANSMITTING AND RECEIVING DATA
7558539	07-Jul-09	11/238986	30-Sep-05	POWER CONTROL FEEDBACK LOOP FOR ADJUSTING A MAGNITUDE OF AN OUTPUT SIGNAL
7362840	22-Apr-08	10/990367	18-Nov-04	CIRCUIT AND METHOD FOR ADJUSTING TIMING ALIGNMENT USING PROGRAMMABLE CODES
7548552	16-Jun-09	11/036133	18-Jan-05	METHOD FOR POLLING IN A MEDIUM ACCESS CONTROL PROTOCOL
7499442	03-Mar-09	10/998572	30-Nov-04	METHOD FOR SHARING BANDWIDTH USING REDUCED DUTY CYCLE SIGNALS
7644200	05-Jan-10	12/010898	31-Jan-08	METHOD OF REPEATING DATA TRANSMISSION BETWEEN NETWORK DEVICES by timing a first predetermined period after previous first data transmission
7444443	28-Oct-08	11/066307	28-Feb-05	METHOD OF REPEATING DATA TRANSMISSION BETWEEN NETWORK DEVICES by timing a first predetermined period after previous first data transmission
7489723	10-Feb-09	11/194755	02-Aug-05	SYSTEM AND METHOD FOR ADJUSTING ACQUISITION PHASE
7447503	04-Nov-08	11/077001	11-Mar-05	METHOD OF DESIGNATING A FUTURE NETWORK COORDINATOR
7224938	29-May-07	11/076855	11-Mar-05	METHOD OF COMMUNICATING WITH A NETWORK DEVICE
7570627	04-Aug-09	11/128269	13-May-05	METHOD FOR SHARING BANDWIDTH USING REDUCED DUTY CYCLE SIGNALS AND MEDIA ACCESS CONTROL
7512171	31-Mar-09	11/214736	31-Aug-05	SYSTEM AND METHOD FOR CALIBRATING AN ANALOG SIGNAL PATH IN AN ULTRA WIDEBAND RECEIVER
7352333	01-Apr-08	11/237751	29-Sep-05	FREQUENCY-NOTCHING ANTENNA
7519099	14-Apr-09	11/238990	30-Sep-05	PSEUDORANDOM NOISE LOCK DETECTOR
7502410	10-Mar-09	11/239133	30-Sep-05	METHOD AND SYSTEM FOR CONTROLLING A NOTCHING MECHANISM
7643602	05-Jan-10	11/239350	30-Sep-05	METHOD AND SYSTEM FOR ESTIMATING FREQUENCY OFFSETS
7649764	19-Jan-10	11/619808	04-Jan-07	MEMORY WITH SHARED WRITE BIT LINE(S)
7643533	1/5/2010	11/183778	19-Jul-05	LOW POWER, HIGH RESOLUTION TIMING GENERATOR FOR ULTRA-WIDE BANDWIDTH COMMUNICATION SYSTEMS
7623599	24-Nov-09	11/284675	21-Nov-05	BLIND BANDWIDTH DETECTION FOR A SAMPLE STREAM
7627030	1-Dec-09	11/198602	05-Aug-05	RADIO RECEIVER WITH SELECTIVELY DISABLED EQUALIZER
7639671	29-Dec-09	11/369737	07-Mar-06	ALLOCATING PROCESSING RESOURCES FOR MULTIPLE INSTANCES OF A SOFTWARE COMPONENT
7566993	28-Jul-09	11/796380	28-Apr-07	BATTERY OPTIMIZED CIRCUIT AND SYSTEM ON A CHIP

127


Patent No.	Grant Date	Appl No.	Appl Date	Title
7555410	30-Jun-09	11/494798	27-Jul-06	CIRCUIT FOR USE WITH MULTIFUNCTION HANDHELD DEVICE WITH VIDEO FUNCTIONALITY
7528653	05-May-09	12/017646	22-Jan-08	CLASS-D AMPLIFIER WITH NOISE-IMMUNITY FEEDBACK
7447924	04-Nov-08	11/231634	21-Sep-05	METHOD & APPARATUS FOR POWER SUPPLY ADJUSTMENT WITH INCREASED SLEWING
7602862	13-Oct-09	11/237344	28-Sep-05	MIXING MODULE AND METHODS FOR USE THEREWITH
7580671	25-Aug-09	11/415826	02-May-06	AUDIO SYSTEM, RADIO RECORD MODULE AND METHODS FOR USE THEREWITH
7596351	29-Sep-09	11/415825	02-May-06	AUDIO SYSTEM, RADIO RECORD MODULE AND METHODS FOR USE THEREWITH
7551017	23-Jun-09	11/304312	14-Dec-05	LEVEL SHIFTER AND METHODS FOR USE THEREWITH
7656331	02-Feb-10	11/796968	30-Apr-07	SYSTEM ON A CHIP WITH MULTIPLE INDEPENDENT OUTPUTS
5677917	14-Oct-97	08/641151	29-Apr-96	INTEGRATED CIRCUIT MEMORY USING FUSIBLE LINKS IN A SCAN CHAIN
5629533	13-May-97	08/384095	06-Feb-95	OPTICAL SENSOR AND METHOD
5633640	27-May-97	08/349592	05-Dec-94	METHOD AND APPARATUS FOR A DATA CONVERTER WITH A SINGLE OPERATIONAL AMPLIFIER
7348829	25-Mar-08	11/388396	24-Mar-06	SLEW RATE CONTROL OF A CHARGE PUMP
5674780	07-Oct-97	08/505936	24-Jul-95	METHOD OF FORMING AN ELECTRICALLY CONDUCTIVE POLYMER BUMP OVER AN ALUMINUM ELECTRODE

128

Freescale Semiconductor, Inc. U.S. Patent Applications


Appl No.	Appl Date	Title
11/833545	03-Aug-07	METHOD AND CIRCUIT FOR PREVENTING HIGH VOLTAGE MEMORY DISTURB
12/126943	26-May-08	METHOD OF FORMING PREMOLDED LEAD FRAME
09/859326	16-May-01	EXTERNAL CONTROL OF ALGORITHM EXECUTION IN A BUILT-IN SELF-TEST CIRCUIT AND METHOD THEREFOR
10/314407	07-Dec-02	ANTENNA AND WIRELESS DEVICE UTILIZING THE ANTENNA
11/022813	28-Dec-04	INTEGRATED CIRCUIT PACKAGING DEVICE AND METHOD FOR MATCHING IMPEDANCE
11/137979	25-May-05	METHOD OF TRANSFERRING A THIN CRYSTALLINE SEMICONDUCTOR LAYER
11/188615	25-Jul-05	PROGRAMMABLE STRUCTURE INCLUDING NANOCRYSTAL STORAGE ELEMENTS IN A TRENCH
10/613897	02-Jul-03	BUFFERING METHOD AND APPARATUS FOR PROCESSING DIGITAL COMMUNICATIONS SIGNALS
10/613477	02-Jul-03	SEARCHING METHOD AND APPARATUS FOR PROCESSING DIGITAL COMMUNICATION SIGNALS
11/199560	08-Aug-05	CONTROLLING INPUT AND OUTPUT IN A MULTI-MODE WIRELESS PROCESSING SYSTEM
11/199372	08-Aug-05	MULTI-MODE WIRELESS PROCESSOR INTERFACE
11/199577	08-Aug-05	FAST FOURIER TRANSFORM (FFT) ARCHITECTURE IN A MULTI-MODE WIRELESS PROCESSING SYSTEM
11/199564	08-Aug-05	SYSTEM AND METHOD FOR WIRELESS BROADBAND CONTEXT SWITCHING
12/121608	15-May-08	PACKAGE LEVEL ESD PROTECTION AND METHOD THEREFOR
12/028897	11-Feb-08	METHOD FOR EFFICIENT CQI FEEDBACK
12/052621	20-Mar-08	TECHNIQUES FOR REDUCING COMMUNICATION ERRORS IN A WIRELESS COMMUNICATION SYSTEM
12/058345	28-Mar-08	TECHNIQUES FOR REDUCING BUFFER OVERFLOW IN A COMMUNICATION SYSTEM
12/134913	06-Jun-08	DEVICE AND METHOD OF SYNCHRONIZING SIGNALS
10/497426	10/497426	Controlling power supply between a voltage generator, a load and a rechargeable battery [POWER AMPLIFIER TRANSIENT COMPENSATION IN OFDM SYSTEMS ]
10/504010	13-Jan-03	OPTICAL TO RADIO FREQUENCY DETECTOR
12/526306	08-Feb-07	REQUEST CONTROLLER, PROCESSING UNIT, METHOD FOR CONTROLLING REQUESTS AND COMPUTER PROGRAM PRODUCT
12/513084	31-Oct-06	NETWORK AND METHOD FOR SETTING A TIME-BASE OF A NODE IN THE NETWORK
12/025753	05-Feb-08	METHOD AND SYSTEM FOR MANAGING COMMUNICATIONS BETWEEN SUB-SYSTEMS OF A COMMUNICATION DEVICE
11/668453	29-Jan-07	SEMICONDUCTOR WAFER WITH IMPROVED CRACK PROTECTION
11/854546	13-Sep-07	SERIES REGULATOR CIRCUIT
12/504653	16-Jul-09	SERIES REGULATOR WITH OVER CURRENT PROTECTION CIRCUIT
12/015516	17-Jan-08	SERIES REGULATOR CIRCUIT
11/737761	20-Apr-07	LIGHT EMITTING ELEMENT DRIVER AND CONTROL METHOD THEREFOR
12/▇▇▇▇▇▇	21-Oct-08	REMOTE CONTROL DEVICE AND INFORMATION MANAGEMENT SERVER, METHOD, AND PROGRAM THEREFOR
11/746071	09-May-07	METHOD AND CIRCUIT FOR GENERATING OUTPUT VOLTAGES FROM INPUT VOLTAGE
11/937959	09-Nov-07	CIRCUIT AND METHOD FOR REDUCING OUTPUT NOISE OF REGULATOR
12/121784	16-May-08	INFORMATION PROCESSOR, METHOD FOR CONTROLLING CACHE FLUSH, AND INFORMATION PROCESSING CONTROLLER
12/050172	18-Mar-08	PULSE WIDTH MODULATION WAVE OUTPUT CIRCUIT
12/527347	16-Feb-07	SYSTEM, COMPUTER PROGRAM PRODUCT AND METHOD FOR TESTING A LOGIC CIRCUIT
11/840999	20-Aug-07	FOLDED DIPOLE ANTENNA
12/207513	10-Sep-08	CAPACITIVE DETECTOR
12/026556	06-Feb-08	METHOD FOR GENERATING SOFT DECISION SIGNAL FROM HARD DECISION SIGNAL IN A RECEIVER SYSTEM
12/325273	01-Dec-08	RAIL TO RAIL BUFFER AMPLIFIER
12/175470	18-Jul-08	AUTHENTICATION SYSTEM INCLUDING ELECTRIC FIELD SENSOR
12/436147	06-May-09	APPARATUS, METHOD, AND PROGRAM FOR OUTPUTTING PRESENT POSITION
12/467306	18-May-09	ENTRAPMENT DETECTION AND PREVENTION DEVICE FOR OPENING/CLOSING MECHANISM
10/197607	18-Jul-02	HETERO-INTEGRATION OF SEMICONDUCTOR MATERIALS ON SILICON
11/470721	07-Sep-06	MULTI-THREADED PROCESSOR ARCHITECTURE
11/437073	19-May-06	ELECTRICAL COMPONENT HAVING AN INDUCTOR AND A METHOD OF FORMATION
11/376410	15-Mar-06	SILICIDED NONVOLATILE MEMORY AND METHOD OF MAKING SAME

129


Appl No.	Appl Date	Title
11/811407	11-Jun-07	SYSTEM AND METHOD FOR ELECTROMIGRATION TOLERANT CELL SYNTHESIS
11/650697	05-Jan-07	INTEGRATED ASSIST FEATURES FOR EPITAXIAL GROWTH
11/371658	08-Mar-06	METHOD FOR PLANARIZING VIAS FORMED IN A SUBSTRATE
11/846633	29-Aug-07	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A SILICON DIOXIDE LAYER
11/489793	19-Jul-06	MULTI-GATE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
12/377348	16-Aug-06	ETCH METHOD IN THE MANUFACTURE OF AN INTEGRATED CIRCUIT
11/423760	13-Jun-06	METHOD OF POLISHING A LAYER USING A POLISHING PAD
11/550900	19-Oct-06	MEMORY DEVICE HAVING SELECTIVELY DECOUPLEABLE MEMORY PORTIONS AND METHOD THEREOF
12/594374	12-Apr-07	ETCH METHOD IN THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
11/419304	19-May-06	SEMICONDUCTOR STRUCTURE PATTERN FORMATION
12/597034	03-May-07	METHOD AND APPARATUS FOR DESIGNING AN INTEGRATED CIRCUIT
12/665070	09-Jul-07	COUPLING LAYER COMPOSITION FOR A SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, METHOD OF FORMING THE COUPLING LAYER, AND APPARATUS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE
12/356235	20-Jan-09	SEMICONDUCTOR SUPERJUNCTION STRUCTURE
12/522036	10-Jan-07	SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE
11/364128	28-Feb-06	METHOD FOR FORMING A DEPOSITED OXIDE LAYER
11/741870	30-Apr-07	SHIELDING STRUCTURES FOR SIGNAL PATHS IN ELECTRONIC DEVICES
12/566569	24-Sep-09	METHOD OF FORMING A BIPOLAR TRANSISTOR AND SEMICONDUCTOR COMPONENT THEREOF
11/788184	18-Apr-07	SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER
11/678962	26-Feb-07	COMPLEMENTARY ZENER TRIGGERED BIPOLAR ESD PROTECTION
11/538862	05-Oct-06	ANITFUSE ONE TIME PROGRAMMABLE MEMORY ARRAY AND METHOD OF MANUFACTURE
11/782070	24-Jul-07	FIELD EMISSION CATHODE STRUCTURE AND METHOD OF MAKING THE SAME
11/532268	15-Sep-06	SYSTEM AND METHOD FOR CIRCUIT SYMBOLIC TIMING ANALYSIS OF CIRCUIT DESIGNS
11/490922	21-Jul-06	SEMICONDUCTOR DEVICE WITH UNDER-FILLED HEAT EXTRACTOR
12/511849	29-Jul-09	SUPERJUNCTION TRENCH DEVICE FORMATION METHODS
12/441311	22-Sep-06	SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE
11/759935	08-Jun-07	HEAT SPREADER FOR CENTER GATE MOLDING
12/130158	30-May-08	METHOD OF FORMING A FINFET AND STRUCTURE
12/397849	04-Mar-09	NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
11/530054	08-Sep-06	NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
11/961392	20-Dec-07	METHOD FOR FABRICATING HIGHLY RELIABLE INTERCONNECTS
11/742363	30-Apr-07	MOSFET DEVICE INCLUDING A SOURCE WITH ALTERNATING P-TYPE AND N-TYPE REGIONS
11/752608	23-May-07	HIGH VOLTAGE DEEP TRENCH CAPACITOR
11/554859	31-Oct-06	III-V COMPOUND SEMICONDUCTOR DEVICE WITH A SURFACE LAYER IN ACCESS REGIONS HAVING CHARGE OF POLARITY OPPOSITE TO CHANNEL CHARGE AND METHOD OF MAKING THE SAME
11/696374	04-Apr-07	STACKED AND SHIELDED PACKAGES WITH INTERCONNECTS
12/103451	15-Apr-08	SPLIT GATE NON-VOLATILE MEMORY CELL
11/533410	20-Sep-06	HEAT SPREADER FOR SEMICONDUCTOR PACKAGE
12/522033	04-Jan-07	SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SEMICONDUCTOR DEVICE
12/162177	03-Feb-06	BARRIER SLURRY COMPOSITION AND BARRIER CMP METHODS
11/788216	18-Apr-07	METHOD TO SELECTIVELY MODULATE GATE WORK FUNCTION THROUGH SELECTIVE GE CONDENSATION AND HIGH-K DIELECTRIC LAYER
11/510401	25-Aug-06	METHOD FOR FORMING AN INDEPENDENT BOTTOM GATE CONNECTION FOR BURIED INTERCONNECTION INCLUDING BOTTOM GATE OF A PLANAR DOUBLE GATE MOSFET
11/627817	26-Jan-07	ELECTRONIC DEVICE INCLUDING A LAYER OF DISCONTINUOUS STORAGE ELEMENTS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/673015	09-Feb-07	INTEGRATED PASSIVE DEVICE AND METHOD OF FABRICATION
11/501096	07-Aug-06	ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STUD OVER A BONDING PAD REGION [AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE]
11/590277	30-Oct-06	METHODS AND APPARATUS FOR A HYBRID ANTENNA SWITCHING SYSTEM
11/851857	07-Sep-07	SUBSTRATE HAVING THROUGH-WAFER VIAS AND METHOD OF FORMING

130


Appl No.	Appl Date	Title
11/556544	03-Nov-06	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER
11/556576	03-Nov-06	ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER
11/460782	28-Jul-06	TRANSISTOR WITH ASYMMETRY FOR DATA STORAGE CIRCUITRY
11/742755	01-May-07	STEP HEIGHT REDUCTION BETWEEN SOI AND EPI FOR DSO AND BOS INTEGRATION
11/561232	17-Nov-06	METHOD OF PACKAGING A DEVICE HAVING A TANGIBLE ELEMENT AND DEVICE THEREOF
11/742778	01-May-07	DUAL SUBSTRATE ORIENTATION OR BULK ON SOI INTEGRATIONS USING OXIDATION FOR SILICON EPITAXY SPACER FORMATION
11/732594	04-Apr-07	NOVEL INTERCONNECT FOR CHIP LEVEL POWER DISTRIBUTION
11/560533	16-Nov-06	MEMORY DEVICE WITH ADJUSTABLE READ REFERENCE BASED ON ECC AND METHOD THEREOF
11/559633	14-Nov-06	ELECTRONIC DEVICE INCLUDING A TRANSISTOR HAVING A METAL GATE ELECTRODE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/559642	14-Nov-06	ELECTRONIC DEVICE INCLUDING A HETEROJUNCTION REGION AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/683236	07-Mar-07	SEMICONDUCTOR DEVICE HAVING TILES FOR DUAL-TRENCH INTEGRATION AND METHOD THEREFOR
11/567249	06-Dec-06	DIE POSITIONING FOR PACKAGED INTEGRATED CIRCUITS
12/560588	16-Sep-09	DUAL GATE LDMOS DEVICES
11/671748	06-Feb-07	PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING FORMING A GATE ELECTRODE LAYER AND FORMING A PATTERNED MASKING LAYER
12/008607	11-Jan-08	MULTILAYER SILICON NITRIDE DEPOSITION FOR A SEMICONDUCTOR DEVICE
11/680316	28-Feb-07	MICROELECTRONIC ASSEMBLY WITH IMPROVED ISOLATION VOLTAGE PERFORMANCE AND A METHOD FOR FORMING THE SAME
11/716058	07-Mar-07	DEEP STI TRENCH AND SOI UNDERCUT ENABLING STI OXIDE STRSSOR
12/104283	16-Apr-08	SEMICONDUCTOR PACKAGE AND METHOD OF MAKING SAME
11/650253	04-Jan-07	INTEGRATED ASSIST FEATURES FOR EPITAXIAL GROWTH
11/613326	20-Dec-06	INTEGRATED CIRCUIT HAVING TENSILE AND COMPRESSIVE REGIONS
11/926323	29-Oct-07	SPLIT GATE DEVICE AND METHOD FOR FORMING
11/678327	23-Feb-07	FORMING SEMICONDUCTOR FINS USING A SACRIFICIAL FIN
11/677808	22-Feb-07	MEMORY HAVING A DUMMY BITLINE FOR TIMING CONTROL
11/669794	31-Jan-07	ELECTRONIC DEVICE INCLUDING INSULATING LAYERS HAVING DIFFERENT STRAINS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/680430	28-Feb-07	APPARATUS AND METHOD FOR REDUCING NOISE IN MIXED-SIGNAL CIRCUITS AND DIGITAL CIRCUITS
12/670502	01-Aug-07	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINABLE THEREWITH
11/593896	07-Nov-06	THREE DIMENSIONAL INTEGRATED PASSIVE DEVICE AND METHOD OF FABRICATION
11/807777	29-May-07	A METHOD FOR FORMING INTERCONNECTS FOR 3-D APPLICATIONS
11/650188	04-Jan-07	LDMOS DEVICE AND METHOD
11/694264	30-Mar-07	[A] METHOD OF MAKING A SEMICONDUCTOR STRUCTURE UTILIZING SPACER REMOVAL AND SEMICONDUCTOR STRUCTURE
12/558284	11-Sep-09	ONE TRANSISTOR DRAM CELL STRUCTURE AND METHOD FOR FORMING
11/685297	13-Mar-07	ELECTRONIC DEVICE INCLUDING CHANNEL REGIONS LYING AT DIFFERENT ELEVATIONS AND PROCESSES OF FORMING THE SAME
11/671035	05-Feb-07	POWER TRANSISTOR FEATURING A DOUBLE-SIDED FEED DESIGN AND METHOD OF MAKING THE SAME
11/958605	18-Dec-07	METHOD OF AREA COMPACTION FOR INTEGRATED CIRCUIT LAYOUT DESIGN
11/561234	17-Nov-06	METHOD OF PACKAGING A DEVICE HAVING A MULTI-CONTACT ELASTOMER CONNECTOR CONTACT AREA AND DEVICE THEREOF
12/557726	11-Sep-09	SPACE AND PROCESS EFFICIENT MRAM
11/701651	02-Feb-07	DYNAMIC PAD SIZE TO REDUCE SOLDER FATIGUE
12/182398	30-Jul-08	DUAL CURRENT PATH LDMOSFET WITH GRADED PBL FOR ULTRA HIGH VOLTAGE SMART POWER APPLICATIONS

131


Appl No.	Appl Date	Title
11/807745	29-May-07	A METHOD TO FORM A VIA
11/671809	06-Feb-07	SPLIT-GATE THIN FILM STORAGE NVM CELL WITH REDUCED LOAD-UP/TRAP-UP EFFECTS
11/679573	27-Feb-07	RADIO FREQUENCY CIRCUIT WITH INTEGRATED ON-CHIP RADIO FREQUENCY INDUCTIVE SIGNAL COUPLER
12/053622	24-Mar-08	LEAD FRAME WITH SOLDER FLOW CONTROL
11/800204	04-May-07	METHOD TO IMPROVE SOURCE/DRAIN PARASITICS IN VERTICAL DEVICES
11/671567	06-Feb-07	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A REMOVABLE SIDEWALL SPACER
11/741192	27-Apr-07	LEVEL DETECT CIRCUIT
11/650252	04-Jan-07	DUAL INTERLAYER DIELECTRIC STRESSOR INTEGRATION WITH A SACRIFICIAL UNDERLAYER FILM STACK
11/674886	14-Feb-07	BIPOLAR SCHOTTKY DIODE AND METHOD
12/129686	30-May-08	COATED LEAD FRAME
11/831651	31-Jul-07	REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE
11/740331	26-Apr-07	NON-VOLATILE MEMORY HAVING A STATIC VERIFY-READ OUTPUT DATA PATH
11/731028	31-Mar-07	ON-CHIP DECOUPLING CAPACITANCE AND POWER/GROUND NETWORK WIRE CO-OPTIMIZATION TO REDUCE DYNAMIC NOISE
11/680177	28-Feb-07	PACKAGED INTEGRATED CIRCUIT
11/679512	27-Feb-07	CONDUCTIVE VIA FORMATION UTILIZING ELECTROPLATING
12/125856	22-May-08	METHOD FOR REDUCING PLASMA DISCHARGE DAMAGE DURING PROCESSING
11/966077	28-Dec-07	3-D SEMICONDUCTOR DIE STRUCTURE WITH CONTAINING FEATURE AND METHOD
11/689657	22-Mar-07	SEMICONDUCTOR DEVICE WITH CAPACITOR AND/OR INDUCTOR AND METHOD OF MAKING
11/746118	09-May-07	ELECTRONIC DEVICE AND METHOD FOR OPERATING A MEMORY CIRCUIT
12/183767	31-Jul-08	INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT
11/686439	15-Mar-07	Methods for forming CASCODE CURRENT MIRROR [AND METHOD]
11/697106	05-Apr-07	[A] FIRST INTER-LAYER DIELECTRIC STACK FOR NON-VOLATILE MEMORY
11/831394	31-Jul-07	MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD
12/403400	13-Mar-09	SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE AND METHOD OF PACKAGING SEMICONDUCTOR INTEGRATED CIRCUIT
11/733063	09-Apr-07	INTEGRATED PASSIVE DEVICE WITH A HIGH RESISTIVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
11/685027	12-Mar-07	SEMICONDUCTOR DEVICE HAVING A METAL CARBIDE GATE WITH AN ELCTROPOSITIVE ELEMENT AND A METHOD OF MAKING THE SAME
11/683846	08-Mar-07	TRENCH FORMATION IN A SEMICONDUCTOR MATERIAL
11/764911	19-Jun-07	CONFORMAL EMI SHIELDING WITH ENHANCED RELIABILITY
11/680219	28-Feb-07	FORMING A SEMICONDUCTOR DEVICE HAVING EPITAXIALLY GROWN SOURCE AND DRAIN REGIONS
11/770295	28-Jun-07	Process of forming an ELECTRONIC DEVICE INCLUDING A PLURALITY OF SINGULATED DIE [AND METHODS OF FORMING THE SAME]
12/074148	29-Feb-08	METROLOGY OF BILAYER PHOTORESIST PROCESSES
11/831400	31-Jul-07	ISOLATION TRENCH PROCESSING FOR STRAIN CONTROL
11/694273	30-Mar-07	STRUCTURE AND METHOD FOR STRAINED TRANSISTOR DIRECTLY ON INSULATOR
11/780900	7/20/2007 [7/25/2007]	ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING THE SAME
11/738683	23-Apr-07	SEPARATE LAYER FORMATION IN A SEMICONDUCTOR DEVICE
11/767413	22-Jun-07	METHOD OF MAKING CONTACT POSTS FOR A MICROELECTROMECHANICAL DEVICE
11/734328	12-Apr-07	SOI SEMICONDUCTOR DEVICE WITH BODY CONTACT AND METHOD THEREOF
12/669527	27-Jul-07	METHOD OF FORMING OPENINGS IN A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
11/831801	31-Jul-07	PLANAR DOUBLE GATE TRANSISTOR STORAGE CELL
11/737496	19-Apr-07	METHOD OF MAKING A SEMICONDUCTOR DEVICE USING A STRESSOR
11/864274	28-Sep-07	MOSFET STRUCTURE AND METHOD OF MANUFACTURE
11/782319	24-Jul-07	PROCESS FOR MAKING A SEMICONDUCTOR DEVICE USING PARTIAL ETCHING
11/744638	04-May-07	METHOD OF FORMING A TRANSISTOR HAVING MULTIPLE TYPES OF SCHOTTKY JUNCTIONS
12/022942	30-Jan-08	III-V MOSFET FABRICATION AND DEVICE

132


Appl No.	Appl Date	Title
11/833360	03-Aug-07	MULTI-MODE TRANSCEIVER HAVING TUNABLE HARMONIC TERMINATION CIRCUIT AND METHOD THEREFOR
11/828902	26-Jul-07	MICROMECHANICAL DEVICE WITH PIEZOELECTRIC AND ELECTROSTATIC ACTUATION AND METHOD THEREFOR
11/744581	04-May-07	METHOD OF FORMING A SEMICONDUCTOR DEVICE WITH MULTIPLE TENSILE STRESSOR LAYERS
11/779318	18-Jul-07	TRANSISTOR WITH DIFFERENTLY DOPED STRAINED CURRENT ELECTRODE REGION
12/039361	28-Feb-08	METHOD OF FORMING A GATE DIELECTRIC
11/678322	23-Feb-07	SEMICONDUCTOR FIN INTEGRATION USING A SACRIFICIAL FIN
11/756095	31-May-07	METHOD OF MAKING A SEMICONDUCTOR DEVICE WITH EMBEDDED STRESSOR
12/037333	26-Feb-08	DEVICE UNDER TEST DE-EMBEDDING
12/040394	29-Feb-08	FABRICATION OF A SEMICONDUCTOR DEVICE WITH STRESSOR
11/756231	31-May-07	METHOD OF FORMING A SEMICONDUCTOR DEVICE FEATURING A GATE STRESSOR AND SEMICONDUCTOR DEVICE
12/054015	24-Mar-08	SETUP AND HOLD TIME CHARACTERIZATION DEVICE AND METHOD
11/830331	30-Jul-07	METHOD OF PROCESSING A HIGH-K DIELECTRIC FOR CET SCALING
12/122178	16-May-08	MODULATION OF A TANTALUM-BASED ELECTRODE WORKFUNCTION
11/835547	08-Aug-07	METHOD FOR MAKING A TRANSISTOR WITH A STRESSOR
11/931565	31-Oct-07	SEMICONDUCTOR DEVICES WITH DIFFERENT DIELECTRIC THICKNESSES
11/864246	28-Sep-07	PHASE CHANGE MEMORY STRUCTURES
11/864257	28-Sep-07	PHASE CHANGE MEMORY STRUCTURES
12/668097	16-May-08	HETERO-STRUCTURE FIELD EFFECT TRANSISTOR, INTEGRATED CIRCUIT INCLUDING A HETERO-STRUCTURE FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING A HETERO-STRUCTURE FIELD EFFECT TRANSISTOR
11/855557	14-Sep-07	METHOD OF REMOVING DEFECTS FROM A DIELECTRIC MATERIAL IN A SEMICONDUCTOR
11/756197	31-May-07	MULTIPLE MILLISECOND ANNEALS FOR SEMICONDUCTOR DEVICE FABRICATION
11/759518	07-Jun-07	SPLIT GATE MEMORY CELL USING SIDEWALL SPACERS
12/030213	13-Feb-08	INTEGRATED CIRCUIT DIE, INTEGRATED CIRCUIT PACKAGE, AND PACKAGING METHOD
12/134273	06-Jun-08	TWO TRANSISTOR TIE CIRCUIT WITH BODY BIASING
12/060105	31-Mar-08	DUAL GATE LATERAL DIFFUSED MOS TRANSISTOR
11/851719	07-Sep-07	DUAL GATE OXIDE DEVICE INTEGRATION
11/829156	27-Jul-07	METHOD FOR FORMING A TRANSISTOR HAVING GATE DIELECTRIC PROTECTION AND STRUCTURE
11/860125	24-Sep-07	WARPAGE CONTROL USING A PACKAGE CARRIER ASSEMBLY
12/059012	31-Mar-08	METHOD AND APPARATUS FOR MINI MODULE EMI SHIELDING EVALUATION
11/835680	08-Aug-07	STRESS RELIEF OF A SEMICONDUCTOR DEVICE
11/852396	10-Sep-07	ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
11/926348	29-Oct-07	METHOD FOR INTEGRATING NVM CIRCUITRY WITH LOGIC CIRCUITRY
12/037280	26-Feb-08	SPACE EFFICIENT INTEGRATED CIRCUIT WITH PASSIVE DEVICES
11/969604	04-Jan-08	REMOVABLE LAYER MANUFACTURING METHOD
11/848521	31-Aug-07	MEMS CAPACITOR WITH CONDUCTIVELY TETHERED MOVEABLE CAPACITOR PLATE
11/864266	28-Sep-07	SELF-▇▇▇▇▇▇ PEIZOELECTRIC MEMS DEVICE
11/781610	23-Jul-07	SOURCE/DRAIN STRESSORS FORMED USING IN-SITU EPITAXIAL GROWTH
11/870259	10-Oct-07	VARIABLE LOAD, VARIABLE OUTPUT CHARGE-BASED VOLTAGE MULTIPLIERS
11/971591	09-Jan-08	MIGFET CIRCUIT WITH ESD PROTECTION
12/181766	29-Jul-08	SELF-ALIGNED IN-LAID SPLIT GATE MEMORY AND METHOD OF MAKING
12/103246	15-Apr-08	SPLIT GATE NON-VOLATILE MEMORY CELL WITH IMPROVED ENDURANCE AND METHOD THEREFOR
12/059123	31-Mar-08	SEMICONDUCTOR THROUGH SILICON VIAS OF VARIABLE SIZE AND METHOD OF FORMATION
12/040407	29-Feb-08	METHOD OF PROGRAMMING A MEMORY HAVING ELECTRICALLY PROGRAMMABLE FUSES
12/182349	30-Jul-08	PASSIVATED III-V FIELD EFFECT STRUCTURE AND METHOD
11/835548	08-Aug-07	FINFET MEMORY CELL HAVING A FLOATING GATE AND METHOD THEREFOR
12/015247	16-Jan-08	NON-VOLATILE MEMORY WITH REDUCED CHARGE FLUENCE
12/013812	14-Jan-08	MICROELECTRONIC REFRIGERATION SYSTEM AND METHOD
11/932070	31-Oct-07	HIGH VOLTAGE TMOS SEMICONDUCTOR DEVICE WITH LOW GATE CHARGE STRUCTURE AND METHOD OF MAKING

133


Appl No.	Appl Date	Title
12/055538	26-Mar-08	[A] BUILT-IN SELF CALIBRATION (BISC) TECHNIQUE FOR REGULATION CIRCUITS USED IN NON-VOLATILE MEMORY
11/957486	17-Dec-07	METHOD OF FORMING STACKED DIE PACKAGE
11/941564	16-Nov-07	SEMICONDUCTOR PROCESSING SYSTEM AND METHOD OF PROCESSING A SEMICONDUCTOR WAFER
11/846874	29-Aug-07	INTERCONNECT IN A MULTI-ELEMENT PACKAGE
11/771721	29-Jun-07	METHOD FOR FORMING A DUAL METAL GATE STRUCTURE
11/927962	30-Oct-07	SEMICONDUCTOR HAVING A CORNER COMPENSATION FEATURE AND METHOD
12/130197	30-May-08	MEMORY HAVING P-TYPE SPLIT GATE MEMORY CELLS AND METHOD OF OPERATION
11/865991	02-Oct-07	PROGRAMMABLE ROM USING TWO BONDED STRATA
11/946056	28-Nov-07	SOLDER BALL ATTACHMENT RING AND METHOD OF USE
12/016739	18-Jan-08	PHASE CHANGE MEMORY CELL WITH FINFET AND METHOD THEREFOR
11/931376	31-Oct-07	METHOD OF FORMING A SPLIT GATE NON-VOLATILE MEMORY CELL
11/965519	27-Dec-07	ELECTRONIC ASSEMBLY MANUFACTURING METHOD
11/969600	04-Jan-08	Methods for forming MOS capacitors [LINEARITY CAPACITOR STRUCTURE AND METHOD]
12/016733	18-Jan-08	PHASE CHANGE MEMORY CELL WITH HEATER AND METHOD THEREFOR
12/105456	18-Apr-08	OPTICAL COMMUNICATION INTEGRATION
12/040429	29-Feb-08	PULSE CIRCUIT USING A TRANSMISSION LINE
11/948005	30-Nov-07	HIGH-DYNAMIC RANGE LOW RIPPLE VOLTAGE MULTIPLIER
11/950820	05-Dec-07	LOW LEAKAGE SCHOTTKY CONTACT DEVICES AND METHOD
12/112489	30-Apr-08	METHOD FOR CONTROLLING WARPAGE IN REDISTRIBUTED CHI-P PACKAGING PANELS
12/054105	24-Mar-08	INTEGRATED PASSIVE DEVICE AND METHOD WITH LOW COST SUBSTRATE
12/130579	30-May-08	HIGH FREQUENCY INTERCONNECT PAD STRUCTURE
12/025315	04-Feb-08	BALUN TRANSFORMER WITH IMPROVED HARMONIC SUPPRESSION
12/048683	14-Mar-08	READ REFERENCE TECHNIQUE WITH CURRENT DEGRADATION PROTECTION
12/112058	30-Apr-08	METHOD OF MAKING A SEMICONDUCTOR DEVICE USING NEGATIVE PHOTORESIST
11/948209	30-Nov-07	METHOD OF FORMING A VIA
12/184377	01-Aug-08	PACKAGING AN INTEGRATED CIRCUIT DIE WITH BACKSIDE METALLIZATION
12/040737	29-Feb-08	MICROELECTROMECHANICAL SYSTEMS COMPONENT AND METHOD OF MAKING SAME
12/038146	27-Feb-08	RESISTOR TRIGGERED ELECTROSTATIC DISCHARGE PROTECTION
12/129846	30-May-08	ENCLOSED VOID CAVITY FOR LOW DIELECTRIC CONSTANT INSULATOR
11/969368	04-Jan-08	MICROPAD FORMATION FOR A SEMICONDUCTOR
11/966126	28-Dec-07	FORMING A 3-D SEMICONDUCTOR DIE STRUCTURE WITH AN INTERMETALLIC FORMATION
12/022195	30-Jan-08	METHOD FOR FORMING A THROUGH SILICON VIA LAYOUT
12/039371	28-Feb-08	METHOD OF MAKING A VERTICAL PHASE CHANGE MEMORY (PCM) AND A PCM DEVICE
12/147889	27-Jun-08	METHOD FOR IMPLANT IMAGING WITH SPIN-ON HARD MASKS
12/023181	31-Jan-08	ELECTROSTATIC DISCHARGE PROTECTION
12/039913	29-Feb-08	PACKAGING AN INTEGRATED CIRCUIT DIE USING COMPRESSION MOLDING
12/169964	09-Jul-08	INTEGRATED CONFORMAL SHIELDING METHOD AND PROCESS USING REDISTRIBUTED CHIP PACKAGING
12/109736	25-Apr-08	SINGLE POLY NVM DEVICES AND ARRAYS
12/129840	30-May-08	RESURF SEMICONDUCTOR DEVICE CHARGE BALANCING
12/022193	30-Jan-08	STATE RETAINING POWER GATED LATCH AND METHOD THEREFOR
12/147230	26-Jun-08	DIELECTRIC LEDGE FOR HIGH FREQUENCY DEVICES
12/147236	26-Jun-08	SILICIDED BASE STRUCTURE FOR HIGH FREQUENCY TRANSISTORS
12/126069	23-May-08	CIRCUIT FOR AND AN ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY CELL AND A PROCESS OF FORMING THE ELECTRONIC DEVICE
12/112209	30-Apr-08	MULTI-VOLTAGE ELECTROSTATIC DISCHARGE PROTECTION
12/109798	25-Apr-08	HIGH EFFICIENCY AMPLIFIER WITH REDUCED PARASITIC CAPACITANCE
12/130186	30-May-08	METHOD FOR ELECTRICALLY TRIMMING AN NVM REFERENCE CELL
12/039909	29-Feb-08	CONDUCTIVE BRIDGE RANDOM ACCESS MEMORY DEVICE AND METHOD OF MAKING THE SAME
12/043372	06-Mar-08	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A STRESSED ELECTRODE AND SILICIDE REGIONS
12/059286	31-Mar-08	METHOD OF FORMING A SEMICONDUCTOR DEVICE USING STRESS MEMORIZATION

134


Appl No.	Appl Date	Title
12/182421	30-Jul-08	SEMICONDUCTOR DEVICES WITH EXTENDED ACTIVE REGIONS
12/142115	19-Jun-08	ADJUSTABLE BIPOLAR TRANSISTORS FORMED USING A CMOS PROCESS
12/144332	23-Jun-08	MEMORY WITH HIGH SPEED SENSING
12/112664	30-Apr-08	METHOD OF FORMING A SPLIT GATE MEMORY DEVICE AND APPARATUS
12/142028	19-Jun-08	SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PREVENTING STARVATIONS OF TASKS IN A MULTIPLE PROCESSING ENTITY SYSTEM
12/178800	24-Jul-08	BURIED ASYMMETRIC JUNCTION ESD PROTECTION DEVICE
12/139106	13-Jun-08	METHOD AND CIRCUIT FOR EFUSE PROTECTION
12/183755	31-Jul-08	BALUN SIGNAL TRANSFORMER AND METHOD OF FORMING
12/183739	31-Jul-08	CLOCKED SINGLE POWER SUPPLY LEVEL SHIFTER
11/435942	17-May-06	LOW VOLTAGE MEMORY DEVICE AND METHOD THEREOF
12/282489	15-Mar-06	TASK SCHEDULING METHOD AND APPARATUS
11/278725	05-Apr-06	DATA PROCESSING SYSTEM HAVING BIT EXACT INSTRUCTIONS AND METHODS THEREFOR
12/514005	08-Nov-06	METHOD FOR TESTING NOISE IMMUNITY OF AN INTEGRATED CIRCUIT AND A DEVICE HAVING NOISE IMMUNITY TESTING CAPABILITIES
12/446409	20-Oct-06	DEVICE HAVING REDUNDANT CORE AND A METHOD FOR PROVIDING CORE REDUNDANCY
11/530051		TRACE BUFFER WITH A PROCESSOR
12/444063	03-Oct-06	DEVICE AND SYSTEM FOR REDUCING NOISE INDUCED ERRORS
12/515634	20-Nov-06	SYSTEM, APPARATUS AND METHOD FOR TRANSLATING DATA
12/302225	29-May-06	METHOD FOR TRANSMITTING DATA FROM MULTIPLE CLOCK DOMAINS AND A DEVICE HAVING DATA TRANSMISSION CAPABILITIES
11/353162	14-Feb-06	METHOD AND APPARATUS FOR NETWORK SECURITY
12/295467	31-Mar-06	DISCHARGE PROTECTION APPARATUS AND METHOD OF PROTECTING AN ELECTRONIC DEVICE
12/302227	29-May-06	METHOD FOR TRANSMITTING DATA AND A DEVICE HAVING DATA TRANSMISSION CAPABILITIES
12/521838	02-Jan-07	DEVICE AND METHOD FOR TESTING A DIRECT MEMORY ACCESS CONTROLLER
12/377351	18-Aug-06	METHOD FOR PERFORMING PLURALITY OF BIT OPERATIONS AND A DEVICE HAVING PLURALITY OF BIT OPERATIONS CAPABILITIES
12/304187	13-Jun-06	METHOD FOR PROCESSING INFORMATION FRAGMENTS AND A DEVICE HAVING INFORMATION FRAGMENT PROCESSING CAPABILITIES
12/301554	29-May-06	DEVICE AND METHOD FOR TESTING INTEGRATED CIRCUITS
12/529749	07-Mar-07	DEVICE AND METHOD FOR SCHEDULING TRANSACTIONS OVER A DEEP PIPELINED COMPONENT
11/684529	09-Mar-07	PIPELINED TAG AND INFORMATION ARRAY ACCESS WITH SPECULATIVE RETRIEVAL OF TAG THAT CORRESPONDS TO INFORMATION ACCESS
12/514007	08-Nov-06	DEVICE AND METHOD FOR MANAGING ACCESS REQUESTS
12/446413	20-Oct-06	SYSTEM AND METHOD FOR FETCHING AN INFORMATION UNIT
12/304193	13-Jun-06	A METHOD AND DEVICE FOR PROVIDING A SECURITY BREACH INDICATIVE AUDIO ALERT
12/447395	27-Oct-06	POWER SUPPLY MONITORING METHOD AND SYSTEM
11/627445	26-Jan-07	MEMORY SYSTEM WITH REDUNDANT RAM MEMORY CELLS HAVING A DIFFERENT DESIGNED CELL CIRCUIT TOPOLOGY than cells of non redundant ram array
11/619862	04-Jan-07	EFFICIENT FIXED-POINT REAL-TIME THRESHOLDING FOR SIGNAL PROCESSING
11/460090	26-Jul-06	DATA PROCESSOR WITH RECONFIGURABLE REGISTERS
12/376069	03-Aug-06	METHOD FOR MONOTONICALLY COUNTING AND A DEVICE HAVING MONOTONIC COUNTING CAPABILITIES
11/536342	28-Sep-06	CONTROLLED RELIABILITY IN AN INTEGRATED CIRCUIT
11/464124	11-Aug-06	MEMORY HAVING SENSE TIME OF VARIABLE DURATION
12/375795	02-Aug-06	[A] METHOD FOR RECEIVING AND PROCESSING FRAMES AND A DEVICE HAVING FRAME RECEIVING AND PROCESSING CAPABILITIES
12/444061	05-Oct-06	ERROR CORRECTION APPARATUS, METHOD OF CORRECTING AN ERROR AND METHOD OF GENERATING ERROR LOCATION DATA
12/374177	18-Jul-06	SCHEDULING WIRELESS COMMUNICATION
12/516742	30-Nov-06	DEVICE AND METHOD FOR FETCHING INSTRUCTIONS
11/536173	28-Sep-06	DYNAMIC BRANCH PREDICTION [PREDICTOR] using a wake value to enable low power mode for a predicted number of instruction fetches between a branch and a subsequent branch
12/107398	22-Apr-08	TIME RESOLVED RADIATION ASSISTED DEVICE ALTERATION

135


Appl No.	Appl Date	Title
11/467988	29-Aug-06	METHOD AND APPARATUS FOR LOADING OR STORING MULTIPLE REGISTERS IN A DATA PROCESSING SYSTEM
11/952210	07-Dec-07	METHOD FOR TESTING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE TESTING SYSTEM
12/110824	28-Apr-08	RADIATION INDUCED FAULT ANALYSIS
11/550835	19-Oct-06	SYSTEM HAVING A CARRY LOOK-AHEAD (CLA) ADDER
11/620485	05-Jan-07	Intra chassis packet arbitration scheme [COMMUNICATION DEVICE AND METHODS THEREOF]
11/619298	03-Jan-07	HARDWARE-BASED MEMORY INITIALIZATION WITH SOFTWARE SUPPORT
11/711327	27-Feb-07	ESTIMATING DELAY OR AN ECHO PATH IN A COMMUNICATION SYSTEM
11/741251	27-Apr-07	CLOCK CONTROL MODULE SIMULATOR AND METHOD THEREOF
11/678258	23-Feb-07	SHARED LATCH FOR MEMORY TEST/REPAIR AND FUNCTIONAL OPERATIONS
11/619070	02-Jan-07	SYSTEM HAVING A MEMORY VOLTAGE CONTROLLER AND METHOD THEREFOR
11/619301	03-Jan-07	SELECTIVE GUARDED MEMORY ACCESS ON A PER-INSTRUCTION BASIS
11/682058	05-Mar-07	PERFORMANCE MONITORING DEVICE AND METHOD THEREOF
11/668780	30-Jan-07	INSTRUCTION-BASED TIMER CONTROL DURING DEBUG
11/765891	20-Jun-07	EXCEPTION-BASED TIMER CONTROL
12/516319	30-Nov-06	DEVICE AND METHOD FOR TESTING A CIRCUIT
11/679590	27-Feb-07	MULTI-MODE DATA PROCESSING DEVICE AND METHODS THEREOF
11/962331	21-Dec-07	SYSTEM AND METHOD FOR PROCESSING POTENTIALLY SELF-INCONSISTENT MEMORY TRANSACTIONS
11/619294	03-Jan-07	PROGRESSIVE MEMORY INITIALIZATION WITH WAITPOINTS
11/772655	02-Jul-07	ASYMMETRIC CRYPTOGRAPHIC DEVICE WITH LOCAL PRIVATE KEY GENERATION AND METHOD THEREFOR
12/599625	10-May-07	POWER LEAD-ON-CHIP BALL GRID ARRAY PACKAGE
11/832797	02-Aug-07	CACHE LOCKING DEVICE AND METHODS THEREOF
11/776267	11-Jul-07	SPECIFICATION OF COHERENCE DOMAIN DURING ADDRESS TRANSLATION
11/669804	31-Jan-07	METHOD AND SYSTEM FOR DATA TRANSFER ACROSS DIFFERENT ADDRESS SPACES
11/682867	06-Mar-07	INTERPROCESSOR MESSAGE TRANSMISSION VIA COHERENCY-BASED INTERCONNECT
12/053005	21-Mar-08	▇▇▇▇▇▇▇ TRIGGER HAVING VARIABLE HYSTERESIS AND METHOD THEREFOR
11/668267	29-Jan-07	MEMORY SYSTEM HAVING GLOBAL BUFFERED CONTROL FOR MEMORY MODULES
12/532769	26-Mar-07	[IMPROVEMENTS IN OR RELATING TO] PACKET BASED DATA CELL DELINEATION
11/763107	14-Jun-07	OPTIMIZATION OF STORAGE DEVICE ACCESSES IN RAID SYSTEMS
11/733978	11-Apr-07	TECHNIQUES FOR TRACING PROCESSES IN A MULTI-THREADED PROCESSOR
11/851778	07-Sep-07	SECURING PROPRIETARY FUNCTIONS FROM SCAN ACCESS
11/781097	20-Jul-07	SYSTEMS AND METHODS FOR EFFICIENT GENERATION OF HASH VALUES OF VARYING BIT WIDTHS
11/683607	08-Mar-07	SYSTEM AND METHOD FOR TESTING AND PROVIDING AN INTEGRATED CIRCUIT HAVING MULTIPLE MODULES OR SUBMODULES
12/105423	18-Apr-08	FREE-SPACE OPTICAL COMMUNICATION SYSTEM
12/530575	13-Mar-07	DEVICE AND METHOD FOR GENERATING CACHE USER INITIATED PRE-FETCH REQUESTS
11/871626	12-Oct-07	FORWARD PROGRESS MECHANISM FOR A MULTITHREADED PROCESSOR
11/746998	10-May-07	THREAD DE-EMPHASIS INSTRUCTION FOR MULTITHREADED PROCESSOR
11/849375	04-Sep-07	[A] CACHE MEMORY AND A METHOD FOR SERVICING ACCESS REQUESTS
11/897872	31-Aug-07	ADAPTIVE FILTER FOR USE IN ECHO REDUCTION
11/967430	31-Dec-07	COMPLETION CONTINUE ON THREAD SWITCH MECHANISM FOR A MICROPROCESSOR
11/942813	20-Nov-07	POLLING USING RESERVATION MECHANISM
11/951558	06-Dec-07	METHOD AND APPARATUS FOR MAKING A SEMICONDUCTOR DEVICE USING HARDWARE DESCRIPTION HAVING MERGED FUNCTIONAL AND TEST LOGIC BLOCKS
12/105870	18-Apr-08	TECHNIQUES FOR COMFORT NOISE GENERATION IN A COMMUNICATION SYSTEM
11/668787	30-Jan-07	SELECTIVE TIMER CONTROL DURING SINGLE-STEP INSTRUCTION EXECUTION
12/594372	06-Apr-07	METHOD, DATA STRUCTURE AND COMPUTER SYSTEM FOR PACKING A WORLDWIDE INTEROPERABILITY FOR MICROWAVE ACCESS (WiMAX) FRAME
12/040210	29-Feb-08	METRIC FOR SELECTIVE BRANCH TARGET BUFFER (BTB) ALLOCATION
12/180166	25-Jul-08	PHASE-LOCKED LOOP SYSTEM WITH A PHASE ERROR SPREADING CIRCUIT

136


Appl No.	Appl Date	Title
12/181363	29-Jul-08	BRANCH TARGET BUFFER ALLOCATION
11/748353	14-May-07	METHOD AND APPARATUS FOR CACHE TRANSACTIONS IN A DATA PROCESSING SYSTEM
11/750739	18-May-07	DEBUGGING A PROCESSOR THROUGH A RESET EVENT
12/017988	22-Jan-08	SHARED RESOURCE BASED THREAD SCHEDULING WITH AFFINITY AND/OR SELECTABLE CRITERIA
12/025374	04-Feb-08	ENCRYPTION APPARATUS WITH DIVERSE KEY RETENTION SCHEMES
12/599137	14-May-07	GENERATING A FRAME OF AUDIO DATA
11/777664	13-Jul-07	POPULATION COUNT APPROXIMATION CIRCUIT AND METHOD THEREOF
12/058874	31-Mar-08	METHOD AND APPARATUS TO TRACE AND CORRELATE DATA TRACE AND INSTRUCTION TRACE FOR OUT-OF-ORDER PROCESSORS
11/848826	31-Aug-07	DATA ACQUISITION MESSAGING USING SPECIAL PURPOSE REGISTERS
11/871659	12-Oct-07	SIMD PERMUTATIONS WITH EXTENDED RANGE IN A DATA PROCESSOR
11/854630	13-Sep-07	SIMD DOT PRODUCT OPERATIONS WITH OVERLAPPED OPERANDS
12/057543	28-Mar-08	BRANCH TARGET BUFFER ADDRESSING IN A DATA PROCESSOR
11/929180	30-Oct-07	PSEUDO LEAST RECENTLY USED (PLRU) CACHE REPLACEMENT
11/875997	22-Oct-07	INTEGRATED CIRCUIT MEMORY HAVING DYNAMICALLY ADJUSTABLE READ MARGIN AND METHOD THEREFOR
12/163633	27-Jun-08	SYSTEM AND METHOD FOR EVALUATING A DYNAMIC POWER CONSUMPTION OF A BLOCK
11/864292	28-Sep-07	SYSTEM AND METHOD FOR MONITORING DEBUG EVENTS
11/748350	14-May-07	METHOD AND APPARATUS FOR CACHE TRANSACTIONS IN A DATA PROCESSING SYSTEM
12/014594	15-Jan-08	CACHE USING PSEUDO LEAST RECENTLY USED (PLRU) CACHE REPLACEMENT WITH LOCKING
12/034888	21-Feb-08	ADJUSTABLE PIPELINE IN A MEMORY CIRCUIT
11/932486	31-Oct-07	TECHNIQUES FOR FREQUENCY-DOMAIN JOINT DETECTION IN WIRELESS COMMUNICATIONS SYSTEMS
12/053502	21-Mar-08	COMPUTING DEVICE WITH ENTRY AUTHENTICATION INTO TRUSTED EXECUTION ENVIRONMENT AND METHOD THEREFOR
11/777650	13-Jul-07	CIRCUIT AND METHOD FOR CORRELATED INPUTS TO A POPULATION COUNT CIRCUIT
12/163638	27-Jun-08	DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING
12/103250	15-Apr-08	MULTI-CORE PROCESSING SYSTEM
12/026325	05-Feb-08	HIGH BANDWIDTH CACHE-TO-PROCESSING UNIT COMMUNICATION IN A MULTIPLE PROCESSOR/CACHE SYSTEM
11/969116	03-Jan-08	BRANCH TARGET BUFFER ADDRESSING IN A DATA PROCESSOR
11/871847	12-Oct-07	DEBUG INSTRUCTIONS FOR USE IN A DATA PROCESSING SYSTEM
11/969112	03-Jan-08	SNOOP REQUEST MANAGEMENT IN A DATA PROCESSING SYSTEM
12/016664	18-Jan-08	METHOD AND APPARATUS FOR HANDLING SHARED HARDWARE AND SOFTWARE DEBUG RESOURCE EVENTS IN A DATA PROCESSING SYSTEM
12/112580	30-Apr-08	SELECTIVELY PERFORMING A SINGLE CYCLE WRITE OPERATION WITH ECC IN A DATA PROCESSING SYSTEM
11/871668	12-Oct-07	METHODS FOR PERFORMING EXTENDED TABLE LOOKUPS
12/147313	26-Jun-08	SEMICONDUCTOR PACKAGE WITH REDUCED INDUCTIVE COUPLING BETWEEN ADJACENT BONDWIRE ARRAYS
12/109964	25-Apr-08	METHOD AND APPARATUS FOR ELECTRICAL TESTING
12/147850	27-Jun-08	SYSTEM AND METHOD FOR LOAD BALANCING A VIDEO SIGNAL IN A MULTI-CORE PROCESSOR
12/053761	24-Mar-08	SELECTIVE INTERCONNECT TRANSACTION CONTROL FOR CACHE COHERENCY MAINTENANCE
12/099485	08-Apr-08	SINGLE-SUPPLY, SINGLE-ENDED LEVEL CONVERSION CIRCUIT FOR AN INTEGRATED CIRCUIT HAVING MULTIPLE POWER SUPPLY DOMAINS
12/130012	30-May-08	SELECTIVE MISR DATA ACCUMULATION DURING EXCEPTION PROCESSING
12/164622	30-Jun-08	AN INTEGRATED CIRCUIT AND A METHOD FOR MEASURING A QUIESCENT CURRENT OF A MODULE
12/112583	30-Apr-08	CONFIGURABLE PIPELINE BASED ON ERROR DETECTION MODE IN A DATA PROCESSING SYSTEM
12/139208	13-Jun-08	CIRCULAR BUFFER SUPPORT IN A SINGLE INSTRUCTION MULTIPLE DATA (SIMD) DATA PROCESSOR
12/130570	30-May-08	UTILIZATION OF A STORE BUFFER FOR ERROR RECOVERY ON A STORE ALLOCATION CACHE MISS
12/135638	09-Jun-08	SYSTEM AND METHOD FOR PARALLEL VIDEO PROCESSING IN MULTICORE DEVICES
12/179828	25-Jul-08	INTEGRATED CIRCUIT AND A METHOD FOR RECOVERING FROM A LOW-POWER PERIOD
12/164755	30-Jun-08	MEMORY OPERATION TESTING

137


Appl No.	Appl Date	Title
12/112502	30-Apr-08	CACHE COHERENCY PROTOCOL IN A DATA PROCESSING SYSTEM
12/112796	30-Apr-08	SNOOP REQUEST MANAGEMENT IN A DATA PROCESSING SYSTEM
12/164444	30-Jun-08	METHOD FOR IMPLEMENTING A BIT-REVERSED INCREMENT IN A DATA PROCESSING SYSTEM
12/183563	31-Jul-08	DOUBLE-BALANCED SINUSOIDAL MIXING PHASE INTERPOLATOR CIRCUIT AND METHOD
12/183550	31-Jul-08	SQUARE TO PSEUDO-SINUSOIDAL CLOCK CONVERSION CIRCUIT AND METHOD
12/040204	29-Feb-08	SELECTIVE POSTPONEMENT OF BRANCH TARGET BUFFER (BTB) ALLOCATION
12/179792	25-Jul-08	A SYSTEM AND METHOD FOR PROVIDING A BLENDED PICTURE
12/181701	29-Jul-08	SYSTEM AND METHOD FOR FETCHING INFORMATION TO A CACHE MODULE USING A WRITE BACK ALLOCATE ALGORITHM
12/179791	25-Jul-08	SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR EXECUTING A HIGH LEVEL PROGRAMMING LANGUAGE CONDITIONAL STATEMENT
12/179632	25-Jul-08	DEBUG MESSAGE GENERATION USING A SELECTED ADDRESS TYPE
12/179629	25-Jul-08	DYNAMIC ADDRESS-TYPE SELECTION CONTROL IN A DATA PROCESSING SYSTEM
12/179839	25-Jul-08	DEVICE AND METHOD FOR EVALUATING A TEMPERATURE
12/112508	30-Apr-08	CACHE COHERENCY PROTOCOL IN A DATA PROCESSING SYSTEM
12/179631	25-Jul-08	DEBUG TRACE MESSAGING WITH ONE OR MORE CHARACTERISTIC INDICATORS
12/164760	30-Jun-08	CIRCUIT AND METHOD FOR AVOIDING SOFT ERRORS IN STORAGE DEVICES
12/363294	30-Jan-09	METHOD AND DEVICE FOR LED CHANNEL MANAGEMENT IN LED DRIVER
12/▇▇▇▇▇▇	30-Jan-09	LED DRIVER WITH SEGMENTED DYNAMIC HEADROOM CONTROL
12/▇▇▇▇▇▇	02-Jun-08	MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
10/482088	17-Jun-02	APPARATUS AND METHOD FOR IMPROVING SIGNAL MISMATCH COMPENSATION
10/520067	25-Jun-03	ARRANGEMENT AND METHOD FOR ITERATIVE CHANNEL IMPULSE RESPONSE ESTIMATION
10/481845	21-May-02	ADAPTIVE RADIO FREQUENCY (RF) FILTER
10/505999		CHANNEL ESTIMATION IN A RADIO RECEIVER
09/928737	13-Aug-01	SEMICONDUCTOR PACKAGE AND METHOD THEREFOR
10/508620	01-Nov-02	REMOTE SWITCHING A COMMUNICATION DEVICE IN A COMMUNICATION NETWORK
10/958039	04-Oct-04	METHOD AND APPARATUS FOR DATA ALLOCATION IN AN OVERLAP-ENABLED COMMUNICATION SYSTEM
11/769376	27-Jun-07	DISCRETE MULTI-TONE (DMT) SYSTEM AND METHOD THAT COMMUNICATES A DATA PUMP DATA STREAM BETWEEN A GENERAL PURPOSE CPU AND A DSP VIA A BUFFERING SCHEME
12/388630	19-Feb-09	MANIPULATING DATA STREAMS IN DATA STREAM PROCESSORS
11/422230	05-Jun-06	METHOD AND DEVICE FOR CREATING AND USING PRE-INTERNALIZED PROGRAM FILES
12/426837	20-Apr-09	SEMICONDUCTOR DEVICE COMPRISING PASSIVE COMPONENTS
12/176914	21-Jul-08	SEMICONDUCTOR DEVICE AND METHOD OF MAKING SAME
11/627229	25-Jan-07	METHOD AND APPARATUS FOR SECURE SCAN TESTING
11/530058	08-Sep-06	METHOD FOR FABRICATING DUAL-METAL GATE DEVICE
10/879991	29-Oct-02	METHOD AND APPARATUS FOR SELECTIVELY OPTIMIZING INTERPRETED LANGUAGE CODE
10/531756	06-Oct-03	ARRANGEMENT, SYSTEM AND METHOD FOR VECTOR PERMUTATION IN SINGLE-INSTRUCTION MULTIPLE-DATA MICROPROCESSORS
10/567309	03-Aug-04	ARRANGEMENT AND METHOD FOR CONNECTING A PROCESSING NODE IN A DISTRIBUTION SYSTEM
11/571099	02-Jul-04	ARRANGEMENT AND METHOD FOR DUAL MODE OPERATION IN A COMMUNICATION SYSTEM TERMINAL
10/537633	21-Nov-03	SYSTEM NODE AND METHOD FOR PROVIDING MEDIA ARBITRATION
11/424183	14-Jun-06	HEATSINK MOLDLOCKS
11/576789	08-Oct-04	REFERENCE CIRCUIT
11/569332	26-Apr-05	METHOD AND DEVICE TO WAKE-UP NODES IN A SERIAL DATA BUS
12/039434	28-Feb-08	CIRCUIT DEVICE WITH AT LEAST PARTIAL PACKAGING AND METHOD FOR FORMING
10/550698	15-Mar-04	COMMUNICATION OF CONVERSATION BETWEEN TERMINALS OVER A RADIO LINK
10/554806	31-Mar-04	APPARATUS FOR DETECTING A MODULE
10/748735	30-Dec-03	SIGNAL GENERATION POWER MANAGEMENT CONTROL SYSTEM FOR PORTABLE COMMUNICATIONS DEVICE AND METHOD OF USING SAME
10/426560	30-Apr-03	SEMICONDUCTOR DEVICE AND METHOD UTILIZING VARIABLE MODE CONTROL WITH BLOCK CIPHERS
10/596944	29-Dec-03	CIRCUIT LAYOUT COMPACTION USING RESHAPING

138


Appl No.	Appl Date	Title
10/600637	20-Jun-03	DECOUPLING TECHNIQUE FOR OPTICAL DISK DRIVE OPTICAL PICKUP UNITS
10/596043	26-Nov-04	CLOCK PULSE GENERATOR APPARATUS WITH REDUCED JITTER CLOCK PHASE
10/565129	15-Jul-04	NETWORK NODE
10/779217	13-Feb-04	METHOD AND APPARATUS FOR PROCESSING A FREQUENCY MODULATED (FM) SIGNAL USING AN ADAPTIVE EQUALIZER
11/568405	28-Apr-04	ARBITER FOR A SERIAL BUS SYSTEM
12/276038	21-Nov-08	COMMUNICATION STEERING FOR USE IN A MULTI-MASTER SHARED RESOURCE SYSTEM
10/596910	22-Dec-04	LOW IF RADIO RECEIVER
11/609664	12-Dec-06	METHOD FOR MAKING A SEMICONDUCTOR STRUCTURE USING SILICON GERMANIUM
11/576152	14-Sep-05	METHOD OF FORMING A SEMICONDUCTOR PACKAGE AND STRUCTURE THEREOF
10/596369	08-Dec-04	MULTI-STANDARD TURBO INTERLEAVER USING TABLES
10/980707	▇▇-▇▇▇-▇▇	▇▇▇▇▇ MODULATING AND COMBINING CIRCUIT
10/596366	13-Dec-04	[A] POWER AMPLIFIER MODULE AND A TIME DIVISION MULTIPLE ACCESS RADIO
11/095338	31-Mar-05	INTEGRATED CMOS-COMPATIBLE BIOCHIP
12/211556	16-Sep-08	ULTRA-THIN DIE AND METHOD OF FABRICATING SAME
11/570302	23-May-05	WIRELESS COMMUNICATION UNIT AND METHOD FOR PROCESSING A CODE DIVISION MULTIPLE ACCESS SIGNAL
11/231087	20-Sep-05	INTEGRATED CIRCUIT WITH MULTIPLE SPACER INSULATING REGION WIDTHS
10/933191	02-Sep-04	METHOD AND APPARATUS FOR MODIFYING AN INFORMATION UNIT USING AN ATOMIC OPERATION
11/570303	31-May-05	[A] MEMORY CACHE CONTROL ARRANGEMENT AND A METHOD OF PERFORMING A COHERENCY OPERATION THEREFOR
11/574864	07-Sep-04	A VIRTUAL ADDRESS CACHE AND METHOD FOR SHARING DATA STORED IN A VIRTUAL ADDRESS CACHE
11/815177	31-Jan-05	AUDIO COMMUNICATION UNIT AND INTEGRATED CIRCUIT
10/795700	08-Mar-04	Selective TONE EVENT DETECTOR AND METHOD THEREFOR
11/574474	31-Aug-04	[A] VIRTUAL ADDRESS CACHE AND METHOD FOR SHARING DATA USING A UNIQUE TASK IDENTIFIER
10/940121	14-Sep-04	SYSTEM AND METHOD FOR FETCHING INFORMATION IN RESPONSE TO HAZARD INDICATION INFORMATION
11/574496	31-Aug-04	DESIGN RULE CHECKING SYSTEM
11/722293	23-Dec-04	WIRELESS COMMUNICATION UNIT AND POWER CONTROL SYSTEM THEREOF
11/575001	10-Sep-04	MEMORY MANAGEMENT UNIT AND A METHOD FOR MEMORY MANAGEMENT
10/977164	29-Oct-04	LIGHT-EMITTING ELEMENT DRIVE CIRCUIT
11/742955	01-May-07	SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR
11/914878	25-May-05	TREATMENT SOLUTION AND METHOD OF APPLYING A PASSIVATING LAYER
11/857122	18-Sep-07	METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DEVICE
11/964309	26-Dec-07	METHOD OF FORMING A NANOCLUSTER CHARGE STORAGE DEVICE
12/162173	03-Feb-06	UNIVERSAL BARRIER CMP SLURRY FOR USE WITH LOW DIELECTRIC CONSTANT INTERLAYER DIELECTRICS
12/117215	08-May-08	DRIVE ARRANGEMENT FOR ACTIVATING A CAR SAFETY DEVICE ACTIVATION ELEMENT
12/295465	30-Mar-06	PROCESS FOR FILLING RECESSED FEATURES IN A DIELECTRIC SUBSTRATE
11/095447	31-Mar-05	SYSTEM AND METHOD FOR BAD PIXEL REPLACEMENT IN IMAGE PROCESSING
11/575004	10-Sep-04	APPARATUS AND METHOD FOR CONTROLLING VOLTAGE AND FREQUENCY
11/721656	15-Dec-04	FREQUENCY GENERATION IN A WIRELESS COMMUNICATION UNIT
11/712682	01-Mar-07	BALUNS FOR MULTIPLE BAND OPERATION
11/575002	10-Sep-04	APPARATUS AND METHOD FOR CONTROLLING VOLTAGE AND FREQUENCY
11/719015	10-Nov-04	APPARATUS AND METHOD FOR CONTROLLING VOLTAGE AND FREQUENCY USING MULTIPLE REFERENCE CIRCUITS
11/626681	24-Jan-07	PROGRAMMING AND ERASING STRUCTURE FOR A FLOATING GATE MEMORY CELL AND METHOD OF MAKING
11/574495	31-Aug-04	METHOD FOR ESTIMATING POWER CONSUMPTION
12/091034	21-Oct-05	ELECTRONIC DEVICE AND METHOD FOR CONTROLLING CURRENT
11/996681	25-Jul-05	POWER SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A POWER SEMICONDUCTOR DEVICE

139


Appl No.	Appl Date	Title
11/574867	07-Sep-04	APPARATUS AND CONTROL INTERFACE THEREFOR
12/282542	16-Mar-06	METHOD AND SYSTEM FOR TUNING AN ANTENNA
11/955009	12-Dec-07	SEMICONDUCTOR DEVICE HAVING NITRIDATED OXIDE LAYER AND METHOD THEREFOR
11/574756	06-Sep-04	WIRELESS COMMUNICATION DEVICE AND DATA INTERFACE
11/994256	30-Jun-05	ENCRYPTION APPARATUS AND METHOD THEREFOR
10/887132	08-Jul-04	METHOD AND SYSTEM FOR PERFORMING DEBLOCKING FILTERING
12/397905	04-Mar-09	A VIRTUAL GROUND MEMORY ARRAY AND METHOD THEREFOR
10/944310	17-Sep-04	SYSTEM AND METHOD FOR SPECIFYING AN IMMEDIATE VALUE IN AN INSTRUCTION
11/100887	06-Apr-05	EYE CENTER DETERMINATION SYSTEM AND METHOD
11/719883	22-Nov-04	INTEGRATED CIRCUIT AND A METHOD FOR SECURE TESTING
11/815176	31-Jan-05	METHOD OF FABRICATING A SILICON-ON-INSULATOR STRUCTURE
11/097579	01-Apr-05	METHODS AND APPARATUS FOR SYNCHRONIZING DATA TRANSFERRED ACROSS A MULTI-PIN ASYNCHRONOUS SERIAL INTERFACE
11/816040	22-Feb-05	CONTROL APARATUS AND METHOD OF REGULATING POWER
11/719924	22-Nov-04	INTEGRATED CIRCUIT AND A METHOD FOR TESTING A MULTI-TAP INTEGRATED CIRCUIT
10/887131	08-Jul-04	METHOD AND SYSTEM FOR DISPLAYING A SEQUENCE OF IMAGE FRAMES
11/369513	06-Mar-06	TREATMENT FOR REDUCTION OF LINE EDGE ROUGHNESS
11/099138	04-Apr-05	DC OFFSET CORRECTION SYSTEM FOR A RECEIVER WITH BASEBAND GAIN CONTROL
12/212028	17-Sep-08	FLEXIBLE CARRIER FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION
11/910054	31-Mar-05	SEMICONDUCTOR WAFER WITH LOW-K DIELECTRIC LAYER AND PROCESS FOR FABRICATION THEREFOR
12/398387	05-Mar-09	SINGLE TRANSISTOR MEMORY CELL WITH REDUCED RECOMBINATION RATES
11/610768	14-Dec-06	CONTROLLED ELECTROLESS PLATING
11/720127	30-Nov-04	METHOD AND SYSTEM FOR IMPROVING THE MANUFACTURABILITY OF INTEGRATED CIRCUITS
11/226040	14-Sep-05	FLOATING POINT NORMALIZATION AND DENORMALIZATION
11/816036	02-Feb-06	WAFER CLEANING AFTER VIA-ETCHING
11/911324	13-Apr-05	PROTECTION OF AN INTEGRATED CIRCUIT AND METHOD THEREFORE
11/072878	04-Mar-05	VERTICAL TRANSISTOR NVM WITH BODY CONTACT STRUCTURE AND METHOD
11/720129	30-Nov-04	APPARATUS FOR REDUCING POWER CONSUMPTION USING SELECTIVE POWER GATING
11/994251	30-Jun-05	VECTOR CRC COMPUTATION ON DSP
11/▇▇▇▇▇▇	18-Apr-05	CURRENT DRIVER CIRCUIT AND METHOD OF OPERATION THEREFOR
11/▇▇▇▇▇▇	17-Jun-05	TWISTED PAIR COMMUNICATION SYSTEM, APPARATUS AND METHOD THEREFOR
11/722295	20-Dec-04	BROADCASTING OF TEXTUAL AND MULTIMEDIA INFORMATION
11/928314	30-Oct-07	ELECTRONIC DEVICE COMPRISING A GATE ELECTRODE INCLUDING A METAL-CONTAINING LAYER HAVING ONE OR MORE IMPURITIES
12/295462	31-Mar-06	POWER AMPLIFIER WITH PRE-DISTORTER
11/086045	22-Mar-05	HIGHER LINEARITY PASSIVE MIXER
11/181169	14-Jul-05	CR-CAPPED CHROMELESS PHASE LITHOGRAPHY
12/067590 12/067590	21-Sep-05	CONTROLLER AND METHOD FOR CONTROLLING AN IGNITION COIL
11/146826	07-Jun-05	IN-SITU NITRIDATION OF HIGH-K DIELECTRICS
11/101258	06-Apr-05	EYE CENTER RETRAINING SYSTEM AND METHOD
11/914876	26-May-05	FREQUENCY GENERATION IN A WIRELESS COMMUNICATION UNIT
11/994254	30-Jun-05	OUTPUT STAGE CIRCUIT APPARATUS FOR A PROCESSOR DEVICE AND METHOD THEREFOR
11/848612	31-Aug-07	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING ASYMMETRIC DIELECTRIC REGIONS AND STRUCTURE THEREOF
11/911929	20-Apr-05	DEVICE AND METHOD FOR CONTROLLING A BACKLIT DISPLAY
11/911930	18-Apr-05	ADAPTIVE PROTECTION CIRCUIT FOR A POWER AMPLIFIER
11/721651	13-Dec-04	APPARATUS AND METHOD FOR DETECTING AN END POINT OF AN INFORMATION FRAME
11/257932	25-Oct-05	SYSTEM AND METHOD FOR MEMORY ARRAY WITH FAST ADDRESS DECODER
11/552817	25-Oct-06	SYSTEM AND METHOD FOR MEMORY ARRAY ACCESS WITH FAST ADDRESS DECODER
12/067594	21-Sep-05	[AN] INTEGRATED CIRCUIT AND A METHOD FOR SELECTING A VOLTAGE IN AN INTEGRATED CIRCUIT
12/204500	04-Sep-08	SEMICONDUCTOR DEVICE WITH A BUFFER REGION WITH TIGHTLY-PACKED FILLER PARTICLES

140


Appl No.	Appl Date	Title
12/094570	21-Nov-05	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A SALICIDE LAYER
12/122837	19-May-08	METHOD OF FABRICATING A SUBSTRATE FOR A PLANAR, DOUBLE GATED, TRANSISTOR PROCESS
11/118230	28-Apr-05	LOGIC THRESHOLD ACQUISITION CIRCUITS AND METHODS USING REVERSED PEAK DETECTORS
12/347056	31-Dec-08	SELF-ALIGNING RESONATOR FILTER CIRCUITS
12/102519	14-Apr-08	DATA PROCESSING SYSTEM HAVING FLEXIBLE INSTRUCTION CAPABILITY AND SELECTION MECHANISM
11/914669	17-May-05	METHOD OF DISTANCING A BUBBLE AND BUBBLE DISPLACEMENT APPARATUS
12/063425	09-Aug-05	WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD FOR BIASING A POWER AMPLIFIER
11/911931	21-Apr-05	METHOD OF FABRICATING A MOS DEVICE WITH NON-SIO2 GATE DIELECTRIC
11/722296	23-Dec-04	POWER CONTROL SYSTEM FOR A WIRELESS COMMUNICATION UNIT
12/244413	02-Oct-08	SEMICONDUCTOR FABRICATION PROCESS INCLUDING SILICIDE ▇▇▇▇▇▇▇▇ REMOVAL PROCESSING
11/754728	29-May-07	INTERLAYER DIELECTRIC UNDER STRESS FOR AN INTEGRATED CIRCUIT
12/280482	24-Feb-06	INTEGRATED SYSTEM FOR SEMICONDUCTOR SUBSTRATE PROCESSING USING LIQUID PHASE METAL DEPOSITION
11/910069	30-Mar-05	SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION
11/836844	10-Aug-07	ELECTRONIC DEVICES INCLUDING A SEMICONDUCTOR LAYER AND A PROCESS FOR FORMING THE SAME
11/995465	13-Jul-05	[A] TEMPERATURE SENSING DEVICE
11/302007	09-Dec-05	ELECTRONIC APPARATUS INTERCONNECT ROUTING AND INTERCONNECT ROUTING METHOD FOR MINIMIZING PARASITIC RESISTANCE
11/231886	22-Sep-05	METHOD AND SYSTEM FOR ACKNOWLEDGING FRAMES IN A COMMUNICATION NETWORK
11/914870	25-May-05	CLEANING SOLUTION FOR A SEMICONDUCTOR WAFER
11/816037	16-Feb-05	DEVICE HAVING FAILURE RECOVERY CAPABILITIES AND A METHOD FOR FAILURE RECOVERY
11/914700	19-May-05	METHOD AND DEVICE FOR HIGH SPEED TESTING OF AN INTEGRATED CIRCUIT
11/909394	23-Mar-05	METHOD FOR RACE PREVENTION AND A DEVICE HAVING RACE PREVENTION CAPABILITIES
11/445981	31-May-06	SYSTEM AND METHOD FOR POLAR MODULATION USING POWER AMPLIFIER BIAS CONTROL
11/816038	24-Feb-05	LEAD-FRAME CIRCUIT PACKAGE
11/095274	31-Mar-05	AGC WITH INTEGRATED WIDEBAND INTERFERER DETECTION
11/195908	03-Aug-05	DATA SIGNAL SYSTEM
12/063010	05-Aug-05	PORE SEALING AND CLEANING POROUS LOW DIELECTRIC CONSTANT STRUCTURES
11/994764	04-Jul-05	METHOD AND APPARATUS FOR FORMING A NOBLE METAL LAYER, NOTABLY ON INLAID METAL FEATURES
11/994253	30-Jun-05	METHOD OF FORMING A SEMICONDUCTOR STRUCTURE
11/303234	16-Dec-05	METHOD FOR DETERMINING TEMPERATURE PROFILE IN SEMICONDUCTOR MANUFACTURING TEST
11/450070	09-Jun-06	METHODS AND APPARATUS FOR A SEMICONDUCTOR DEVICE PACKAGE WITH IMPROVED THERMAL PERFORMANCE
11/151752	14-Jun-05	DC OFFSET CORRECTION FOR CONSTANT ENVELOPE SIGNALS
11/421009	30-May-06	METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE HAVING A STRAINED SILICON LAYER
11/910371	01-Apr-05	ELECTRONIC SWITCH CIRCUIT, CONVERTER AND METHOD OF OPERATION
11/856239	17-Sep-07	INTEGRATED CIRCUIT INCLUDING CLIP
12/063424 12/063424	10-Aug-05	FIELD-EFFECT SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
11/205419	17-Aug-05	COMMUNICATIONS SECURITY MANAGEMENT
11/213069	25-Aug-05	SEMICONDUCTOR DEVICES EMPLOYING POLY-FILLED TRENCHES
12/161704	23-Jan-06	METHOD AND APPARATUS FOR CONDITIONING A CMP PAD
11/369648	07-Mar-06	ELECTRONIC DEVICE TESTING SYSTEM
12/294798	27-Mar-06	APPARATUS FOR DETECTING CLOCK FAILURE AND METHOD THEREFOR
11/328693	10-Jan-06	DUAL PLASMA TREATMENT BARRIER FILM TO REDUCE LOW-K DAMAGE
11/737759	20-Apr-07	METHOD AND SYSTEM FOR INCORPORATING VIA REDUNDANCY IN TIMING ANALYSIS
11/914873	23-May-05	METHOD AND DEVICE FOR PROCESSING IMAGE DATA STORED IN A FRAME BUFFER
12/066225	07-Sep-05	METHOD AND A COMPUTER READABLE MEDIUM FOR ANALYZING A DESIGN OF AN INTEGRATED CIRCUIT
12/526445	08-Feb-07	MEASUREMENT OF CRITICAL DIMENSIONS OF SEMICONDUCTOR WAFERS

141


Appl No.	Appl Date	Title
11/993811	22-Jun-05	DEVICE AND METHOD FOR SECURING SOFTWARE
12/296626	11-Apr-06	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
11/909398	01-Apr-05	CHARGE PUMP AND CONTROL SCHEME
11/096607	01-Apr-05	METHOD AND APPARATUS FACILITATING MULTI MODE INTERFACES
11/139765	27-May-05	REVERSE ALD
11/910062	31-Mar-05	METHOD FOR NOISE REDUCTION IN A PHASE LOCKED LOOP AND A DEVICE HAVING NOISE REDUCTION CAPABILITIES
11/383119	12-May-06	SYSTEMS AND METHOD OF ADAPTIVE RATE CONTROL FOR A VIDEO ENCODER
11/413533	29-Apr-06	BROADCAST HANDOFF BETWEEN COMMUNICATION NETWORKS
11/910367	01-Apr-05	VOLTAGE CONVERTER APPARATUS AND METHOD THEREFOR
11/913441	04-May-05	INTEGRATED CIRCUIT AND A METHOD FOR DESIGNING A BOUNDARY SCAN SUPER-CELL
11/910067	30-Mar-05	METHOD AND DEVICE FOR TRANSMITTING A SEQUENCE OF TRANSMISSION BURSTS
12/066229	09-Sep-05	INTERCONNECT AND A METHOD FOR DESIGNING AN INTERCONNECT
11/096517	01-Apr-05	SYSTEM AND METHOD FOR PROTECTING LOW VOLTAGE TRANSCEIVER
12/421247	09-Apr-09	MODIFIED HYBRID ORIENTATION TECHNOLOGY
11/952750	07-Dec-07	SEMICONDUCTOR DEVICE HAVING A P-MOS TRANSISTOR WITH SOURCE-DRAIN EXTENSION COUNTER-DOPING
11/403395	13-Apr-06	TRIMMING CIRCUIT AND ELECTRONIC CIRCUIT
12/063422	09-Aug-05	HANDOVER BASED ON A QUALITY OF SERVICE METRIC OBTAINED FROM A MAC LAYER OF A RECEIVED SIGNAL
12/305109	06-Jul-06	WAFER AND METHOD OF FORMING ALIGNMENT MARKERS
11/914079	11-May-05	METHOD FOR POWER REDUCTION AND A DEVICE HAVING POWER REDUCTION CAPABILITIES
11/996244	21-Jul-05	MICROPHONE AMPLIFICATION ARRANGEMENT AND INTEGRATED CIRCUIT THEREFOR
11/996239	21-Jul-05	VOLTAGE REGULATOR WITH PASS TRANSISTORS CARRYING DIFFERENT RATIOS OF THE TOTAL LOAD CURRENT AND METHOD OF OPERATION THEREFOR
11/176765	07-Jul-05	SUB ZERO SPACER FOR SHALLOW MDD JUNCTION TO IMPROVE BVDSS IN NVM BITCELL
11/994270	30-Jun-05	DEVICE AND METHOD FOR ARBITRATING BETWEEN DIRECT MEMORY ACCESS TASK REQUEST
11/252061	17-Oct-05	FAST ROTATOR WITH EMBEDDED MASKING AND METHOD THEREFOR
11/338252	24-Jan-06	METHOD AND APPARATUS FOR OPTIMIZING BOOLEAN EXPRESSION EVALUATION
11/181168	14-Jul-05	METHOD OF MAKING A SEMICONDUCTOR DEVICE USING A DUAL-TONE PHASE SHIFT MASK
12/278438	09-Feb-06	[AN] ELECTRONIC DEVICE HAVING A MEMORY ELEMENT AND METHOD OF OPERATION THEREFOR
11/917108	10-Jun-05	DEVICE AND METHOD FOR MEDIA ACCESS CONTROL
11/916,711	07-Jun-05	HYBRID METHOD AND DEVICE FOR TRANSMITTING PACKETS
11/917111	10-Jun-05	METHOD AND DEVICE FOR FRAME SYNCHRONIZATION
11/994273	30-Jun-05	DEVICE AND METHOD FOR CONTROLLING MULTIPLE DMA TASKS
11/994276	30-Jun-05	DEVICE AND METHOD FOR CONTROLLING AN EXECUTION OF A DMA TASK
11/994278	30-Jun-05	DEVICE AND METHOD FOR EXECUTING A DMA TASK
12/167958	03-Jul-08	VENDOR INDEPENDENT METHOD TO MERGE COVERAGE RESULTS FOR DIFFERENT DESIGNS
11/996241	18-Jul-05	SWITCH ARRANGEMENT, INTEGRATED CIRCUIT, ACTIVATION SYSTEM
11/994766	04-Jul-05	RAMPING IN MULTIMODE TRANSMITTERS USING PRIMED FIR FILTERS
11/554847	31-Oct-06	METHOD FOR DAMAGE AVOIDANCE IN TRANSFERRING AN ULTRA-THIN LAYER OF CRYSTALLINE MATERIAL WITH HIGH CRYSTALLINE QUALITY
11/271693	10-Nov-05	RESOURCE EFFICIENT VIDEO PROCESSING VIA PREDICTION ERROR COMPUTATIONAL ADJUSTMENTS
11/360724	23-Feb-06	ELECTRONIC DEVICE AND METHOD
11/254166	19-Oct-05	REGION CLUSTERING BASED ERROR CONCEALMENT FOR VIDEO DATA
12/092464	02-Nov-05	METHOD AND SYSTEM FOR CLOCK SKEW REDUCTION IN CLOCK TREES
11/626753	24-Jan-07	ELECTRONIC DEVICE INCLUDING TRENCHES AND DISCONTINUOUS STORAGE ELEMENTS AND PROCESSES OF FORMING AND USING THE SAME
11/253517	19-Oct-05	SYSTEM AND METHOD OF CODING MODE DECISION FOR VIDEO ENCODING
12/067583	20-Sep-05	METHOD OF MAKING AN INTEGRATED CIRCUIT
11/225282	13-Sep-05	DYNAMIC SWITCHING BETWEEN Maximum Likelihood Sequence Estimation (MLSE) AND LINEAR EQUALIZER FOR SINGLE ANTENNA INTERFERENCE CANCELLATION (SAIC) IN A global system for mobile communications (GSM) [COMMUNICATION] SYSTEM
11/205450	16-Aug-05	MODULATION DETECTION IN A SAIC OPERATIONAL ENVIRONMENT
11/129247	13-May-05	EFFICIENT MULTI-BANK BUFFER MANAGEMENT SCHEME FOR NON-ALIGNED DATA
12/361944	29-Jan-09	TUNABLE ANTIFUSE ELEMENTS
11/257973	25-Oct-05	[A] METHOD OF MAKING AN INVERTED-T CHANNEL TRANSISTOR

142


Appl No.	Appl Date	Title
12/094123	17-Nov-05	MULTI-PORT HIGH-LEVEL CACHE UNIT AND A METHOD FOR RETRIEVING INFORMATION FROM A MULTI-PORT HIGH-LEVEL CACHE UNIT
12/366336	05-Feb-09	LINEAR VOLTAGE CONTROLLED VARIABLE ATTENUATOR WITH LINEAR DB/V GAIN SLOPE
11/522634	18-Sep-06	DATA PROCESSOR AND METHODS THEREOF
11/328594	10-Jan-06	ELECTRONIC DEVICE INCLUDING A FIN-TYPE TRANSISTOR STRUCTURE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
12/160470	13-Jan-06	PROTECTION SYSTEM AND METHOD OF OPERATION THEREIN
12/251746	15-Oct-08	MULTIPLE DEVICE TYPES INCLUDING AN INVERTED-T CHANNEL TRANSISTOR AND METHOD THEREFOR
12/158393	21-Dec-05	IMPROVEMENTS IN OR RELATING TO LEAD FRAME BASED SEMICONDUCTOR PACKAGE AND A METHOD OF MANUFACTURING THE SAME
11/343624	30-Jan-06	MOS DEVICE WITH NANO-CRYSTAL GATE STRUCTURE
11/262171	28-Oct-05	SYSTEM AND METHOD FOR DECOUPLED PRECOMPUTATION PREFETCHING
12/091691	27-Oct-05	SYSTEM AND METHOD FOR CONTROLLING VOLTAGE LEVEL AND CLOCK FREQUENCY SUPPLIED TO A SYSTEM
11/994754	05-Jul-05	DEVICE AND METHOD FOR COMPENSATING FOR VOLTAGE DROPS
11/209157	22-Aug-05	BOUNDED SIGNAL MIXER AND METHOD OF OPERATION
12/579072	14-Oct-09	PLASMA TREATMENT OF A SEMICONDUCTOR SURFACE FOR ENHANCED NUCLEATION OF A METAL-CONTAINING LAYER
12/186224	05-Aug-08	MICROELECTRONIC ASSEMBLY [AND METHOD FOR FORMING THE SAME]
12/413078	27-Mar-09	ANTIFUSE ELEMENTS
11/328668	10-Jan-06	PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING A FIN-TYPE STRUCTURE
11/328779	10-Jan-06	INTEGRATED CIRCUIT USING FINFETS AND HAVING A STATIC RANDOM ACCESS MEMORY (SRAM)
11/361948	24-Feb-06	FLEXIBLE MACROBLOCK ORDERING WITH REDUCED DATA TRAFFIC AND POWER CONSUMPTION
11/461048	31-Jul-06	BUS HAVING A DYNAMIC TIMING BRIDGE
12/278440	07-Feb-06	ACCELERATION SENSOR ARRANGEMENT, SAFING ARRANGEMENT FOR AN ACTIVATION SYSTEM, ACTIVATION SYSTEM
12/518929	22-Dec-06	POWER SUPPLY SWITCHING APPARATUS WITH SEVERE OVERLOAD DETECTION
11/▇▇▇▇▇▇	18-Apr-05	CURRENT DRIVER CIRCUIT AND METHOD OF OPERATION THEREFOR
11/▇▇▇▇▇▇	14-Dec-05	BACK-GATED SEMICONDUCTOR DEVICE WITH A STORAGE LAYER AND METHODS FOR FORMING THEREOF
11/267385	04-Nov-05	FAST FOURIER TRANSFORM ON A SINGLE-INSTRUCTION-STREAM, MULTIPLE-DATA-STREAM PROCESSOR
12/180818	28-Jul-08	ELECTRONIC DEVICE INCLUDING A TRANSISTOR STRUCTURE HAVING AN ACTIVE REGION ADJACENT TO A STRESSOR LAYER
11/496872	31-Jul-06	SYSTEM-ON-A-CHIP AND METHOD FOR SECURELY TRANSFERRING DATA ON A SYSTEM-ON-A-CHIP
12/▇▇▇▇▇▇	16-Mar-06	A WORLDWIDE DRIVER FOR A NON-VOLATILE MEMORY DEVICE, A NON-VOLATILE MEMORY DEVICE AND METHOD
12/282543	16-Mar-06	BITLINE CURRENT GENERATOR FOR A NON-VOLATILE MEMORY ARRAY AND A NON-VOLATILE MEMORY ARRAY
12/347061	31-Dec-08	MOS DEVICES WITH MULTI-LAYER GATE STACK
11/329324	09-Jan-06	METHOD OF REDUCING AN INTER-ATOMIC BOND STRENGTH IN A SUBSTANCE
11/392383	29-Mar-06	SELECTIVE INSTRUCTION BREAKPOINT GENERATION
11/343454	31-Jan-06	DISTRIBUTED RESOURCE ACCESS PROTECTION
12/282547	16-Mar-06	A NON-VOLATILE MEMORY DEVICE AND PROGRAMMABLE VOLTAGE REFERENCE FOR A NON-VOLATILE MEMORY DEVICE
11/262057	28-Oct-05	ELECTRONIC ASSEMBLY HAVING GRADED WIRE BONDING
11/671271	05-Feb-07	SECURE DATA ACCESS METHODS AND APPARATUS
11/324425	03-Jan-06	ELECTRICAL SENSOR FOR REAL-TIME FEEDBACK CONTROL OF PLASMA NITRIDATION
11/252525	18-Oct-05	ACG FOR NARROWBAND RECEIVERS
12/529523	02-Mar-07	WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT COMPRISING A VOLTAGE CONTROLLED OSCILLATOR AND METHOD OF OPERATION THEREFOR
11/393582	29-Mar-06	METHODS AND APPARATUS FOR A REDUCED INDUCTANCE WIREBOND ARRAY
11/383656	16-May-06	INTEGRATED CIRCUIT HAVING PADS AND INPUT/OUTPUT (I/O) CELLS
12/161521	08-Nov-06	REGULATED VOLTAGE SYSTEM AND METHOD OF PROTECTION THEREFOR
11/267537	04-Nov-05	DETECTING A DATA FRAME
11/331958	13-Jan-06	METHOD TO CONTROL THE GATE SIDEWALL PROFILE BY GRADED MATERIAL COMPOSITION
11/428953	06-Jul-06	SELECTIVE UNIAXIAL STRESS MODIFICATION FOR USE WITH STRAINED SILICON ON INSULATOR INTEGRATED CIRCUIT
12/092463	02-Nov-05	DEVICE AND METHOD FOR CONFIGURING INPUT/OUTPUT PADS

143


Appl No.	Appl Date	Title
11/347103	03-Feb-06	SELECTIVE TRANSACTION REQUEST PROCESSING AT AN INTERCONNECT DURING A LOCKOUT
12/305114	11-Jul-06	MICROPROCESSOR AND METHOD FOR REGISTER ADDRESSING THEREIN
12/160008	04-Jan-06	DEVICE AND METHOD FOR EVALUATING ELECTROSTATIC DISCHARGE PROTECTION CAPABILITIES
11/243010	03-Oct-05	METHOD OF TRANSFERRING A THIN CRYSTALLINE SEMICONDUCTOR LAYER
11/343781	31-Jan-06	DETECTING REFLECTIONS IN A COMMUNICATION CHANNEL
11/349874	08-Feb-06	ADAPTIVE VARIABLE LENGTH PULSE SYNCHRONIZER
12/090044	12-Oct-05	SYSTEM AND METHOD FOR CONTROLLING VOLTAGE AND FREQUENCY IN A MULTIPLE VOLTAGE ENVIRONMENT
11/435917	17-May-06	DELAY CONFIGURABLE DEVICE AND METHODS THEREOF
12/242622	30-Sep-08	METHOD OF PACKAGING A SEMICONDUCTOR DIE
11/360218	23-Feb-06	MANAGING PACKETS FOR TRANSMISSION IN A COMMUNICATION SYSTEM
11/404350	14-Apr-06	MITIGATION OF DC DISTORTION IN OFDM RECEIVERS
11/416436	02-May-06	ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR FINS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/386147	21-Mar-06	METHOD FOR FORMING AND SEALING A CAVITY FOR AN INTEGRATED MEMS DEVICE
12/067587 12/067587	21-Sep-05	SYSTEM AND METHOD FOR STORING STATE INFORMATION
12/295738	03-Apr-06	BIAS CIRCUIT FOR A RADIO FREQUENCY POWER-AMPLIFIER AND METHOD THEREFOR
12/300439	16-May-06	AMPLIFIER CIRCUIT AND INTEGRATED CIRCUIT THEREFOR
11/302769	14-Dec-05	METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING DUMMY FEATURES
12/278476	09-Feb-06	ELECTRONIC APPARATUS AND METHOD OF CONSERVING ENERGY
11/383653	16-May-06	INTEGRATED CIRCUIT HAVING PADS AND INPUT/OUTPUT (I/O) CELLS
11/693705	29-Mar-07	METHOD OF DETERMINING A SYNCHRONOUS PHASE
11/385463	21-Mar-06	DATA PROCESSOR HAVING DYNAMIC CONTROL OF INSTRUCTION PREFETCH BUFFER DEPTH AND METHOD THEREFOR
11/337783	23-Jan-06	MEMORY AND METHOD FOR SENSING DATA IN A MEMORY USING COMPLEMENTARY SENSING SCHEME
11/370320	08-Mar-06	METHOD FOR MAKING A MULTIBIT TRANSISTOR
12/067592 12/067592	20-Sep-05	[A] DEVICE HAVING A LOW LATENCY SINGLE PORT MEMORY UNIT AND A METHOD FOR WRITING MULTIPLE DATA SEGMENTS TO A SINGLE PORT MEMORY UNIT
12/093111	09-Nov-05	METHOD FOR MANAGING UNDER-RUN AND A DEVICE HAVING UNDER-RUN MANAGEMENT CAPABILITIES
12/097598	16-Dec-05	DEVICE AND METHOD FOR PROCESSING INSTRUCTIONS
11/362214	24-Feb-06	SYNCHRONIZATION FOR OFDM SIGNALS
11/460847	28-Jul-06	ESTIMATING FREQUENCY ERROR OF A SAMPLE STREAM
12/094124	17-Nov-05	METHOD AND DEVICE FOR MANAGING MULTI-FRAMES
11/617763	29-Dec-06	SCAN CELL FOR AN INTEGRATED CIRCUIT
11/361625	24-Feb-06	LOW VOLTAGE OUTPUT BUFFER AND METHOD FOR BUFFERING DIGITAL OUTPUT DATA
12/094573	22-Nov-05	[A] METHOD FOR PROCESSING ATM CELLS AND A DEVICE HAVING ATM CELL PROCESSING CAPABILITIES
12/099557	08-Apr-08	LATERALLY GROWN NANOTUBES AND METHOD OF FORMATION
11/548853	12-Oct-06	TRIMMING CIRCUIT, ELECTRONIC CIRCUIT AND TRIMMING CONTROL SYSTEM
12/304194	15-Jun-06	MIM CAPACITOR INTEGRATION
11/562557	22-Nov-06	DECODING MIMO SPACE TIME CODE SYMBOL-PAIRS
11/453763	14-Jun-06	MICROELECTRONIC ASSEMBLY WITH BACK SIDE METALLIZATION AND METHOD FOR FORMING THE SAME
12/091033	21-Oct-05	METHOD FOR CLEANING A SEMICONDUCTOR STRUCTURE AND CHEMISTRY THEREOF
11/738531	23-Apr-07	METHOD OF TRANSITIONING BETWEEN ACTIVE MODE AND POWER-DOWN MODE IN PROCESSOR BASED SYSTEM
12/278478	09-Feb-06	[A] METHOD FOR EXCHANGING INFORMATION WITH PHYSICAL LAYER COMPONENT REGISTERS
12/066227	09-Sep-05	[A] RECEIVER AND A METHOD FOR CHANNEL ESTIMATION
11/325066	04-Jan-06	SYSTEM AND METHOD FOR FAST MOTION ESTIMATION
12/094572	22-Nov-05	METHOD AND SYSTEM FOR FILTERING IMAGE DATA
11/398944	06-Apr-06	LEAD FRAME BASED, OVER-MOLDED SEMICONDUCTOR PACKAGE WITH INTEGRATED THROUGH HOLE TECHNOLOGY (THT) HEAT SPREADER PIN(S) AND ASSOCIATED METHOD OF MANUFACTURING
11/341991	27-Jan-06	WARPAGE-REDUCING PACKAGING DESIGN
12/279655	17-Feb-06	[A] METHOD FOR SCHEDULING ATM CELLS AND A DEVICE HAVING ATM CELL SCHEDULING CAPABILITIES

144


Appl No.	Appl Date	Title
12/162174	27-Jan-06	DEVICE AND METHOD FOR ADDING AND SUBTRACTING TWO VARIABLES AND A CONSTANT
12/066436	12-Sep-05	POWER SAVING IN SIGNAL PROCESSING IN RECEIVERS
12/160007	04-Jan-06	[A] METHOD FOR HIGH SPEED FRAMING AND A DEVICE HAVING FRAMING CAPABILITIES
11/383113	12-May-06	SELECTIVE UNIAXIAL STRESS RELAXATION BY LAYOUT OPTIMIZATION IN STRAINED SILICON ON INSULATOR INTEGRATED CIRCUIT
11/609102	11-Dec-06	METHOD FOR ESTIMATING PROCESSOR ENERGY USAGE
12/090116	02-Feb-06	DEVICE AND METHOD FOR MANAGING A RETRANSMIT OPERATION
12/567469	25-Sep-09	STACKABLE MOLDED PACKAGES AND METHODS OF MAKING THE SAME
11/375796	14-Mar-06	SILICON DEPOSITION OVER DUAL SURFACE ORIENTATION SUBSTRATES TO PROMOTE UNIFORM POLISHING
12/158392	22-Dec-05	IMMERSION LITHOGRAPHY APPARATUS AND METHOD OF PERFORMING IMMERSION LITHOGRAPHY
12/431288	28-Apr-09	THIN-FILM CAPACITOR WITH A FIELD MODIFICATION LAYER
12/096550	07-Dec-05	WIRELESS SUBCRIBER COMMUNICATION UNIT AND METHOD OF POWER CONTROL WITH BACK-OFF THEREFOR
12/302221	01-Jun-06	SIN-COS SENSOR ARRANGEMENT, INTEGRATED CIRCUIT AND METHOD THEREFOR
12/161524	18-Jan-06	DEVICE HAVING DATA SHARING CAPABILITIES AND A METHOD FOR SHARING DATA
12/282486	13-Mar-06	SEMICONDUCTOR DEVICE STRUCTURE AND INTEGRATED CIRCUIT THEREFOR
12/091695	28-Oct-05	METHOD FOR FORMING A SEMICONDUCTOR DEVICE USING OPTICAL PROXIMITY CORRECTION FOR THE OPTICAL LITHOGRAPHY
11/402395	12-Apr-06	INTEGRATED CIRCUIT WITH DIFFERENT CHANNEL MATERIALS FOR P AND N CHANNEL TRANSISTORS AND METHOD THEREFOR
12/161519	18-Jan-06	HARDWARE ACCELERATOR BASED METHOD AND DEVICE FOR STRING SEARCHING
11/461811	02-Aug-06	METHOD AND APPARATUS FOR RECONFIGURING A REMOTE DEVICE
12/596267	27-Apr-07	SEMICONDUCTOR WAFER PROCESSING
11/390918	27-Mar-06	SEMICONDUCTOR DEVICE WITH A MULTI-PLATE ISOLATION STRUCTURE
12/174357	16-Jul-08	ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR FIN AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
11/409633	24-Apr-06	Process of forming an ELECTRONIC DEVICE INCLUDING A SEMICONDUCTOR LAYER AND ANOTHER LAYER ADJACENT TO AN OPENING WITHIN THE SEMICONDUCTOR LAYER [AND A PROCESS OF FORMING THE SAME]
11/616410	27-Dec-06	PARALLEL PROCESSING FOR SINGLE ANTENNA INTERFERENCE CANCELLATION
12/282490	15-Mar-06	METHOD AND DEVICE FOR RECOGNIZING A SYNCHRONIZATION MESSAGE FROM A WIRELESS TELECOMMUNICATIONS DEVICE
12/377806	23-Aug-06	DEVICE HAVING PRIORITY UPGRADE MECHANISM CAPABILITIES AND A METHOD FOR UPDATING PRIORITIES
11/365059	28-Feb-06	METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO OR MORE TRANSISTOR CLASSES USING A RECESS SPACER INTEGRATION
11/364985	28-Feb-06	METHOD FOR SEPARATELY OPTIMIZING SPACER WIDTH FOR TWO TRANSISTOR GROUPS USING A RECESS SPACER ETCH (RSE) INTEGRATION
12/278484	09-Feb-06	LIN BUS NETWORK, INTEGRATED CIRCUIT AND METHOD OF COMMUNICATING THEREON
12/300438	24-May-06	LIN NETWORK, INTEGRATED CIRCUIT AND METHOD THEREFOR
12/279672	17-Feb-06	METHOD OF PATTERNING A LAYER USING A PELLICLE
11/436234	18-May-06	HARDWARE MONITOR OF LIN TIME BUDGET
11/408346	21-Apr-06	STI STRESSOR INTEGRATION FOR MINIMAL PHOSPHORIC EXPOSURE AND DIVOT-FREE TOPOGRAPHY
12/293744	23-Mar-06	ELECTRONIC DEVICE AND INTEGRATED CIRCUIT COMPRISING A DELTA-SIGMA CONVERTER AND METHOD THEREFOR
11/342102	27-Jan-06	METHOD OF FORMING A SEMICONDUCTOR ISOLATION TRENCH
11/371142	08-Mar-06	DYNAMIC TIMING ADJUSTMENT IN A CIRCUIT DEVICE
11/360318	22-Feb-06	METHOD FOR IMPROVING SELF-ALIGNED SILICIDE EXTENDIBILITY WITH SPACER RECESS USING A STAND-ALONE RECESS ETCH INTEGRATION
12/375854	01-Aug-06	METHOD AND APPARATUS FOR IMPROVEMENTS IN CHIP MANUFACTURE AND DESIGN
12/161518	18-Jan-06	DEVICE AND METHOD FOR FINDING EXTREME VALUES IN A DATA BLOCK
11/410584	25-Apr-06	NON-VOLATILE MEMORY CELL
12/419701	07-Apr-09	BEAMFORMING FOR NON-COLLABORATIVE, SPACE DIVISION MULTIPLE ACCESS SYSTEMS
12/304856	23-Jun-06	INTERRUPT RESPONSE CONTROL APPARATUS AND METHOD THEREFOR
12/377804	23-Aug-06	PIPELINED DEVICE AND A METHOD FOR EXECUTING TRANSACTIONS IN A PIPELINED DEVICE
12/280478	24-Feb-06	SOFTWARE PIPELINING
11/645870	27-Dec-06	DYNAMIC ALLOCATION OF MESSAGE BUFFERS
12/254294	20-Oct-08	SPLIT GATE MEMORY CELL AND METHOD THEREFOR

145


Appl No.	Appl Date	Title
12/304196	20-Jun-06	DEVICE AND METHOD FOR HADLING METASTABLE SIGNALS
12/162179	01-Feb-06	DEVICE AND A METHOD FOR ESTIMATING TRANSISTOR PARAMETER VARIATIONS
11/386539	21-Mar-06	A METHOD FOR FORMING A STRESSOR STRUCTURE
11/426628	27-Jun-06	METHOD AND APPARATUS FOR INTERFACING A PROCESSOR AND COPROCESSOR
11/426630	27-Jun-06	METHOD AND APPARATUS FOR INTERFACING A PROCESSOR AND COPROCESSOR
11/426633	27-Jun-06	Coprocessor receiving target address to process a function and to send data transfer instructions to main processor for execution to preserve cache coherence [METHOD AND APPARATUS FOR INTERFACING A PROCESSOR AND COPROCESSOR]
12/523930	22-Jan-07	LIQUID CLEANING COMPOSITION AND METHOD FOR CLEANING SEMICONDUCTOR DEVICES
12/207719	10-Sep-08	METHODS FOR FORMING QUAD FLAT NO-LEAD (QFN) PACKAGES
11/441869	26-May-06	METHOD OF INCREASING CODING EFFICIENCY AND REDUCING POWER CONSUMPTION BY ON-LINE SCENE CHANGE DETECTION WHILE ENCODING INTER-FRAME
12/375848	01-Aug-06	MEMORY MANAGEMENT UNIT AND METHOD OF ACCESSING AN ADDRESS
12/279952	20-Feb-06	[A] METHOD AND DEVICE FOR EXCHANGING DATA USING A VIRTUAL FIFO DATA STRUCTURE
11/372666	10-Mar-06	WARP COMPENSATED PACKAGE AND METHOD
11/311587	16-Dec-05	TRANSISTOR WITH IMMERSED CONTACTS AND METHODS OF FORMING THEREOF
12/282487	13-Mar-06	A METHOD AND DEVICE FOR PROCESSING FRAMES
12/278485	09-Feb-06	DEVICE AND METHOD FOR TESTING A NOISE IMMUNITY CHARACTERISTIC OF ANALOG CIRCUITS
12/110009	25-Apr-08	BARRIER FOR USE IN 3-D INTEGRATION OF CIRCUITS
12/209477	12-Sep-08	MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
11/▇▇▇▇▇▇	29-Mar-06	ERROR CORRECTION DEVICE AND METHODS THEREOF
11/609077	11-Dec-06	CELL PHONE DEVICE
12/282491	15-Mar-06	METHOD AND APPARATUS FOR ENHANCED DATA RATE ADAPTATION AND LOWER POWER CONTROL IN A WLAN SEMICONDUCTOR CHIP
11/476973	27-Jun-06	MULTIPLE KEY SECURITY AND METHOD FOR ELECTRONIC DEVICES
12/512616	30-Jul-09	NOISE ISOLATION BETWEEN CIRCUIT BLOCKS IN AN INTEGRATED CIRCUIT CHIP
11/627725	26-Jan-07	METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING HIGH VOLTAGE TRANSISTORS, NON-VOLATILE MEMORY TRANSISTORS, AND LOGIC TRANSISTORS
11/620075	05-Jan-07	LIGHT ERASABLE MEMORY AND METHOD THEREFOR
11/601127	15-Nov-06	VARIABLE RESURF SEMICONDUCTOR DEVICE AND METHOD
11/859696	21-Sep-07	SDRAM SHARING USING A CONTROL SURROGATE
12/091693	25-Oct-05	METHOD FOR TESTING A SLURRY USED TO FORM A SEMICONDUCTOR DEVICE
11/404714	13-Apr-06	TRANSISTOR AND METHOD WITH DUAL LAYER PASSIVATION
11/422063	02-Jun-06	SYSTEM AND METHOD FOR IMPLEMENTING ACLS USING STANDARD LPM ENGINE
12/243543	01-Oct-08	PROCESS OF USING A POLISHING APPARATUS INCLUDING A PLATEN WINDOW AND A POLISHING PAD
11/368729	06-Mar-06	ENHANCED TONE DETECTOR INCLUDING ADAPTIVE MULTI-BANDPASS FILTER FOR TONE DETECTION AND ENHANCEMENT
11/261480	31-Oct-05	DATA SCAN MECHANISM
12/301472	29-May-06	METHOD AND DEVICE FOR SWITCHING DATA
12/160006	04-Jan-06	METHOD FOR MANAGING UNDER-RUNS AND A DEVICE HAVING UNDER-RUN MANAGEMENT CAPABILITIES
12/390549	23-Feb-09	INTEGRATED MATCHING NETWORKS AND RF DEVICES THAT INCLUDE AN INTEGRATED MATCHING NETWORK
12/281927	13-Mar-06	DEVICE AND METHOD FOR TESTING A DEVICE
11/458902	20-Jul-06	TWISTED DUAL-SUBSTRATE ORIENTATION (DSO) SUBSTRATES
12/526397	09-Feb-07	DEVICE AND METHOD FOR TESTING A CIRCUIT
11/476966	27-Jun-06	SYSTEM AND METHOD FOR EVM SELF-TEST
11/686943	15-Mar-07	WIRELESS COMMUNICATION DEVICE AND METHOD OF SETTING INDIVIDUAL INFORMATION THEREIN
12/099794	09-Apr-08	LEAD FRAME FOR SEMICONDUCTOR PACKAGE
11/669556	31-Jan-07	LOCALIZED ALLOYING FOR IMPROVED BOND RELIABILITY
11/671048	05-Feb-07	ELECTRONIC DEVICE WITH CONNECTION BUMPS
11/782992	25-Jul-07	DYNAMIC FREQUENCY SELECTION IN WIRELESS DEVICES
12/305159	13-Jul-06	TRANSMITTING DEVICE AND METHOD OF TUNING THE TRANSMITTING DEVICE
12/299989	09-May-06	DATA COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD FOR BUFFERING DATA
12/305328	22-Jun-06	METHOD AND SYSTEM OF GROUPING INTERRUPTS FROM A TIME-DEPENDENT DATA STORAGE MEANS

146


Appl No.	Appl Date	Title
11/424767	16-Jun-06	SYSTEM AND METHOD FOR SHARING RESET AND BACKGROUND COMMUNICATION ON A SINGLE MCU PIN
11/966087	28-Dec-07	CADDIE-CORNER SINGLE PROOF MASS XYZ MEMS TRANSDUCER
12/377807	23-Aug-06	PROTECTION CIRCUIT APPARATUS
12/304852	23-Jun-06	VOLTAGE REGULATION APPARATUS AND METHOD OF REGULATING A VOLTAGE
12/304197	20-Jun-06	METHOD FOR TRANSMITTING A DATUM FROM A TIME-DEPENDENT DATA STORAGE MEANS
12/304849	03-Jul-06	ELECTROSTATIC DISCHARGE PROTECTION APPARATUS AND METHOD THEREFOR
12/305103	11-Jul-06	RECEIVER FOR RECEIVING AT LEAST TWO TYPES OF SIGNALS, DATA COMMUNICATION SYSTEM AND VEHICLE INCLUDING A RECEIVER
12/304192	20-Jun-06	METHOD AND SYSTEM FO SIGNAL ERROR DETERMINATION AND CORRECTION IN A FLEXRAY COMMUNICATION SYSTEM
11/512483	30-Aug-06	MULTIPLE SENSOR THERMAL MANAGEMENT FOR ELECTRONIC DEVICES
12/598307	11-May-07	DIGITAL SQUIB DRIVER CIRCUIT
12/▇▇▇▇▇▇	27-Mar-06	APPARATUS AND METHOD FOR PROVIDING A CLOCK SIGNAL
12/375855	01-Aug-06	DATA COMMUNICATION SYSTEM AND METHOD
11/682674	06-Mar-07	TECHNIQUE FOR IMPROVING EFFICIENCY OF A LINEAR VOLTAGE REGULATOR
12/507497	22-Jul-09	CAPACITIVE SENSORS AND METHODS FOR REDUCING NOISE THEREIN
11/510368	25-Aug-06	DATA STREAM PROCESSING METHOD AND SYSTEM
12/527372	16-Feb-07	REQUEST CONTROLLER, PROCESSING UNIT, ARRANGEMENT, METHOD FOR CONTROLLING REQUESTS AND COMPUTER PROGRAM PRODUCT
11/680218	28-Feb-07	OSCILLATOR DEVICES AND METHODS THEREOF
12/515242	21-Nov-06	MEMORY SYSTEM WITH ECC-UNIT AND FURTHER PROCESSING ARRANGEMENT
12/305329	20-Jun-06	METHOD AND APPARATUS FOR TRANSMITTING DATA IN A FLEXRAY NODE
12/305107	05-Jul-06	IMPROVEMENTS IN OR RELATING TO BUFFER MANAGEMENT
12/514039	08-Nov-06	DATA COMMUNICATION SYSTEM AND METHOD
12/098883	07-Apr-08	CONVERTER WITH IMPROVED EFFICIENCY
11/747360	11-May-07	APPARATUS FOR OPTIMIZING DIODE CONDUCTION TIME DURING A DEAD TIME INTERVAL
11/859602	21-Sep-07	SINGLE-INDUCTOR MULTIPLE-OUTPUT DC/DC CONVERTER METHOD
11/513639	31-Aug-06	DIRECT MEMORY ACCESS DEVICE AND METHODS
11/626924	25-Jan-07	METHOD AND APPARATUS FOR CLOSED LOOP OFFSET CANCELLATION
11/668472	30-Jan-07	METHOD AND APPARATUS FOR CONTROLLING LIGHT EMITTING DIODE
11/551145	19-Oct-06	SIGNAL DETECTION DEVICE AND METHODS THEREOF
11/838696	14-Aug-07	MODE TRANSITIONING IN A DC/DC CONVERTER USING A CONSTANT DUTY CYCLE DIFFERENCE
11/550518	18-Oct-06	SECURE COMMUNICATION PROTOCOL AND METHOD THEREFOR
12/597132	26-Apr-07	DIAGNOSIS FOR MIXED SIGNAL DEVICE FOR USE IN A DISTRIBUTED SYSTEM
11/670846	02-Feb-07	VIDEO DE-INTERLACER USING MOTION RESIDUE COMPENSATION
11/696610	04-Apr-07	VIDEO DE-INTERLACER USING PIXEL TRAJECTORY
12/595378	23-Apr-07	CIRCUIT, INTEGRATED CIRCUIT AND METHOD FOR DISSIPATING HEAT FROM AN INDUCTIVE LOAD
12/597006	27-Apr-07	INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND ESD PROTECTION THEREFOR
11/678971	26-Feb-07	ADAPTIVE THRESHOLD WAFER TESTING DEVICE AND METHOD THEREOF
11/755448	31-May-07	INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL BLOCKS
11/677127	21-Feb-07	MULTIPLE AXIS TRANSDUCER WITH MULTIPLE SENSING RANGE CAPABILITY
12/595362	18-Apr-07	DATA PROCESSING CONTROL UNIT, METHOD FOR CONTROLLING DATA PROCESSING OPERATIONS AND DATA PROCESSING SYSTEM
12/669520	24-Jul-07	START-UP CIRCUIT ELEMENT FOR A CONTROLLED ELECTRICAL SUPPLY
11/550558	18-Oct-06	METHOD AND APPARATUS FOR UPDATING A COUNT VALUE
11/753851	25-May-07	STRESS-ISOLATED MEMS DEVICE AND METHOD THEREFOR
12/513089	14-May-07	NETWORK AND METHOD FOR SETTING A TIME-BASE OF A NODE IN THE NETWORK
12/446922	25-Oct-06	INTEGRATED CIRCUIT HAVING A MICROCONTROLLER UNIT AND METHODS OF OPERATION THEREFOR
11/828023	25-Jul-07	TECHNIQUES FOR DETECTING OPEN INTEGRATED CIRCUIT PINS
12/599994	25-May-07	DATA PROCESSING SYSTEM, DATA PROCESSING METHOD, AND APPARATUS
11/960154	19-Dec-07	ELECTRONIC DEVICE OPERABLE TO PROTECT A POWER TRANSISTOR WHEN USED IN CONJUNCTION WITH A TRANSFORMER
12/594229	06-Apr-07	[IMPROVEMENTS IN OR] RELATING TO DIAGNOSTICS OF A CAPACITIVE SENSOR
12/596253	26-Apr-07	MICROCONTROLLER UNIT AND METHOD THEREFOR
12/▇▇▇▇▇▇	31-Mar-08	CURRENT DRIVER SUITABLE FOR USE IN A SHARED BUS ENVIRONMENT

147


Appl No.	Appl Date	Title
12/130164	30-May-08	DIFFERENTIAL CURRENT SENSOR DEVICE AND METHOD
11/971795	09-Jan-08	MULTIPLE FUNCTION SWITCHING REGULATOR FOR USE IN MOBILE ELECTRONIC DEVICES
11/874400	18-Oct-07	TOUCH PANEL DETECTION CIRCUITRY AND METHOD OF OPERATION
11/764810	19-Jun-07	RECORDING MEDIUM DETECTION DEVICE
11/966103	28-Dec-07	LIQUID LEVEL SENSING DEVICE AND METHOD
11/942149	19-Nov-07	DUAL SENSOR SYSTEM HAVING FAULT DETECTION CAPABILITY
11/929194	30-Oct-07	CIRCUIT FOR PROVIDING AN APPROXIMATELY CONSTANT RESISTANCE AND/OR CURRENT AND METHOD THEREFOR
12/142948	20-Jun-08	VOLTAGE REGULATOR DEVICE AND METHOD THEREOF
11/932099	31-Oct-07	METHOD OF ANTI-STICTION DIMPLE FORMATION UNDER MEMS
11/951924	06-Dec-07	ERROR DETECTOR IN A CACHE MEMORY USING CONFIGURABLE WAY REDUNDANCY
11/959250	18-Dec-07	DATA ARBITRATION ON A BUS TO DETERMINE AN EXTREME VALUE
12/040221	29-Feb-08	METHOD AND APPARATUS FOR MASKING DEBUG RESOURCES
11/959922	19-Dec-07	SENSOR DEVICE AND METHOD THEREOF
12/040215	29-Feb-08	METHOD AND APPARATUS FOR SHARING DEBUG RESOURCES
12/115825	06-May-08	DEVICE AND TECHNIQUE FOR TRANSISTOR WELL BIASING
12/141213	18-Jun-08	SYSTEM AND METHOD FOR ESTABLISHING A WPAN WITH PRECISE LOCATIONING CAPABILITY
12/136861	11-Jun-08	SMAR/ACTIVE RFID TAG FOR USE IN A WPAN
11/935023	05-Nov-07	INITIATION OF HIGH SPEED OVERLAY MODE FOR BURST DATA AND REAL TIME STREAMING (AUDIO) APPLICATIONS
12/145004	24-Jun-08	TOUCH SCREEN DETECTION AND DIAGNOSTICS
12/035961	22-Feb-08	DATA PROCESSOR DEVICE HAVING TRACE CAPABILITIES AND METHOD
12/035967	22-Feb-08	DATA PROCESSOR DEVICE SUPPORTING SELECTABLE EXCEPTIONS AND METHOD THEREOF
12/035969	23-Jun-98	DATA PROCESSING DEVICE AND METHOD THEREOF
12/032286	15-Feb-08	PERIPHERAL MODULE REGISTER ACCESS METHODS AND APPARATUS
12/107515	22-Apr-08	VEHICULAR SEATBELT RESTRAINT WITH SELECTIVELY DISABLED INERTIA REEL ASSEMBLY
12/129548	29-May-08	CAPACITIVE SENSOR WITH STRESS RELIEF THAT COMPENSATES FOR PACKAGE STRESS
12/098113	04-Apr-08	AN ULTRA LOW POWER SERVO-CONTROLLED SINGLE CLOCK RAMP GENERATOR WITH AMPLITUDE INDEPENDENT TO CLOCK FREQUENCY
12/102645	14-Apr-08	RESONANT ACCELEROMETER WITH LOW SENSITIVITY TO PACKAGE STRESS
12/▇▇▇▇▇▇	26-Mar-08	LED DRIVER WITH DYNAMIC POWER MANAGEMENT
12/▇▇▇▇▇▇	16-Jul-09	LED DRIVER WITH DYNAMIC POWER MANAGEMENT
12/▇▇▇▇▇▇	08-Apr-08	LEADFRAME FOR PACKAGED ELECTRONIC DEVICE WITH ENHANCED MOLD LOCKING CAPABILITY
12/170436	10-Jul-08	SPOOL BRAKING DEVICE FOR FISHING REEL
12/133992	05-Jun-08	ELECTRONIC DEVICE INCLUDING A RESISTOR-CAPACITOR FILTER AND A PROCESS OF FORMING THE SAME
11/959057	18-Dec-07	METHOD AND CONTROLLER FOR DETECTING A STALL CONDITION IN A STEPPING MOTOR DURING MICRO-STEPPING
12/102601	14-Apr-08	SPRING MEMBER FOR USE IN A MICROELECTROMECHANICAL SYSTEMS SENSOR
12/141423	18-Jun-08	VOLTAGE REFERENCE DEVICE AND METHODS THEREOF
12/▇▇▇▇▇▇	31-Jul-08	LED DRIVER WITH FRAME-BASED DYNAMIC POWER MANAGEMENT
12/▇▇▇▇▇▇	30-May-08	SEMICONDUCTOR DEVICE WITH REDUCED SENSITIVITY TO PACKAGE STRESS
11/829956	30-Jul-07	MEMORY ACCESS CONTROLLER AND METHOD THEREOF
11/838209	13-Aug-07	APPLICATION PROCESSOR CIRCUIT INCORPORATING BOTH SD HOST AND SLAVE FUNCTIONS AND ELECTRONIC DEVICE INCLUDING SAME
12/057989	28-Mar-08	HARDWARE MANAGED CONTEXT SENSITIVE INTERRUPT PRIORITY LEVEL CONTROL
11/535679	27-Sep-06	METHODS FOR OPPORTUNISTIC MULTI-USER BEAMFORMING IN COLLABORATIVE MIMO-SDMA
11/535702	27-Sep-06	METHODS FOR OPTIMAL COLLABORATIVE MIMO-SDMA
11/589874	31-Oct-06	SYSTEM AND METHOD FOR GENERATING MIMO SIGNALS
11/536280	28-Sep-06	GENERALIZED CODEBOOK DESIGN METHOD FOR LIMITED FEEDBACK SYSTEMS
11/529311	29-Sep-06	METHOD AND DEVICE FOR OPERATING A PRECODED MIMO SYSTEM
11/421007	30-May-06	SCALABLE RATE CONTROL SYSTEM FOR A VIDEO ENCODER
12/376071	03-Aug-06	DEVICE AND METHOD FOR TIMING ERROR MANAGEMENT
12/051450	19-Mar-08	POWER AMPLIFIERS HAVING IMPROVED STARTUP LINEARIZATION AND RELATED OPERATING METHODS
11/747087	30-Apr-07	METHOD AND SYSTEM FOR CONTROLLING TRANSMISSION AND EXECUTION OF COMMANDS IN AN INTEGRATED CIRCUIT DEVICE

148


Appl No.	Appl Date	Title
11/334606	18-Jan-06	PILOT SIGNAL IN AN FDMA COMMUNICATION SYSTEM
11/346649	03-Feb-06	COMMUNICATION SYSTEM WITH MIMO CHANNEL ESTIMATION USING PEAK-LIMITED PILOT SIGNALS
12/445021	13-Oct-06	IMAGE PROCESSING APPARATUS FOR SUPERIMPOSING WINDOWS DISPLAYING VIDEO DATA HAVING DIFFERENT FRAME RATES
12/376074	03-Aug-06	DEVICE AND METHOD FOR POWER MANAGEMENT
12/527733	19-Feb-07	DATA COMMUNICATION UNIT, DATA COMMUNICATION NETWORK AND METHOD OF DECODING
12/300447	24-May-06	METHOD AND SYSTEM FOR STORING DATA FROM A PLURALITY OF PROCESSORS
12/598294	10-May-07	VIDEO PROCESSING SYSTEM, INTEGRATED CIRCUIT, SYSTEM FOR DISPLAYING VIDEO, SYSTEM FOR GENERATING VIDEO, METHOD FOR CONFIGURING A VIDEO PROCESSING SYSTEM, AND COMPUTER PROGRAM PRODUCT
12/523934	22-Jan-07	CALIBRATION SIGNAL GENERATOR
12/160005	05-Jan-06	METHOD FOR SYNCHRONIZING A TRANSMISSION OF INFORMATION AND A DEVICE HAVING SYNCHRONIZING CAPABILITIES
11/846527	29-Aug-07	METHOD AND SYSTEM OF EXECUTING A SOFTWARE APPLICATION IN HIGHLY CONSTRAINED MEMORY SITUATION
12/305160	12-Jul-06	A METHOD FOR GAMMA CORRECTION AND A DEVICE HAVING GAMMA CORRECTION CAPABILITIES
11/589877	31-Oct-06	SYSTEM AND METHOD FOR REDUCING EDGE EFFECT
12/183762	31-Jul-08	METHOD OF PROVIDING A DATA SIGNAL FOR CHANNEL ESTIMATION AND CIRCUIT THEREOF
11/424278	15-Jun-06	IMAGE AND VIDEO MOTION STABILIZATION SYSTEM
12/013478	14-Jan-08	METHOD AND SYSTEM FOR ESTIMATING POWER CONSUMPTION OF INTEGRATED CIRCUIT DESIGN
12/375796	02-Aug-06	METHOD FOR PROCESSING CDMA SIGNALS AND A DEVICE HAVING CDMA SIGNAL CAPABILITIES
11/649076	03-Jan-07	REDUCING A PEAK-TO-AVERAGE RATIO OF A SIGNAL USING FILTERING
12/532784	27-Mar-07	METHOD AND APPARATUS FOR VARYING A DYNAMIC RANGE
11/420551	26-May-06	METHOD OF STIMULATING DIE CIRCUITRY AND STRUCTURE THEREFOR
12/593514	04-Apr-07	INTEGRATED CIRCUIT COMPRISING ERROR CORRECTION LOGIC, AND A METHOD OF ERROR CORRECTION
12/441313	25-Sep-06	MOBILE COMMUNICATIONS DEVICE, CONTROLLER, AND METHOD FOR CONTROLLING A MOBILE COMMUNICATIONS DEVICE
12/304854	22-Jun-06	[A] METHOD AND DEVICE FOR POWER MANAGEMENT
12/375858	01-Aug-06	DATA COMMUNICATION WITH CONTROL OF THE TRANSMISSION RATE OF DATA
12/376557	08-Aug-06	REAL TIME CLOCK MONITORING METHOD AND SYSTEM
12/445029	13-Oct-06	ANALOGUE-TO-DIGITAL CONVERTER APPARATUS AND METHOD OF REUSING AN ANALOGUE-TO-DIGITAL CONVERTER CICRCUIT
12/531912	26-Mar-07	[IMPROVEMENTS RELATING TO] ANALOGUE TO DIGITAL CONVERTERS
11/745875	08-May-07	CIRCUIT AND METHOD FOR GENERATING FIXED POINT VECTOR DOT PRODUCT AND MATRIX VECTOR VALUES
11/854547	13-Sep-07	SYSTEM AND METHOD FOR TESTING MEMORY BLOCKS IN AN SOC DESIGN
11/532327	15-Sep-06	LOCALIZED CONTENT ADAPTIVE FILTER FOR LOW POWER SCALABLE IMAGE PROCESSING
11/956341	14-Dec-07	METHOD AND APPARATUS FOR GEOMETRIC TRANSFORMATION IN VIDEO REPRODUCTION
12/444069	06-Oct-06	[IMPROVEMENTS IN OR RELATING TO] HEADSETS
12/521862	02-Jan-07	WIRELESS COMMUNICATION DEVICE, INTEGRATED CIRCUIT AND METHOD OF TIMING SYNCHRONISATION
11/678440	23-Feb-07	TECHNIQUES FOR OPERATING A PROCESSOR SUBSYSTEM
11/621487	09-Jan-07	HANDHELD DEVICE FOR DIALING OF PHONE NUMBERS EXTRACTED FROM A VOICEMAIL
12/203480	03-Sep-08	HANDHELD DEVICE FOR TRANSMITTING A VISUAL FORMAT MESSAGE
11/683630	08-Mar-07	SUCCESSIVE INTERFERENCE CANCELLATION BASED ON THE NUMBER OF RETRANSMISSIONS
12/522047	09-Jan-07	ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD FOR SELECTING OF AN OPTIMAL SAMPLING CLOCK PHASE
12/599126	11-May-07	SYSTEM AND METHOD FOR SECURE REAL TIME CLOCKS
11/539522	06-Oct-06	SCALING VIDEO PROCESSING COMPLEXITY BASED ON POWER SAVINGS FACTOR
12/522043	09-Jan-07	ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR
12/522045	11-Jan-07	COMMUNICATION DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR
12/518852	15-Dec-06	TEST UNIT FOR TESTING THE FREQUENCY CHARACTERISTIC OF A TRANSMITTER
12/221548	31-Jul-08	RECOVERING SYMBOLS IN A COMMUNICATION RECEIVER
11/846196	28-Aug-07	TEMPORAL SCALABILITY FOR LOW DELAY SCALABLE VIDEO CODING
11/513365	31-Aug-06	SYSTEM AND METHOD FOR DEVICE TESTING
11/532417	15-Sep-06	VIDEO INFORMATION PROCESSING SYSTEM WITH SELECTIVE CHROMA ▇▇▇▇▇▇▇ FILTERING

149


Appl No.	Appl Date	Title
11/830458	30-Jul-07	ADAPTIVE ANTENNA SYSTEM SIGNAL DETECTION
11/726318	21-Mar-07	ADAPTIVE EQUALIZER FOR COMMUNICATION CHANNELS
11/674478	13-Feb-07	SELF-TEST STRUCTURE AND METHOD OF TESTING A DIGITAL INTERFACE
11/457380	13-Jul-06	A DIRECT DIGITAL SYNTHESIS CIRCUIT
11/649136	03-Jan-07	REDUCING A PEAK-TO-AVERAGE RATIO OF A SIGNAL
11/621420	09-Jan-07	DIGITAL CLOCK GENERATING CIRCUIT AND METHOD OF OPERATION
12/440663	11-Sep-06	METHOD OF CONTROL SLOPE REGULATION AND CONTROL SLOPE REGULATION APPARATUS
11/895147	23-Aug-07	PER-SURVIVOR BASED ADAPTIVE EQUALIZER
11/589897	31-Oct-06	METHODS AND APPARATUS FOR ROUND TRIP TIME MEASUREMENTS
11/620540	05-Jan-07	METHOD AND SYSTEM FOR SAMPLING VIDEO DATA
11/752938	24-May-07	METHOD AND SYSTEM FOR SIMULTANEOUS READS OF MULTIPLE ARRAYS
11/785610	19-Apr-07	SYSTEM AND METHOD FOR OPERATING A COMMUNICATIONS SYSTEM
11/774690	09-Jul-07	IMAGE DATA UP SAMPLING
12/523933	22-Jan-07	VERY LOW INTERMEDIATE FREQUENCY (VLIF) RECEIVER
11/711704	28-Feb-07	DUAL-MODE SYSTEM AND METHOD FOR RECEIVING WIRELESS SIGNALS
11/711705	28-Feb-07	SYSTEM AND METHOD FOR MONITORING NETWORK TRAFFIC
11/529305	29-Sep-06	SYSTEM AND METHOD FOR TRANSLUCENT BRIDGING
11/954243	12-Dec-07	SHORT CIRCUIT AND OVER-VOLTAGE PROTECTION FOR A DATA BUS
12/528819	21-Mar-07	METHOD AND APPARATUS FOR CONVERTING SIGNALS
11/550534	18-Oct-06	CONTROLLING THE BANDWIDTH OF AN ANALOG FILTER
11/733610	10-Apr-07	DISCRETE DITHERED FREQUENCY PULSE WIDTH MODULATION
11/730258	30-Mar-07	SYSTEM AND METHOD FOR DETERMINING SIGNAL PHASE
11/465976	21-Aug-06	POWER DE-RATING REDUCTION IN A TRANSMITTER
11/608616	08-Dec-06	ADAPTIVE DISABLING OF ▇▇▇▇▇▇▇ FILTERING BASED ON A CONTENT CHARACTERISTIC OF VIDEO INFORMATION
11/678422	23-Feb-07	JOINT DE-SPREADING AND FREQUENCY CORRECTION USING A CORRELATOR
11/779499	18-Jul-07	APPARATUS AND METHOD FOR DECODING BURSTS OF CODED INFORMATION
11/981375	31-Oct-07	REMOTELY MODIFYING DATA IN MEMORY IN A MOBILE DEVICE
11/896184	30-Aug-07	SYSTEM AND METHOD FOR EQUALIZING AN INCOMING SIGNAL
12/528264	22-Feb-07	METHOD OF OPTIMISING THE RANK OF A MMSE CHANNEL EQUALISER
12/531914	26-Mar-07	ANTICIPATION OF POWER ON OF A MOBILE DEVICE
11/673163	09-Feb-07	SINGLE CARRIER FREQUENCY DIVISION MULTIPLE ACCESS RECEIVER FOR MIMO SYSTEMS
11/537948	02-Oct-06	FEEDBACK REDUCTION FOR MIMO PRECODED SYSTEM BY EXPLOITING CHANNEL CORRELATION
11/833669	03-Aug-07	FEEDBACK SCHEDULING TO REDUCE FEEDBACK RATES IN MIMO SYSTEMS
11/537902	02-Oct-06	MIMO PRECODING ENABLING SPATIAL MULTIPLEXING, POWER ALLOCATION AND ADAPTIVE MODULATION AND CODING
11/541710	02-Oct-06	RESOURCE ALLOCATION IN MULTI DATA STREAM COMMUNICATION LINK
11/567020	05-Dec-06	HIGH PASS FILTER
12/002903	19-Dec-07	SWITCHING COMMUNICATION NETWORKS IN A MOBILE DEVICE
11/755960	31-May-07	SYSTEMS, APPARATUS, AND METHODS FOR PERFORMING DIGITAL PRE-DISTORTION WITH FEEDBACK SIGNAL ADJUSTMENT
11/693897	30-Mar-07	SYSTEMS, APPARATUS AND METHODS FOR PERFORMING DIGITAL PRE-DISTORTION BASED ON LOOKUP TABLE GAIN VALUES
11/540784	29-Sep-06	CELL IDENTIFIER ENCODING AND DECODING METHODS AND APPARATUS
11/532701	18-Sep-06	DYADIC SPATIAL RE-SAMPLING FILTERS FOR INTER-LAYER TEXTURE PREDICTIONS IN SCALABLE IMAGE PROCESSING
11/740697	26-Apr-07	INTEGRATED CIRCUIT WITH A PROGRAMMABLE DELAY AND A METHOD THEREOF
11/621355	09-Jan-07	RADIO FREQUENCY RECEIVER HAVING DYNAMIC BANDWIDTH CONTROL AND METHOD OF OPERATION
11/621387	09-Jan-07	FRACTIONALLY RELATED MULTIRATE SIGNAL PROCESSOR AND METHOD
11/542512	02-Oct-06	USER EQUIPMENT FREQUENCY ALLOCATION METHODS AND APPARATUS
12/118108	09-May-08	CALIBRATED QUADRATURE GENERATION FOR MULTI-GHZ RECEIVER
12/004617	21-Dec-07	INPUT BUFFER
12/518845	14-Dec-06	TRANSMISSION AND RECEPTION CHANNEL SELECTION COMMUNICATING BETWEEN A TRANSMITTER UNIT AND A RECEIVER UNIT
11/895078	23-Aug-07	GMSK-RECEIVER WITH INTERFERENCE CANCELLATION
11/895098	23-Aug-07	DIVERSITY GMSK-RECEIVER WITH INTERFERENCE CANCELLATION AND METHODS THEREIN

150


Appl No.	Appl Date	Title
11/690569	23-Mar-07	HIGH VOLTAGE PROTECTION FOR A THIN OXIDE CMOS DEVICE
11/622402	11-Jan-07	AUTOMATIC GAIN CONTROL USING MULTIPLE EQUALIZED ESTIMATES AND DYNAMIC HYSTERESIS
11/608690	08-Dec-06	SYSTEM AND METHOD OF DETERMINING DEBLOCKING CONTROL FLAG OF SCALABLE VIDEO SYSTEM FOR INDICATING PRESENTATION OF DEBLOCKING PARAMETERS FOR MULTIPLE LAYERS
11/854088	12-Sep-07	LATCH DEVICE HAVING LOW-POWER DATA RETENTION
12/532753	26-Mar-07	[A] METHOD AND APPARATUS TO RECEIVE LOCATION INFORMATION IN A DIVERSITY ENABLED RECEIVER
11/691301	26-Mar-07	SYSTEM AND METHOD FOR RECEIVING A MULTIPLE FORMAT WIRELESS SIGNAL
12/596235	26-Apr-07	UNIFIED MEMORY ARCHITECTURE AND DISPLAY CONTROLLER TO PREVENT DATA FEED UNDER-RUN
11/763914	15-Jun-07	TRANSMISSION OF PACKET DATA
12/600687	31-May-07	INTEGRATED CIRCUIT, WIRELESS COMMUNICATION UNIT AND METHOD FOR DETERMINING QUADRATURE IMBALANCE
11/766880	22-Jun-07	PULSE STATE RETENTION POWER GATING FLIP-FLOP
12/163624	27-Jun-08	DEVICE HAVING CLOCK GENERATING CAPABILITIES AND A METHOD FOR GENERATING A CLOCK SIGNAL
11/619833	04-Jan-07	NOVEL MBMS USER DETECTION SCHEME FOR 3GPP LTE
11/691349	26-Mar-07	SYSTEM AND METHOD FOR TRANSMITTING A MULTIPLE FORMAT WIRELESS SIGNAL
11/935156	05-Nov-07	HIGH SPEED OVERLAY MODE FOR BURST DATA AND REAL TIME STREAMING (AUDIO) APPLICATIONS
12/130184	30-May-08	MULTIPLE CORE SYSTEM
12/130173	30-May-08	TESTING OF MULTIPLE INTEGRATED CIRCUITS
11/849551	04-Sep-07	FAST PREDICTIVE AUTOMATIC GAIN CONTROL FOR DYNAMIC RANGE REDUCTION IN WIRELESS COMMUNICATION RECEIVER
12/600055	29-May-07	DATA PROCESSING SYSTEM, METHOD FOR PROCESSING DATA AND COMPUTER PROGRAM PRODUCT
12/600691	31-May-07	DEVICE AND METHOD FOR TRANSMITTING DATA IN A WIDEBAND WIRELESS NETWORK AND COMPUTER PROGRAM PRODUCT
11/620203	05-Jan-07	MULTI-USER MIMO-SDMA FOR FINITE RATE FEEDBACK SYSTEMS
11/927241	29-Oct-07	ADAPTIVE PRE-DISTORTION WITH INTERFERENCE DETECTION AND MITIGATION
12/488624	22-Jun-09	LOW POWER READ SCHEME FOR READ ONLY MEMORY (ROM)
12/053250	21-Mar-08	ZERO INPUT CURRENT DRAIN COMPARATOR WITH HIGH ACCURACY TRIP POINT ABOVE SUPPLY VOLTAGE
12/595372	20-Apr-07	DEVICE AND METHOD FOR STATE RETENTION POWER GATING
12/098453	07-Apr-08	METHOD AND SYSTEM FOR COMPENSATING FOR THE EFFECT OF PHASE DRIFT IN A DATA SAMPLING CLOCK
12/593519	05-Apr-07	DEVICE AND METHOD FOR SHARING CHARGE
11/863135	27-Sep-07	SYSTEM AND METHOD FOR HANDLING OR AVOIDING DISRUPTIONS IN WIRELESS COMMUNICATION
12/046324	11-Mar-08	SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION OF MEMORY IN AN I/O CONTROLLER
12/140597	17-Jun-08	HYBRID POLYPHASE AND JOINT TIME FREQUENCY DETECTION
11/691911	27-Mar-07	SIMPLIFIED ▇▇▇▇▇▇▇ FILTERING FOR REDUCED MEMORY ACCESS AND COMPUTATIONAL COMPLEXITY
11/688129	19-Mar-07	REFERENCE SIGNAL SELECTION TECHNIQUES FOR A WIRELESS COMMUNICATION SYSTEM
11/688093	19-Mar-07	CHANNEL SOUNDING TECHNIQUES FOR A WIRELESS COMMUNICATION SYSTEM
12/050622	18-Mar-08	CHANGE IN INSTRUCTION BEHAVIOR WITHIN CODE BLOCK BASED ON PROGRAM ACTION EXTERNAL THERETO
11/725423	19-Mar-07	RESOURCE ALLOCATION IN A COMMUNICATION SYSTEM
11/725422	19-Mar-07	UPLINK CONTROL CHANNEL ALLOCATION
12/014530	15-Jan-08	DYNAMIC ALLOCATION OF COMMUNICATION RESOURCES IN A WIRELESS SYSTEM
11/687441	16-Mar-07	REFERENCE SIGNALING SCHEME USING COMPRESSED FEEDFORWARD CODEBOOKS FOR MU-MIMO SYSTEMS
11/687508	16-Mar-07	GENERALIZED REFERENCE SIGNALING SCHEME FOR MU-MIMO USING ARBITRARILY PRECODED REFERENCE SIGNALS
11/746792	10-May-07	RADIO RECEIVER HAVING IGNITION NOISE DETECTOR AND METHOD THEREFOR
11/687376	16-Mar-07	CHANNEL QUALITY INDEX FEEDBACK REDUCTION FOR BROADBAND SYSTEMS
11/751771	22-May-07	RADIO RECEIVER HAVING A CHANNEL EQUALIZER AND METHOD THEREFOR
11/849124	31-Aug-07	RF CIRCUIT WITH CONTROL UNIT TO REDUCE SIGNAL POWER UNDER APPROPRIATE CONDITIONS
12/122340	16-May-08	VIRTUAL MEMORY DIRECT ACCESS (DMA) CHANNEL TECHNIQUE WITH MULTIPLE ENGINES FOR DMA CONTROLLER
12/163610	27-Jun-08	METHOD FOR PROTECTING A SECURED REAL TIME CLOCK MODULE AND A DEVICE HAVING PROTECTION CAPABILITIES

151


Appl No.	Appl Date	Title
11/688125	19-Mar-07	METHOD AND SYSTEM FOR WIRELESS COMMUNICATIONS BETWEEN BASE AND MOBILE STATIONS
12/597021	27-Apr-07	POWER SUPPLY CONTROLLER FOR MULTIPLE LIGHTING COMPONENTS
11/742291	30-Apr-07	CHANNEL SOUNDING TECHNIQUES FOR A WIRELESS COMMUNICATION SYSTEM
11/742255	30-Apr-07	TECHNIQUES FOR IMPROVING CONTROL CHANNEL ACQUISITION IN A WIRELESS COMMUNICATION SYSTEM
12/400834	10-Mar-09	METHOD AND APPARATUS FOR PERFORMING HANDOVER IN A WIRELESS COMMUNICATION SYSTEM
12/179799	25-Jul-08	SYSTEM AND METHOD FOR ARBITRATING BETWEEN MEMORY ACCESS REQUESTS
11/742280	30-Apr-07	UE-AUTONOMOUS CFI REPORTING
11/742204	30-Apr-07	SYSTEM AND METHOD FOR RESOURCE BLOCK-SPECIFIC CONTROL SIGNALING
12/154648	23-May-08	AMPLIFIER CIRCUIT HAVING DYNAMICALLY BIASED CONFIGURATION
12/032394	15-Feb-08	SCALABLE MOTION SEARCH RANGES IN MULTIPLE RESOLUTION MOTION ESTIMATION FOR VIDEO COMPRESSION
12/600007	25-May-07	WIRELESS COMMUNICATION UNIT, BASEBAND MODULE, RADIO FREQUENCY MODULE, WIRELESS TERMINAL AND COMPUTER PROGRAM PRODUCT
12/157512	11-Jun-08	ERROR CORRECTING VITERBI DECODER
12/218183	11-Jul-08	ERROR CORRECTING VITERBI DECODER
11/868711	08-Oct-07	CLOCK CIRCUIT WITH CLOCK TRANSFER CAPABILITY AND METHOD
12/079106	24-Mar-08	RECEIVER CONFIGURATION IN A PLURALITY OF MODES
12/054517	25-Mar-08	TECHNIQUES FOR REDUCING INTERFERENCE IN A COMMUNICATION SYSTEM
11/864519	28-Sep-07	GAIN CONTROL METHODS FOR WIRELESS DEVICES AND TRANSMITTERS
12/249649	10-Oct-08	GAIN CONTROL METHODS FOR WIRELESS DEVICES AND TRANSMITTERS
12/602783	13-Jun-07	WIRELESS COMMUNICATION UNIT
12/021534	29-Jan-08	HIGH PERFORMANCE CMOS RADIO FREQUENCY RECEIVER
12/119618	13-May-08	LOOP DELAY AND GAIN CONTROL METHODS IN CLOSED-LOOP TRANSMITTERS AND WIRELESS DEVICES
12/103452	15-Apr-08	RECEIVER HAVING VOLTAGE-TO-CURRENT AND CURRENT-TO-VOLTAGE CONVERTERS
12/028650	08-Feb-08	SHIELDED INTEGRATED CIRCUIT PAD STRUCTURE
12/142282	19-Jun-08	CONTROL AND DATA INFORMATION COMMUNICATION IN A WIRELESS SYSTEM
11/766888	22-Jun-07	TECHNIQUES FOR RESOURCE BLOCK MAPPING IN A WIRELESS COMMUNICATION SYSTEM
12/042216	04-Mar-08	AUTOMATIC CALIBRATION LOCK LOOP CIRCUIT AND METHOD HAVING IMPROVED LOCK TIME
12/179844	25-Jul-08	SYSTEM AND METHOD FOR POWER MANAGEMENT
11/970887	08-Jan-08	TECHNIQUES FOR COMPRESSING DIFFERENTIAL SAMPLES OF BANDWIDTH-LIMITED DATA TO REDUCE BANDWIDTH AND POWER CONSUMPTION BY AN INTERFACE
12/018354	23-Jan-08	TUNING A SECOND ORDER INTERCEPT POINT OF A MIXER IN A RECEIVER
11/838029	13-Aug-07	TECHNIQUES FOR REDUCING PRECODING OVERHEAD IN A MULTIPLE-INPUT MULTIPLE-OUTPUT WIRELESS COMMUNICATION SYSTEM
12/165073	30-Jun-08	TECHNIQUES FOR REDUCING JOINT DETECTION COMPLEXITY IN A CHANNEL-CODED MULTIPLE-INPUT MULTIPLE-OUTPUT COMMUNICATION SYSTEM
11/864066	28-Sep-07	RETRANSMISSION METHOD FOR HARQ IN MIMO SYSTEMS
11/865341	01-Oct-07	TECHNIQUES FOR REDUCING A CELL IDENTIFICATION FALSING RATE IN A WIRELESS COMMUNICATION SYSTEM
12/056652	27-Mar-08	QUARTER DUTY CYCLE PULSE GENERATOR FOR INTERLEAVED SWITCHING MIXER
12/416933	02-Apr-09	LOCK DETECTION CIRCUIT FOR PHASE LOCKED LOOP
12/220349	24-Jul-08	DIGITAL COMPLEX TONE GENERATOR AND CORRESPONDING METHODS
12/179826	25-Jul-08	[A] METHOD FOR GENERATING A OUTPUT CLOCK SIGNAL HAVING A OUTPUT CYCLE AND A DEVICE HAVING A CLOCK SIGNAL GENERATING CAPABILITIES
12/146552	26-Jun-08	TEST INTERPOSER HAVING ACTIVE CIRCUIT COMPONENT AND METHOD THEREFOR
12/140890	17-Jun-08	TECHNIQUES FOR PERFORMING DISCRETE FOURIER TRANSFORMS ON RADIX-2 PLATFORMS
12/057514	28-Mar-08	TECHNIQUES FOR CHANNEL SOUNDING IN A WIRELESS COMMUNICATION SYSTEM
12/053754	24-Mar-08	LOW LEAKAGE CURRENT AMPLIFIER
12/028720	08-Feb-08	MIXER CIRCUITS FOR SECOND ORDER INTERCEPT POINT CALIBRATION
12/059006	31-Mar-08	HYBRID TRANSISTOR BASED POWER GATING SWITCH CIRCUIT AND METHOD
12/138959	13-Jun-08	POWER AMPLIFIERS HAVING IMPROVED PROTECTION AGAINST AVALANCHE CURRENT
12/351273	09-Jan-09	CHANNEL RANK FEEDBACK IN MULTIPLE-INPUT MULTIPLE-OUTPUT COMMUNICATION SYSTEMS
11/935242	05-Nov-07	TECHNIQUES FOR SIGNALING REFERENCE SIGNAL PARAMETERS IN A WIRELESS COMMUNICATION SYSTEM
12/180947	28-Jul-08	STACKED CASCODE CURRENT SOURCE
12/028623	08-Feb-08	SPLIT CHANNEL RECEIVER WITH VERY LOW SECOND ORDER INTERMODULATION

152


Appl No.	Appl Date	Title
12/180936	28-Jul-08	BASEBAND FILTERS FOR USE IN WIRELESS COMMUNICATION DEVICES
12/106601	21-Apr-08	DC OFFSET CALIBRATION IN A DIRECT CONVERSION RECEIVER
12/117357	08-May-08	ANALOG-TO-DIGITAL CONVERTER WITH INTEGRATOR CIRCUIT FOR OVERLOAD RECOVERY
12/130590	30-May-08	CIRCUITRY AND METHOD FOR BUFFERING A POWER MODE CONTROL SIGNAL
12/155948	12-Jun-08	ULTRA WIDEBAND COMMUNICATION METHOD WITH LOW NOISE PULSE FORMATION
10/347752	22-Jan-03	SYSTEM AND METHOD FOR HANDLING ASYNCHRONOUS DATA IN A WIRELESS NETWORK
10/347751	22-Jan-03	SYSTEM AND METHOD FOR IMPROVED SYNCHRONIZATION IN A WIRELESS NETWORK
10/367834	19-Feb-03	M-ARY ORTHOGONAL CODED COMMUNICATIONS METHOD AND SYSTEM
10/546752	27-Feb-04	SYSTEM AND METHOD FOR PASSING DATA FRAMES IN A WIRELESS NETWORK
10/868903	17-Jun-04	COMMON SIGNALING MODE FOR USE WITH MULTIPLE WIRELESS FORMATS
12/000464	13-Dec-07	WIRELESS TRANSCEIVER AND METHOD OF OPERATING THE SAME
11/024804	30-Dec-04	PARALLEL RECODER FOR ULTRAWIDE BANDWIDTH RECEIVER
10/998716	30-Nov-04	SYSTEM AND METHOD FOR USING PROGRAMMABLE FREQUENCY OFFSETS IN A DATA NETWORK
12/458051	30-Jun-09	METHOD FOR SHARING BANDWIDTH USING REDUCED DUTY CYCLE SIGNALS AND MEDIA ACCESS CONTROL
11/215305	31-Aug-05	METHOD AND DEVICE FOR GENERATING HIGH FREQUENCY WAVEFORMS
11/239082	30-Sep-05	SYSTEM AND METHOD FOR CALIBRATING AN ANALOG SIGNAL PATH DURING OPERATION IN AN ULTRA WIDEBAND RECEIVER
11/237752	29-Sep-05	METHOD AND SYSTEM FOR GENERATING WAVELETS
11/252723	19-Oct-05	APPARATUS AND METHOD FOR SWITCHING CLOCKS WHILE PREVENTING GLITCHES AND DATA LOSS
11/270457	10-Nov-05	SYSTEM AND METHOD FOR CONTROLLING THE TRANSMIT POWER OF A WIRELESS MODULE
11/296502	08-Dec-05	METHOD FOR DEVICE AUTHENTICATION
12/250027	13-Oct-08	SYSTEMS AND METHODS OF PARALLEL TO SERIAL CONVERSION
12/488631	22-Jun-09	EFFICIENT WORD LINES, BIT LINE AND PRECHARGE TRACKING IN SELF-TIMED MEMORY DEVICE
10/433855	22-Oct-01	MULTIPATH COMMUNICATIONS RECEIVER
12/049984	17-Mar-08	QUALIFICATION OF CONDITIONAL DEBUG INSTRUCTIONS BASED ON ADDRESS
11/620460	05-Jan-07	REDUCTION OF BLOCK EFFECTS IN SPATIALLY RE-SAMPLED IMAGE INFORMATION FOR BLOCK-BASED IMAGE CODING
11/401797	10-Apr-06	METHODS AND APPARATUS FOR A PACKAGED MEMS SWITCH
10/066552	31-Jan-02	EXPANSION PERIPHERAL TECHNIQUES FOR PORTABLE AUDIO PLAYER
10/722998	26-Nov-03	SYSTEM AND METHOD FOR DYNAMICALLY ALLOCATING SHARED MEMORY WITHIN A MULTIPLE FUNCTION DEVICE
11/728679	26-Mar-07	METHOD AND CIRCUIT FOR USE BY A HANDHELD MULTIPLE FUNCTION DEVICE
11/852759	10-Sep-07	SYSTEM-ON-A-CHIP FOR PROCESSING MULTIMEDIA DATA AND APPLICATIONS THEREOF
10/865585	10-Jun-04	FLEXIBLE MEMORY INTERFACE SYSTEM
11/494791	27-Jul-06	CIRCUIT FOR USE WITH CELLULAR TELEPHONE WITH VIDEO FUNCTIONALITY
11/494781	27-Jul-06	Circuit for use in a multifunction handheld device with wireless host interface [USE OF A RESOURCE IDENTIFIER TO IMPORT A PROGRAM FROM EXTERNAL MEMORY FOR AN OVERLAY]
11/494790	27-Jul-06	CIRCUIT FOR USE IN MULTIFUNCTION HANDHELD DEVICE HAVING A RADIO RECEIVER
11/265047	02-Nov-05	EQUALIZATION SETTING DETERMINATION FOR AUDIO DEVICES
11/300236	14-Dec-05	AUDIO OUTPUT DRIVER FOR REDUCING ELECTROMAGNETIC INTERFERENCE AND IMPROVING AUDIO CHANNEL PERFORMANCE
11/155459	17-Jun-05	MULTI-MODE DRIVER CIRCUIT
11/155053	17-Jun-05	ANTI-POP DRIVER CIRCUIT
11/237339	28-Sep-05	RECEIVER AND METHODS FOR USE THEREWITH
11/232592	22-Sep-05	PILOT TRACKING MODULE OPERABLE TO ADJUST INTERPOLATOR SAMPLE TIMING WITHIN A HANDHELD AUDIO SYSTEM
11/287570	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
11/287551	22-Nov-05	RADIO RECEIVER, SYSTEM ON A CHIP INTEGRATED CIRCUIT AND METHODS FOR USE THEREWITH
11/126554	11-May-05	HANDHELD AUDIO SYSTEM
11/268827	08-Nov-05	PATCHING ROM CODE
11/126864	11-May-05	DIGITAL DECODER AND APPLICATIONS THEREOF
11/166872	24-Jun-05	SYSTEM AND METHOD OF USING A PROTECTED NON-VOLATILE MEMORY
11/170487	29-Jun-05	SYSTEM AND METHOD OF ROUTING AUDIO SIGNALS TO MULTIPLE SPEAKERS
11/302771	14-Dec-05	DIGITAL GAIN ADJUSTMENT IN A WIRELESS RECEIVER
11/405887	18-Apr-06	CLOCK ADJUSTMENT FOR A HANDHELD AUDIO SYSTEM

153


Appl No.	Appl Date	Title
11/294663	05-Dec-05	LOW NOISE, LOW DISTORTION RADIO RECEIVER FRONT-END
11/233081	22-Sep-05	METHOD TO ATTENUATE SPECIFIC COMPONENTS WITHIN A DATA SIGNAL
11/265867	03-Nov-05	POWER MANAGEMENT FOR A BETTERY-POWERED HANDHELD AUDIO DEVICE
11/355477	16-Feb-06	ADJUST SWITCHING RATE OF A POWER SUPPLY TO MITIGATE INTERFERENCE
11/233085	22-Sep-05	METHOD TO ADJUSTABLY CONVERT A FIRST DATA SIGNAL HAVING A FIRST TIME DOMAIN TO A SECOND DATA SIGNAL HAVING A SECOND TIME DOMAIN
11/328830	09-Jan-06	INTEGRATED CIRCUIT HAVING RADIO RECEIVER AND METHODS FOR USE THEREWITH
11/227357	15-Sep-05	RADIO RECEIVER WITH STEREO DECODER AND METHOD FOR USE THEREWITH
11/240581	30-Sep-05	SYSTEM AND METHOD OF MEMORY BLOCK MANAGEMENT
11/356338	16-Feb-06	DECIMATION FILTER
11/242404	03-Oct-05	METHOD AND SYSTEM FOR RECEIVING AND DECODING AUDIO SIGNALS
11/386873	22-Mar-06	SAMPLE RATE CONVERTER
11/262903	31-Oct-05	SYSTEM AND METHOD FOR ACCESSING DATA FROM A MEMORY DEVICE
11/241682	30-Sep-05	SYSTEM AND METHOD FOR SYSTEM RESOURCE ACCESS
11/344272	31-Jan-06	BATTERYING NOISE CANCELING HEADPHONES, AUDIO DEVICE AND METHODS FOR USE THEREWITH
11/507378	21-Aug-06	PROCESSING SYSTEM AND METHODS FOR USE THEREWITH
11/352690	13-Feb-06	INTEGRATED CIRCUIT, UNIVERSAL SERIAL BUS ON-THE-GO POWER SOURCE AND METHODS FOR USE THEREWITH
11/344274	31-Jan-06	DIGITAL MICROPHONE INTERFACE, AUDIO CODEC AND METHODS FOR USE THEREWITH
11/244468	06-Oct-05	WIRELESS HANDSET AND METHODS FOR USE THEREWITH
11/340441	26-Jan-06	WIRELESS HANDSET AND METHODS FOR USE THEREWITH
11/388675	24-Mar-06	COMPARATIVE SIGNAL STRENGTH DETECTION
12/127623	27-May-08	AUTOMATICALLY DISABLING INPUT/OUTPUT SIGNAL PROCESSING BASED ON THE REQUIRED MULTIMEDIA FORMAT
11/472034	21-Jun-06	INFRARED RECEIVER, INFRARED BRIDGE DEVICE AND METHODS FOR USE THEREWITH
11/304306	14-Dec-05	TOUCH SCREEN DRIVER AND METHODS FOR USE THEREWITH
11/402648	11-Apr-06	BUFFER CONTROLLER, CODEC AND METHODS FOR USE THEREWITH
11/286845	22-Nov-05	AUDIO OUTPUT DRIVER AND METHODS FOR USE THEREWITH
11/312672	19-Dec-05	DIGITAL SECURITY SYSTEM
12/016577	18-Jan-08	ECC SHORTCUT FOR FLASH
11/389780	27-Mar-06	HEADPHONE DRIVER AND METHODS FOR USE THEREWITH
11/350487	09-Feb-06	MASS STORAGE DEVICE, MASS STORAGE CONTROLLER AND METHODS FOR USE THEREWITH
11/436937	18-May-06	NON-VOLATILE MEMORY ERROR CORRECTION SYSTEM AND METHOD
11/641995	19-Dec-06	DEMODULATOR SYSTEM AND METHOD
11/641564	19-Dec-06	DIGITAL AUDIO PROCESSING SYSTEM AND METHOD
11/500632	07-Aug-06	SYSTEM AND METHOD OF PROCESSING COMPRESSED AUDIO DATA
11/365231	01-Mar-06	CODEC INTEGRATED CIRCUIT, CODEC AND METHODS FOR USE THEREWITH
11/389778	27-Mar-06	AUDIO AMPLIFIER AND METHODS FOR USE THEREWITH
12/194435	19-Aug-08	AUDIO SIGNAL PROCESSING SYSTEM AND METHOD
11/796979	30-Apr-07	GAIN CONTROL MODULE AND APPLICATIONS THEREOF
11/544501	06-Oct-06	HANDHELD DEVICE, INTEGRATED CIRCUIT AND METHODS FOR PLAYING SPONSOR INFORMATION WITH THE PLAYBACK OF PROGRAM CONTENT
11/644523	22-Dec-06	SYSTEM AND METHOD OF SIGNAL PROCESSING
11/796057	26-Apr-07	DIGITAL PLL AND APPLICATIONS THEREOF
11/728193	23-Mar-07	WIRELESS TRANSCEIVER AND METHOD FOR USE THEREWITH
11/728263	23-Mar-07	WIRELESS HANDSET AND WIRELESS HEADSET WITH WIRELESS TRANSCEIVER
11/701628	02-Feb-07	DEVICE, SYSTEM AND METHOD FOR CONTROLLING MEMORY OPERATIONS
11/726943	23-Mar-07	SYSTEM AND METHOD TO CONTROL ONE TIME PROGRAMMABLE MEMORY
11/704656	09-Feb-07	SYSTEM AND METHOD FOR CONTROLLING MEMORY OPERATIONS
11/799363	01-May-07	SYSTEM ON A CHIP WITH RTC POWER SUPPLY
11/789763	25-Apr-07	SYSTEM ON A CHIP WITH RTC POWER SUPPLY
11/789760	25-Apr-07	SOC WITH LOW POWER AND PERFORMANCE MODES
11/863662	28-Sep-07	MULTIMEDIA SOC WITH ADVANCED JACK SENSE APPLICATIONS
11/825841	09-Jul-07	SYSTEM AND METHOD FOR DEMODULATING AUDIO SIGNALS
11/862312	27-Sep-07	CLOCK SYSTEM AND APPLICATIONS THEREOF

154


Appl No.	Appl Date	Title
11/927289	29-Oct-07	TOUCH SCREEN DRIVER FOR RESOLVING PLURAL CONTEMPORANEOUS TOUCHES AND METHODS FOR USE THEREWITH
12/046804	12-Mar-08	INTEGRATED CIRCUIT TEST SOCKET HAVING ELASTIC CONTACT SUPPORT AND METHODS FOR USE THEREWITH
10/346736	17-Jan-03	TEXTURE ENCODING PROCEDURE
12/406765	18-Mar-09	METHOD FOR DETERMINING DISPLAY ORDER OF VOPS IN DECODER END OF MPEG IMAGE SYSTEM AND DEVICE FOR EXECUTING THE SAME
11/546853	12-Oct-06	INTERLEAVING OF INFORMATION INTO COMPRESSED DIGITAL AUDIO STREAMS
11/732737	04-Apr-07	AUTOMATED PLAYLIST GENERATION
12/022973	30-Jan-08	EXPANSION PERIPHERAL TECHNIQUES FOR PORTABLE AUDIO PLAYER
11/171917	30-Jun-05	SEMICONDUCTOR DEVICE INCLUDING A UNIQUE IDENTIFIER AND ERROR CORRECTION CODE
10/969498	20-Oct-04	INFRARED ADAPTER WITH DATA PACKET THROTTLE
12/360628	27-Jan-09	CHARGING A SECONDARY BATTERY
11/170475	29-Jun-05	SYSTEM AND METHOD OF MANAGING CLOCK SPEED IN AN ELECTRONIC DEVICE
11/166503	24-Jun-05	INTEGRATED CIRCUIT WITH MEMORY-LESS PAGE TABLE
11/085995	22-Mar-05	METHOD AND SYSTEM FOR COMMUNICATING WITH MEMORY DEVICES [UTILIZING SELECTED TIMING PARAMETERS FROM A TIMING TABLE]

155

Schedule II

to Intellectual Property

Security Agreement

PATENTS

I. Freescale Jointly Owned U.S. Patents


Patent No.	Grant Date	Appl No.	Appl Date	Title
7349512	25-Mar-08	10/484683	24-Jul-02	CLOCK SYNCHRONIZATION IN A DISTRIBUTED SYSTEM
6690580	10-Feb-04	10/091998	07-Mar-02	INTEGRATED CIRCUIT STRUCTURE WITH DIELECTRIC ISLANDS IN METALLIZED REGIONS
6613688	02-Sep-03	10/133061	26-Apr-02	SEMICONDUCTOR DEVICE AND PROCESS FOR GENERATING AN ETCH PATTERN
6774053	10-Aug-04	10/384350	07-Mar-03	METHOD AND STRUCTURE FOR LOW-K DIELECTRIC CONSTANT APPLICATIONS
6967158	22-Nov-05	10/384398	07-Mar-03	METHOD OF FORMING A LOW-K DIELECTRIC STRUCTURE ON A SUBSTRATE
7387970	17-Jun-08	10/430987	07-May-03	METHOD OF USING AN AQUEOUS SOLUTION AND COMPOSITION THEREOF
6905967	14-Jun-05	10/401400	31-Mar-03	METHOD FOR IMPROVING PLANARITY OF SHALLOW TRENCH ISOLATION USING MULTIPLE SIMULTANEOUS TILING SYSTEMS
7199429	03-Apr-07	11/100163	06-Apr-05	SEMICONDUCTOR DEVICE HAVING AN ORGANIC ANTI-REFLECTIVE COATING (ARC) AND METHOD THEREFOR
6972255	06-Dec-05	10/628668	28-Jul-03	SEMICONDUCTOR DEVICE HAVING AN ORGANIC ANTI-REFLECTIVE COATING (ARC) AND METHOD THEREFOR
7109101	19-Sep-06	10/430711	06-May-03	CAPPING LAYER FOR REDUCING AMORPHOUS CARBON CONTAMINATION OF PHOTORESIST IN SEMICONDUCTOR DEVICE MANUFACTURE; AND PROCESSES FOR MAKING SAME
6350690	26-Feb-02	09/288646	09-Apr-99	PROCESS FOR ACHIEVING FULL GLOBAL PLANARIZATION DURING CMP OF DAMASCENE SEMICONDUCTOR STRUCTURES
6374280	16-Apr-02	09/153717	15-Sep-98	COMPUTATIONALLY EFFICIENT INVERSE DISCRETE COSINE TRANSFORM METHOD AND APPARATUS
6222944	24-Apr-01	09/286972	06-Apr-99	DOWN-SAMPLING MPEG IMAGE DECODER
6704358	09-Mar-04	09/234249	20-Jan-99	METHOD AND APPARATUS FOR RESIZING IMAGE INFORMATION
6421077	16-Jul-02	09/115937	15-Jul-98	METHOD AND APPARATUS FOR DETECTING CO-CHANNEL INTERFERENCE AND SELECTIVELY FILTERING THE INTERFERENCE WHEN DETECTED
6430243	06-Aug-02	09/143813	31-Aug-98	SYMBOL SIGN DIRECTED PHASE DETECTOR
6430234	06-Aug-02	09/124941	30-Jul-98	METHOD AND APPARATUS FOR PERFORMING PHASE DETECTION AND TIMING RECOVERY FOR A VESTIGIAL SIDEBAND RECEIVER
6680971	20-Jan-04	09/206477	07-Dec-98	PASSBAND EQUALIZER FOR A VESTIGIAL SIDEBAND SIGNAL RECEIVER
6351293	26-Feb-02	09/114310	13-Jul-98	DECISION DIRECTED PHASE DETECTOR
6456746	24-Sep-02	09/382934	25-Aug-99	METHOD OF MEMORY UTILIZATION IN A PREDICTIVE VIDEO DECODER
6449394	10-Sep-02	09/351062	09-Jul-99	PACKING VARIABLE-LENGTH CODE BITS AT FIXED POSITIONS
6414719	02-Jul-02	09/579194	26-May-00	MOTION ADAPTIVE MEDIAN FILTER FOR INTERFACE TO PROGRESSIVE SCAN CONVERSION
6516036	04-Feb-03	09/461929	15-Dec-99	METHOD AND APPARATUS FOR DECIMATING AN OVERSAMPLED SIGNAL
5077693	31-Dec-91	07/563167	01-Aug-90	DYNAMIC RANDOM ACCESS MEMORY
6345589	12-Feb-02	09/148436	04-Sep-98	METHOD AND APPARATUS FOR FORMING A BOROPHOSPHOSILICATE FILM
6000415	14-Dec-99	08/855827	12-May-97	METHOD AND APPARATUS FOR POSITIONING A RESTRICTOR SHIELD OF A PUMP IN RESPONSE TO AN ELECTRIC SIGNAL
5386715	07-Feb-95	08/161624	06-Dec-93	GAS VAPOR SENSOR [ELEMENT AND METHOD OF FORMING]
5804462	08-Sep-98	08/565285	30-Nov-95	METHOD FOR FORMING A MULTIPLE-SENSOR SEMICONDUCTOR CHIP
7429339	30-Sep-08	10/505701	06-Feb-03	MAGNETIC NANOMATERIALS AND SYNTHESIS METHOD
5325341	28-Jun-94	07/936989	31-Aug-92	DIGITAL TIMER APPARATUS AND METHOD
5872460	16-Feb-99	08/726897	04-Oct-96	FAST ACTING FET TEST CIRCUIT WITH CURRENT DETECTION FOR SIR DIAGNOSTICS
5757875	26-May-98	08/626161	01-Apr-96	METHOD OF TOOTH DETECTION

156


Patent No.	Grant Date	Appl No.	Appl Date	Title
5638798	17-Jun-97	08/618048	25-Mar-96	METHOD AND SYSTEM FOR GENERATING IGNITION COIL CONTROL PULSES
5698777	16-Dec-97	08/596858	05-Feb-96	CAMSHAFT REVOLUTION SENSING ASSEMBLY
5732381	24-Mar-98	08/618047	25-Mar-96	METHOD AND SYSTEM FOR GENERATING A FUEL PULSE WAVEFORM
5805922	08-Sep-98	08/237437	02-May-94	QUEUED SERIAL PERIPHERAL INTER FACE HAVING MULTIPLE QUEUES FOR USE IN A DATA PROCESSING SYSTEM
5699009	16-Dec-97	08/626160	01-Apr-96	ELECTRONIC FILTERING DEVICE
5754839	19-May-98	08/520066	28-Aug-95	APPARATUS AND METHOD FOR IMPLEMENTING WATCHPOINTS AND BREAKPOINTS IN A DATA PROCESSING SYSTEM
5359564	25-Oct-94	08/055897	04-May-93	CONTENT ADDRESSABLE MEMORY SYSTEM AND METHOD OF OPERATION
5761723	02-Jun-98	08/637189	08-Apr-96	DATA PROCESSOR WITH BRANCH PRE DICTION AND METHOD OF OPERATION
5805877	08-Sep-98	08/718027	23-Sep-96	DATA PROCESSOR WITH BRANCH TAR GET ADDRESS CACHE AND METHOD OF OPERATION
5692218	25-Nov-97	08/639274	25-Apr-96	SYSTEM FOR TRANSFERRING DATA BETWEEN INPUT/OUTPUT DEVICES HAVING SEPARATE ADDRESS SPACES IN ACCORDANCE WITH INITIALIZING
5420808	30-May-95	08/061397	13-May-93	CIRCUITRY AND METHOD FOR REDUCING POWER CONSUMPTION WITHIN AN ELECTRONIC CIRCUIT
5640534	17-Jun-97	08/319332	05-Oct-94	METHOD AND SYSTEM FOR CONCURRENT ACCESS IN A DATA CACHE ARRAY UTILIZING MULTIPLE MATCH LINE SELECTION PATHS
5668972	16-Sep-97	08/319202	05-Oct-94	METHOD AND SYSTEM FOR EFFICIENT MISS SEQUENCE CACHE LINE ALLOCATION utilizing an allocation control cell state to enable a selected match line
5745698	28-Apr-98	08/704035	28-Aug-96	SYSTEM AND METHOD FOR COMMUNICATING BETWEEN DEVICES
5717587	10-Feb-98	08/649753	15-May-96	METHOD AND SYSTEM FOR RECODING NONEFFECTIVE INSTRUCTIONS WITHIN A DATA PROCESSING SYSTEM
5619408	08-Apr-97	08/387145	10-Feb-95	METHOD AND SYSTEM FOR RECODING NONEFFECTIVE INSTRUCTIONS WIT HIN A DATA PROCESSING SYSTEM
5492266	20-Feb-96	08/298983	31-Aug-94	FINE PITCH SOLDER BALLS ON PRINTED CIRCUIT BOARD PROCESS AND PRODUCT
5557224	17-Sep-96	08/228470	15-Apr-94	APPARATUS AND METHOD FOR GENERATING A PHASE-CONTROLLED CLOCK SIGNAL
5671370	23-Sep-97	08/622651	25-Mar-96	ALTERNATING DATA VALID CONTROL SIGNALS FOR HIGH PERFORMANCE DATA TRANSFER
5687327	11-Nov-97	08/317007	03-Oct-94	[EFFICIENT ADDRESS TRANSFER TECHNIQUE FOR A DATA PROCESSING SYSTEM] System and method for allocating bus resources in a data processing system
5771247	23-Jun-98	08/611439	04-Mar-96	LOW LATENCY ERROR REPORTING FOR HIGH PERFORMANCE BUS
5974505	26-Oct-99	08/927131	02-Sep-97	METHOD AND SYSTEM FOR REDUCING POWER CONSUMPTION OF A NON-BLOCKING CACHE WITHIN A DATA PROCESSING SYSTEM
5737751	07-Apr-98	08/622254	26-Mar-96	CACHE MEMORY MANAGEMENT SYSTEM HAVING REDUCED RELOADS TO A SECOND LEVEL CACHE FOR ENHANCED MEMORY PERFORMANCE IN A DATA PROCESSING SYSTEM
5805916	08-Sep-98	08/758017	27-Nov-96	METHOD AND APPARATUS FOR DYNAMIC ALLOCATION OF REGISTERS FOR INTERMEDIATE FLOATING-POINT RESULTS
5787479	28-Jul-98	08/639576	29-Apr-96	METHOD AND SYSTEM FOR PREVENTING INFORMATION CORRUPTION IN A CACHE MEMORY CAUSED BY AN OCCURRENCE OF A BUS ERROR DURING A LINEFILL OPERATION
5872949	16-Feb-99	08/748459	13-Nov-96	APPARATUS AND METHOD FOR MANAGING DATA FLOW DEPENDENCIES ARISING FROM OUT-OF-ORDER EXECUTION, BY AN EXECUTION UNIT, OF AN INSTRUCTION SERIES INPUT FROM AN INSTRUCTION SOURCE
5715427	03-Feb-98	08/592143	26-Jan-96	SEMI-ASSOCIATIVE CACHE WITH MRU/LRU REPLACEMENT
5765017	09-Jun-98	08/785149	13-Jan-97	METHOD AND SYSTEM IN A DATA PROCESSING SYSTEM FOR EFFICIENT MANAGEMENT OF AN INDICATION OF A STATUS OF EACH OF MULTIPLE registers
5784606	21-Jul-98	08/768060	16-Dec-96	METHOD AND SYSTEM IN A SUPERSCALAR DATA PROCESSING SYSTEM FOR THE EFFICIENT HANDLING OF EXCEPTIONS
5974535	26-Oct-99	08/853009	09-May-97	METHOD AND SYSTEM IN A DATA PROCESSING SYSTEM OF PERMITTING CONCURRENT PROCESSING OF INSTRUCTIONS OF A PARTICULAR TYPE

157


Patent No.	Grant Date	Appl No.	Appl Date	Title
6172529	09-Jan-01	09/161893	28-Sep-98	COMPOUND DOMINO LOGIC CIRCUIT HAVING OUTPUT NOISE ELIMINATION
6055557	25-Apr-00	08/780561	08-Jan-97	AN ADDER CIRCUIT AND METHOD THEREFOR
6480800	12-Nov-02	09/246896	08-Feb-99	METHOD AND SYSTEM FOR GENERATING SELF-TESTING AND RANDOM INPUT STIMULI FOR TESTING DIGITAL SYSTEMS
6067633	23-May-00	09/052248	31-Mar-98	A DESIGN AND METHODOLOGY FOR MANUFACTURING DATA PROCESSING SYSTEMS HAVING MULTIPLE PROCESSORS
6023737	08-Feb-00	09/066014	24-Apr-98	MULTI-STAGE PIPELINED DATA COALESCING FOR IMPROVED FREQUENCY OPERATION
6269360	31-Jul-01	09/066012	24-Apr-98	OPTIMIZATION OF ORDERED STORES ON A PIPELINED BUS VIA SELF-INITIATED RETRY
6119204	12-Sep-00	09/108157	30-Jun-98	DATA PROCESSING SYSTEM AND METHOD FOR MAINTAINING TRANSLATION LOOK-ASIDE BUFFER (TLB) COHERENCY WITHOUT ENFORCING COMPLE
6189133	13-Feb-01	09/078786	14-May-98	A COUPLING NOISE REDUCTION TECHNIQUE USING RESET TIMING
6021078	01-Feb-00	09/014389	27-Jan-98	FUSE CIRCUIT AND METHOD THEREFOR WHICH MINIMIZES FUSE GROW BACK EFFECT
6240490	29-May-01	09/119310	20-Jul-98	COMPREHENSIVE MULTI-LEVEL CACHE PRELOADING MECHANISM IN A MULTIPROCESSING SIMULATION ENVIRONMENT
6141200	31-Oct-00	09/062678	20-Apr-98	STACKED PFET OFF-CHIP DRIVER WITH A LATCH BIAS GENERATOR FOR OVERVOLTAGE PROTECTION
6209073	27-Mar-01	09/066961	27-Apr-98	SYSTEM AND METHOD FOR INTERLOCKING BARRIER OPERATIONS IN LOAD AND STORE QUEUES
6134620	17-Oct-00	09/052246	31-Mar-98	Tri-state bus contention circuit preventing false switching caused by poor synchronization [IMPROVED TRI-STATE BUS CONTENT ION CIRCUIT ]
6266741	24-Jul-01	09/094905	15-Jun-98	METHOD AND APPARATUS TO REDUCE SYSTEM BUS LATENCY on a cache miss with address acknowledgments
6449738	10-Sep-02	09/204923	03-Dec-98	AN APPARATUS FOR BUS FREQUENCY INDEPENDENT WRAP I/O TESTING AND METHOD THEREFOR
6324638	27-Nov-01	09/282268	31-Mar-99	PROCESSOR HAVING VECTOR PROCESSING CAPABILITY AND METHOD FOR EXECUTING A VECTOR INSTRUCTION IN A PROCESSOR
6202130	13-Mar-01	09/061975	17-Apr-98	DATA PROCESSING SYSTEM FOR PROCESSING VECTOR DATA AND METHOD THEREFOR
5996057	30-Nov-99	09/062100	17-Apr-98	DATA PROCESSING SYSTEM AND METHOD OF PERMUTATION WITH REPLICATION WITHIN A VECTOR REGISTER FILE
6334176	25-Dec-01	09/062152	17-Apr-98	METHOD AND APPARATUS FOR GENERATING [ELEMENTS OF A SECOND VECTOR FROM A FIRST VECTOR BY GENERATING VECTOR ELEMENTS OF THE SECOND VECTOR FROM A TABLE WITH PRESELECTED OFFSET] an alignment control vector
6298365	02-Oct-01	09/256375	24-Feb-99	METHOD AND SYSTEM FOR BOUNDS COMPARATOR
6282628	28-Aug-01	09/256374	24-Feb-99	METHOD AND SYSTEM FOR A RESULT CODE FOR A SINGLE-INSTRUCTION MULTIPLE-DATA PREDICATE COMPARE OPERATION
6327651	04-Dec-01	09/149466	08-Sep-98	WIDE SHIFTING IN THE VECTOR PERMUTE UNIT
6202141	13-Mar-01	09/098063	16-Jun-98	METHOD AND APPARATUS FOR PERFORMING VECTOR MULTIPLICATION BY SPLITTING MULTIPLICATION OPERATION AMONG ODD AND EVEN DATA ELEMENTS
6375549	23-Apr-02	09/527859	17-Mar-00	POLISHING HEAD FOR WAFER, AND METHOD FOR POLISHING
6593254	15-Jul-03	10/112271	28-Mar-02	METHOD FOR CLAMPING A SEMICONDUCTOR DEVICE IN A MANUFACTURING PROCESS
6752694	22-Jun-04	10/290907	08-Nov-02	APPARATUS FOR AND METHOD OF WAFER GRINDING
6290491	18-Sep-01	09/607155	29-Jun-00	METHOD FOR HEATING A SEMICONDUCTOR WAFER IN A PROCESS CHAMBER BY A SHOWER HEAD, AND PROCESS CHAMBER
6732855	11-May-04	09/658152	08-Sep-00	CONVEYING ELEMENT AND CONVEYOR MEANS FOR CONVEYING WAFER RECEPTACLES, AND METHOD
6914006	05-Jul-05	10/016633	30-Oct-01	WAFER SCRIBING METHOD AND WAFER SCRIBING DEVICE
6564469	20-May-03	09/901381	09-Jul-01	DEVICE FOR PERFORMING SURFACE TREATMENT ON SEMICONDUCTOR WAFERS

158


Patent No.	Grant Date	Appl No.	Appl Date	Title
6389707	21-May-02	09/641153	17-Aug-00	WAFER CONTAINER HAVING ELECTRICALLY CONDUCTIVE KINEMATIC COUPLING GROOVE TO DETECT THE PRESENCE OF THE WAFER CONTAINER ON A SUPPORT SURFACE, THE SUPPORT SURFACE, AND METHOD
6895294	17-May-05	09/729636	04-Dec-00	ASSEMBLY COMPRISING A PLURALITY OF MASK CONTAINERS, MANUFACTURING SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICES, AND METHOD
6486049	26-Nov-02	09/845600	30-Apr-01	METHOD FOR PROVIDING SEMICONDUCTOR DEVICE AND CORRESPONDING SEMICONDUCTOR DEVICE
6593238	15-Jul-03	09/723151	27-Nov-00	METHOD FOR DETERMINING AN ENDPOINT AND SEMICONDUCTOR WAFER
6902986	07-Jun-05	10/271653	15-Oct-02	METHOD FOR DEFINING ALIGNMENT MARKS IN A SEMICONDUCTOR WAFER
7067342	27-Jun-06	10/988963	15-Nov-04	METHOD OF INTEGRATING OPTICAL DEVICES AND ELECTRONIC DEVICES ON AN INTEGRATED CIRCUIT
7098090	29-Aug-06	10/989947	15-Nov-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE
7309628	18-Dec-07	10/989937	15-Nov-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE
7169654	30-Jan-07	10/990215	15-Nov-04	METHOD OF FORMING A SEMICONDUCTOR DEVICE
6477104	05-Nov-02	09/286178	05-Apr-99	TILED MEMORY AND MEMORY TILE FOR USE THEREIN
6552947	22-Apr-03	09/286196	05-Apr-99	MEMORY TILE FOR USE IN A TILED MEMORY
6249475	19-Jun-01	09/286186	05-Apr-99	METHOD FOR DESIGNING A TILED MEMORY
6154413	28-Nov-00	09/286201	05-Apr-99	METHOD FOR DESIGNING A MEMORY TILE FOR USE IN A TILED MEMORY
5802586	01-Sep-98	08/395225	27-Feb-95	CACHE MEMORY HAVING A READ-MODIFY-WRITE OPERATION AND SIMULTANEOUS BURST READ AND WRITE OPERATIONS AND A METHOD THEREFOR
6598107	22-Jul-03	09/564516	04-May-00	METHOD FOR COMMUNICATING DATA ON A SERIAL BUS
6678773	13-Jan-04	09/758855	11-Jan-01	BUS PROTOCOL INDEPENDENT METHOD AND STRUCTURE FOR MANAGING TRANSACTION PRIORITY, ORDERING AND DEADLOCKS IN A MULTI-PROCESSING SYSTEM
7031258	18-Apr-06	09/758949	11-Jan-01	DIGITAL DATA SYSTEM WITH LINK LEVEL MESSAGE FLOW CONTROL
6862283	01-Mar-05	09/758864	11-Jan-01	METHOD AND APPARATUS FOR MAINTAINING PACKET ORDERING WITH ERROR RECOVERY AMONG MULTIPLE OUTSTANDING PACKETS BETWEEN TWO DEVICES
7106742	12-Sep-06	09/758798	11-Jan-01	METHOD AND SYSTEM FOR LINK FABRIC ERROR DETECTION AND MESSAGE FLOW CONTROL
7382039	03-Jun-08	11/349608	08-Feb-06	EDGE SEAL FOR IMPROVING INTEGRATED CIRCUIT NOISE ISOLATION
7262724	28-Aug-07	11/095910	31-Mar-05	SYSTEM AND METHOD FOR ADJUSTING DYNAMIC RANGE OF ANALOG-TO-DIGITAL CONVERTER
7343147	11-Mar-08	11/098488	04-Apr-05	METHOD AND APPARATUS FOR POWERING AND LOADING SOFTWARE INTO A BATTERY-LESS ELECTRONIC DEVICE
7227487	05-Jun-07	11/273286	14-Nov-05	DIGITAL SATURATION HANDLING IN INTEGRAL NOISE SHAPING OF PULSE WIDTH MODULATION
6471435	29-Oct-02	09/543283	05-Apr-00	FLEXURAL JOINT
6872958	29-Mar-05	10/059048	28-Jan-02	PLATFORM POSITIONING SYSTEM
6355994	12-Mar-02	09/543265	05-Apr-00	PRECISION STAGE
6617587	09-Sep-03	10/243585	12-Sep-02	ELECTRON OPTICS FOR MULTI-BEAM ELECTRON BEAM LITHOGRAPHY TOOL
6773977	10-Aug-04	09/715748	17-Nov-00	METHOD OF FORMING A DIODE FOR INTEGRATION WITH A SEMICONDUCTOR DEVICE AND METHOD OF FORMING A TRANSISTOR DEVICE HAVING AN INTEGRATED DIODE
7547505	16-Jun-09	11/038838	20-Jan-05	METHODS OF FORMING CAPPING LAYERS ON REFLECTIVE MATERIALS
6176373	23-Jan-01	09/024594	17-Feb-98	EMBOSSED CARRIER TAPE
5618351	08-Apr-97	08/563875	28-Nov-95	THERMAL PROCESSING APPARATUS AND PROCESS
7622387	24-Nov-09	12/065256	29-Aug-05	GATE ELECTRODE SILICIDATION PROCESS
7615318	10-Nov-09	11/253061	18-Oct-05	PRINTING OF DESIGN FEATURES USING ALTERNATING PSM TECHNOLOGY WITH DOUBLE MASK EXPOSURE STRATEGY
5326453	05-Jul-94	08/019729	19-Feb-93	METHOD AND SOLUTION FOR ELECTRODEPOSITION OF A DENSE, REFLECTIVE TIN OR TIN-LEAD ALLOY
7528078	05-May-09	11/433298	12-May-06	PROCESS OF FORMING ELECTRONIC DEVICE INCLUDING A DENSIFIED NITRIDE LAYER ADJACENT TO AN OPENING WITHIN A SEMICONDUCTOR LAYER
6890688	10-May-05	10/022489	18-Dec-01	LITHOGRAPHIC TEMPLATE AND METHOD OF FORMATION AND USE
6750067	15-Jun-04	10/126772	19-Apr-02	MICROELECTRONIC PIEZOELECTRIC STRUCTURE AND METHOD OF FORMING

159


Patent No.	Grant Date	Appl No.	Appl Date	Title
				THE SAME
6432546	13-Aug-02	09/624527	24-Jul-00	MICROELECTRONIC PIEZOELECTRIC STRUCTURE AND METHOD OF FORMING THE SAME
6482538	19-Nov-02	09/912994	25-Jul-01	MICROELECTRONIC PIEZOELECTRIC STRUCTURE AND METHOD OF FORMING THE SAME
5628292	13-May-97	08/625378	01-Apr-96	METHOD AND SYSTEM FOR GENERATING AN ENGINE POSITION DEPENDENT OUTPUT CONTROL SIGNAL
6309966	30-Oct-01	09/639183	15-Aug-00	APPARATUS AND METHOD OF A LOW PRESSURE, TWO-STEP NUCLEATION TUNGSTEN DEPOSITION
6472291	29-Oct-02	09/492541	27-Jan-00	PLANARIZATION PROCESS TO ACHIEVE IMPROVED UNIFORMITY ACROSS SEMICONDUCTOR WAFERS
7158386	02-Jan-07	10/431688	08-May-03	BALANCED RADIO FREQUENCY POWER AMPLIFIER WITH TEMPERATURE COMPENSATION
7456105	25-Nov-08	10/321973	17-Dec-02	CMP METAL POLISHING SLURRY AND PROCESS WITH REDUCED SOLIDS CONCENTRATION
6892108	10-May-05	10/694594	24-Apr-02	METHOD FOR ADJUSTING PROCESSING PARAMETERS OF AT LEAST ONE PLATE-LIKE OBJECT IN A PROCESSING TOOL
6881264	19-Apr-05	10/643820	11-Feb-02	[ARRANGEMENT AND] Configuration and a METHOD FOR REDUCING CONTAMINATION WITH PARTICLES ON A SUBSTRATE IN A PROCESS TOOL

II. SigmaTel Jointly Owned U.S. Patents

None.

160

III. Freescale Jointly Owned US Applications


Appl No.	Appl Date	Title
10/613088	07-Jul-03	Method for transmitting data within a communication system [FLEXRAY EXTERNAL TRIGGER MODE]
11/676100	16-Feb-07	SEMICONDUCTOR DEVICE HAVING AN ORGANIC ANTI-REFLECTIVE COATING (ARC) AND METHOD THEREFOR
12/226973	05-May-06	METHOD FOR TRANSFERRING A PREDETERMINED PATTERN REDUCING PROXIMITY EFFECTS
11/578975	20-Apr-05	METHOD OF FORMING A POST EPI ALIGNMENT KEY IN SOI
12/598282	04-May-07	ESD PROTECTION DEVICE AND METHOD OF FORMING AN ESD PROTECTION DEVICE
12/280480	24-Feb-06	TESTING NON-VOLATILE MEMORY DEVICES FOR CHARGE LEAKAGE
11/573078	03-Aug-05	SEMICONDUCTOR SWITCH ARRANGEMENT AND AN ELECTRONIC DEVICE
10/596370	10-Dec-04	METHOD OF PRODUCING AN ELEMENT COMPRISING AN ELECTRICAL CONDUCTOR ENCIRCLED BY MAGNETIC MATERIAL
11/574478	31-Aug-04	POWER SEMICONDUCTOR DEVICE
11/815190	31-Jan-05	METHOD OF COATING A SURFACE WITH NANOPARTICLES
12/446921	23-Oct-06	ENVELOPE DETECTOR, LINEARIZATION CIRCUIT, AMPLIFIER CIRCUIT, METHOD FOR DETECTING A MODULATION ENVELOPE AND WIRELESS COMMUNICATION UNIT
12/067585	20-Sep-05	SPIN-DEPENDENT TUNNELLING CELL AND METHOD OF FORMATION THEREOF
11/576135	28-Sep-04	POWER SWITCHING APPARATUS WITH OVERLOAD PROTECTION
11/576134	28-Sep-04	POWER SWITCHING APPARATUS WITH OPEN-LOAD DETECTION
12/297477	28-Apr-06	METHOD FOR DRIVING A PTC ELECTRICAL LOAD ELEMENT
11/314220	21-Dec-05	VOLATILE CORROSION INHIBITOR PACKAGES
11/695722	03-Apr-07	ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS OF USING THE SAME
11/569933	30-May-05	WIRELESS MOBILE DEVICE
11/569934	30-May-05	WIRELESS MOBILE DEVICE
12/104874	17-Apr-08	ASYNCHRONOUS ERROR CORRECTION CIRCUIT FOR SWITCHING AMPLIFIER
12/169888	09-Jul-08	MULTI-EXPOSURE LITHOGRAPHY EMPLOYING A SINGLE ANTI-REFLECTIVE COATING LAYER
12/177986	23-Jul-08	SEMICONDUCTOR RESISTOR FORMED IN METAL GATE STACK
12/125853	22-May-08	METHOD FOR MAKING TRANSISTORS AND THE DEVICE THEREOF
12/125855	22-May-08	CMOS PROCESS WITH OPTIMIZED PMOS AND NMOS TRANSISTOR DEVICES
12/184438	01-Aug-08	LITHOGRAPHY FOR PITCH REDUCTION
12/171733	11-Jul-08	DUAL METAL GATE TRANSISTOR WITH RESISTOR HAVING DIELECTRIC LAYER BETWEEN METAL AND POLYSILICON
12/176634	21-Jul-08	METHOD TO REDUCE THRESHOLD VOLTAGE (Vt) IN SILICON GERMANIUM (SIGE), HIGH-K DIELECTRIC-METAL GATE, P-TYPE METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS
12/209887	19-Mar-07	RECONFIGURABLE MULTI-PROCESSING COARSE-GRAIN ARRAY
10/327191	20-Dec-02	METHOD AND SYSTEM FOR OPERATING A SEMICONDUCTOR FACTORY
11/510369	25-Aug-06	Coherent access register DATA TRANSFER COHERENCY DEVICE AND METHODS THEREOF
11/091575	28-Mar-05	VIRTUAL MACHINE EXTENDED CAPABILITIES USING APPLICATION CONTEXTS IN A RESOURCE-CONSTRAINED DEVICE
12/019944	25-Jan-08	[METHOD AND APPARATUS FOR POWERING AND LOADING SOFTWARE INTO A] BATTERY-LESS ELECTRONIC DEVICE
12/377664	16-Aug-06	METHOD AND APPARATUS FOR DESIGNING AN INTEGRATED CIRCUIT
12/299305	24-Apr-07	VERY LOW POWER ANALOG COMPENSATION CIRCUIT
12/065190	01-Sep-05	CAPPING LAYER FORMATION ONTO A DUAL DAMESCENE INTERCONNECT
12/065179	01-Sep-06	SEMICONDUCTOR DEVICE INCLUDING A COUPLED DIELECTRIC LAYER AND METAL LAYER, METHOD OF FABRICATION THEREOF, AND MATERIAL FOR COUPLING A DIELECTRIC LAYER AND A METAL LAYER IN A SEMICONDUCTOR DEVICE
12/374170	19-Jul-06	METHOD AND APPARATUS FOR DESIGNING AN INTEGRATED CIRCUIT
11/912126	20-Apr-05	Apparatus for cleaning of circuit substrates [IMPROVED CLEANING OF CIRCUIT SUBSTRATES]

161


Appl No.	Appl Date	Title
12/280477	24-Feb-06	SEMICONDUCTOR DEVICE INCLUDING A COUPLED DIELECTRIC LAYER AND METAL LAYER, METHOD OF FABRICATION THEREOF, AND PASSIVATING COUPLING MATERIAL COMPRISING MULTIPLE ORGANIC COMPONENTS FOR USE IN A SEMICONDUCTOR DEVICE
12/377810	23-Aug-06	RINSE FORMULATION FOR USE IN THE MANUFACTURE OF AN INTEGRATED CIRCUIT
12/373184	10-Jul-06	MEMORY CIRCUIT WITH SENSE AMPLIFIER
12/522038	05-Jan-07	METHOD AND APPARATUS FOR DESIGNATING AN INTEGRATED CIRCUIT
12/599152	15-May-07	IMPROVEMENTS IN OR RELATING TO INTEGRATED CIRCUIT RELIABILITY
12/130918	30-May-08	SEMICONDUCTOR ARRAY
12/090186	19-Oct-05	[A] SYSTEM AND METHOD FOR CLEANING A CONDITIONING DEVICE
12/093113	08-Nov-05	[A] SYSTEM AND METHOD FOR REMOVING PARTICLES FROM A POLISHING PAD
11/796164	27-Apr-07	METAL OXYNITRIDE GATE

162

IV. SigmaTel Jointly Owned US Patent Applications

None.

163

Chief Executive Office