Trial 6: Formal Verification Sample Clauses

Trial 6: Formal Verification. As a system architecture description language, EAST-ADL plays an important role for consolidating various kinds of behaviour concerns in the engineering of automotive EE systems. In MAENAD, an investigation of the EAST-ADL support for formal verification of behaviour centric system properties, based on the regenerative braking system case, will be carried out. The aim is to validate the EAST-ADL support for formalizing various temporal concerns, such as during requirements engineering, function and execution design, safety engineering, etc. By aligning the EAST-ADL semantics with existing mature formalisms, one can then allow formal verification of such concerns through the corresponding external analysis engines. One advantage is that the EAST-ADL users will then obtain analysis leverage by model-checking. Compared to those standalone analytical models in external tools, EAST-ADL models complement with detailed architecture information and facilitate the integration of many related architectural aspects for the purpose of architecture design, safety engineering, reuse and change management. Key points for the analysis The most important objective of this case study is to validate the EAST-ADL support for temporal constraints as well as the claimed advantages to be brought in by EAST-ADL. This will be achieved through two existing mature formalisms: UPPAAL and SPIN. Both UPPAAL and SPIN allow exhaustive reasoning of the compositional consequence of behaviours. They are considered as two representative technologies in the area of formal verification.  UPPAAL is a timed model checker for formal verification of real-time embedded systems (▇▇▇▇://▇▇▇.▇▇▇▇▇▇.▇▇▇/). Based on timed-automata theory, UPPAAL provides support for modelling and simulating system behaviours in the form of compositional automata. The tool has been used in several industrial cases and is recently commercialized.  SPIN is a model checker for formal verification of distributed and concurrent systems (▇▇▇▇://▇▇▇▇▇▇▇▇.▇▇▇). Compared to UPPAAL, the SPIN approach emphasizes the logical aspects of temporal behaviours. It deliberatively avoids the quantitative notion of time, but focuses on the interaction and synchronization of asynchronous processes. This simplification allows SPIN to verify the functional or logical properties of more complex system than timed model checkers usually do. The intended language validation through UPPAAL and SPIN will be performed in the context of FEV developm...
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